2017-07-05 20:14:27 +00:00
|
|
|
|
using BizHawk.Common.NumberExtensions;
|
|
|
|
|
using BizHawk.Emulation.Common;
|
2017-06-11 22:06:50 +00:00
|
|
|
|
using System;
|
2017-05-24 23:36:34 +00:00
|
|
|
|
|
|
|
|
|
namespace BizHawk.Emulation.Cores.Atari.A7800Hawk
|
|
|
|
|
{
|
|
|
|
|
public partial class A7800Hawk : IEmulator
|
|
|
|
|
{
|
|
|
|
|
public IEmulatorServiceProvider ServiceProvider { get; }
|
|
|
|
|
|
2017-06-11 22:06:50 +00:00
|
|
|
|
public ControllerDefinition ControllerDefinition => _controllerDeck.Definition;
|
2017-05-24 23:36:34 +00:00
|
|
|
|
|
2017-05-28 00:40:13 +00:00
|
|
|
|
//Maria related variables
|
|
|
|
|
public int cycle;
|
|
|
|
|
public int cpu_cycle;
|
2017-07-16 15:56:02 +00:00
|
|
|
|
public int m6532_cycle;
|
2017-06-16 20:44:57 +00:00
|
|
|
|
public bool cpu_is_haltable;
|
|
|
|
|
public bool cpu_is_halted;
|
|
|
|
|
public bool cpu_halt_pending;
|
|
|
|
|
public bool cpu_resume_pending;
|
2017-05-28 00:40:13 +00:00
|
|
|
|
|
2017-07-05 20:14:27 +00:00
|
|
|
|
// input state of controllers and console
|
|
|
|
|
public byte p1_state;
|
|
|
|
|
public byte p2_state;
|
2017-07-06 19:25:21 +00:00
|
|
|
|
public byte p1_fire;
|
|
|
|
|
public byte p2_fire;
|
2017-07-16 15:56:02 +00:00
|
|
|
|
public byte p1_fire_2x;
|
|
|
|
|
public byte p2_fire_2x;
|
2017-07-05 20:14:27 +00:00
|
|
|
|
public byte con_state;
|
|
|
|
|
|
2017-06-11 22:06:50 +00:00
|
|
|
|
// there are 4 maria cycles in a CPU cycle (fast access, both NTSC and PAL)
|
|
|
|
|
// if the 6532 or TIA are accessed (PC goes to one of those addresses) the next access will be slower by 1/2 a CPU cycle
|
|
|
|
|
// i.e. it will take 6 Maria cycles instead of 4
|
|
|
|
|
public bool slow_access = false;
|
|
|
|
|
|
2017-05-24 23:36:34 +00:00
|
|
|
|
public void FrameAdvance(IController controller, bool render, bool rendersound)
|
|
|
|
|
{
|
2017-07-19 18:55:50 +00:00
|
|
|
|
Console.WriteLine("-----------------------FRAME-----------------------");
|
2017-06-11 22:06:50 +00:00
|
|
|
|
if (_tracer.Enabled)
|
|
|
|
|
{
|
|
|
|
|
cpu.TraceCallback = s => _tracer.Put(s);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
cpu.TraceCallback = null;
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-24 23:36:34 +00:00
|
|
|
|
_frame++;
|
|
|
|
|
|
|
|
|
|
if (controller.IsPressed("Power"))
|
|
|
|
|
{
|
|
|
|
|
// it seems that theMachine.Reset() doesn't clear ram, etc
|
|
|
|
|
// this should leave hsram intact but clear most other things
|
|
|
|
|
HardReset();
|
|
|
|
|
}
|
|
|
|
|
|
2017-07-05 20:14:27 +00:00
|
|
|
|
_islag = true;
|
|
|
|
|
|
2017-07-06 19:25:21 +00:00
|
|
|
|
GetControllerState(controller);
|
|
|
|
|
GetConsoleState(controller);
|
2017-07-05 20:14:27 +00:00
|
|
|
|
|
|
|
|
|
maria.RunFrame();
|
|
|
|
|
|
2017-05-24 23:36:34 +00:00
|
|
|
|
if (_islag)
|
|
|
|
|
{
|
|
|
|
|
_lagcount++;
|
|
|
|
|
}
|
|
|
|
|
|
2017-06-16 20:44:57 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
public void RunCPUCycle()
|
|
|
|
|
{
|
|
|
|
|
cpu_cycle++;
|
|
|
|
|
tia._hsyncCnt++;
|
2017-07-02 22:01:36 +00:00
|
|
|
|
tia._hsyncCnt %= 454;
|
|
|
|
|
// do the audio sampling
|
|
|
|
|
if (tia._hsyncCnt == 113 || tia._hsyncCnt == 340)
|
|
|
|
|
{
|
|
|
|
|
tia.Execute(0);
|
|
|
|
|
}
|
2017-05-28 00:40:13 +00:00
|
|
|
|
|
2017-07-16 15:56:02 +00:00
|
|
|
|
// tick the m6532 timer, which is still active although not recommended to use
|
|
|
|
|
m6532_cycle++;
|
|
|
|
|
if (m6532_cycle== 4)
|
|
|
|
|
{
|
|
|
|
|
m6532.Timer.Tick();
|
|
|
|
|
m6532_cycle = 0;
|
|
|
|
|
}
|
|
|
|
|
|
2017-06-16 20:44:57 +00:00
|
|
|
|
if (cpu_cycle <= (2 + (slow_access ? 1 : 0)))
|
2017-05-28 00:40:13 +00:00
|
|
|
|
{
|
2017-06-16 20:44:57 +00:00
|
|
|
|
cpu_is_haltable = true;
|
2017-07-05 20:14:27 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
2017-06-16 20:44:57 +00:00
|
|
|
|
{
|
|
|
|
|
cpu_is_haltable = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// the time a cpu cycle takes depends on the status of the address bus
|
|
|
|
|
// any address in range of the TIA or m6532 takes an extra cycle to complete
|
|
|
|
|
if (cpu_cycle == (4 + (slow_access ? 2 : 0)))
|
|
|
|
|
{
|
|
|
|
|
if (!cpu_is_halted)
|
2017-06-17 17:55:21 +00:00
|
|
|
|
{
|
2017-06-11 22:06:50 +00:00
|
|
|
|
cpu.ExecuteOne();
|
2017-06-17 17:55:21 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
// we still want to keep track of CPU time even if it is halted, so increment the counter here
|
|
|
|
|
// The basic 6502 has no halt state, this feature is specific to SALLY
|
|
|
|
|
cpu.TotalExecutedCycles++;
|
|
|
|
|
}
|
2017-06-16 20:44:57 +00:00
|
|
|
|
|
|
|
|
|
cpu_cycle = 0;
|
|
|
|
|
|
|
|
|
|
if (cpu_halt_pending)
|
|
|
|
|
{
|
|
|
|
|
cpu_halt_pending = false;
|
|
|
|
|
cpu_is_halted = true;
|
2017-06-11 22:06:50 +00:00
|
|
|
|
}
|
2017-06-16 20:44:57 +00:00
|
|
|
|
|
|
|
|
|
if (cpu_resume_pending)
|
2017-06-11 22:06:50 +00:00
|
|
|
|
{
|
2017-06-16 20:44:57 +00:00
|
|
|
|
cpu_resume_pending = false;
|
|
|
|
|
cpu_is_halted = false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// determine if the next access will be fast or slow
|
2017-07-06 19:25:21 +00:00
|
|
|
|
if ((cpu.PC & 0xFCE0) == 0)
|
2017-06-16 20:44:57 +00:00
|
|
|
|
{
|
2017-07-06 19:25:21 +00:00
|
|
|
|
// return TIA registers or control register if it is still unlocked
|
|
|
|
|
if ((A7800_control_register & 0x1) == 0)
|
2017-06-16 20:44:57 +00:00
|
|
|
|
{
|
2017-07-06 19:25:21 +00:00
|
|
|
|
slow_access = false;
|
2017-06-16 20:44:57 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-07-06 19:25:21 +00:00
|
|
|
|
slow_access = true;
|
2017-05-28 00:40:13 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
2017-07-06 19:25:21 +00:00
|
|
|
|
else if ((cpu.PC & 0xFF80) == 0x280)
|
|
|
|
|
{
|
|
|
|
|
slow_access = true;
|
|
|
|
|
}
|
|
|
|
|
else if ((cpu.PC & 0xFE80) == 0x480)
|
|
|
|
|
{
|
|
|
|
|
slow_access = true;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
slow_access = false;
|
|
|
|
|
}
|
2017-05-24 23:36:34 +00:00
|
|
|
|
}
|
|
|
|
|
|
2017-07-06 19:25:21 +00:00
|
|
|
|
public void GetControllerState(IController controller)
|
2017-06-11 22:06:50 +00:00
|
|
|
|
{
|
|
|
|
|
InputCallbacks.Call();
|
|
|
|
|
|
2017-07-06 19:25:21 +00:00
|
|
|
|
p1_state = _controllerDeck.ReadPort1(controller);
|
|
|
|
|
p2_state = _controllerDeck.ReadPort2(controller);
|
|
|
|
|
p1_fire = _controllerDeck.ReadFire1(controller);
|
|
|
|
|
p2_fire = _controllerDeck.ReadFire2(controller);
|
2017-07-16 15:56:02 +00:00
|
|
|
|
p1_fire_2x = _controllerDeck.ReadFire1_2x(controller);
|
|
|
|
|
p2_fire_2x = _controllerDeck.ReadFire2_2x(controller);
|
2017-07-05 20:14:27 +00:00
|
|
|
|
}
|
|
|
|
|
|
2017-07-06 19:25:21 +00:00
|
|
|
|
public void GetConsoleState(IController controller)
|
2017-07-05 20:14:27 +00:00
|
|
|
|
{
|
|
|
|
|
byte result = 0;
|
|
|
|
|
|
|
|
|
|
if (controller.IsPressed("Right Difficulty"))
|
|
|
|
|
{
|
|
|
|
|
result |= (1 << 7);
|
|
|
|
|
}
|
|
|
|
|
if (controller.IsPressed("Left Difficulty"))
|
|
|
|
|
{
|
|
|
|
|
result |= (1 << 6);
|
|
|
|
|
}
|
|
|
|
|
if (!controller.IsPressed("Pause"))
|
|
|
|
|
{
|
|
|
|
|
result |= (1 << 3);
|
|
|
|
|
}
|
|
|
|
|
if (!controller.IsPressed("Select"))
|
|
|
|
|
{
|
|
|
|
|
result |= (1 << 1);
|
|
|
|
|
}
|
|
|
|
|
if (!controller.IsPressed("Reset"))
|
|
|
|
|
{
|
|
|
|
|
result |= 1;
|
|
|
|
|
}
|
2017-06-11 22:06:50 +00:00
|
|
|
|
|
2017-07-06 19:25:21 +00:00
|
|
|
|
con_state = result;
|
2017-06-11 22:06:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
2017-05-24 23:36:34 +00:00
|
|
|
|
public int Frame => _frame;
|
|
|
|
|
|
|
|
|
|
public string SystemId => "A7800";
|
|
|
|
|
|
|
|
|
|
public bool DeterministicEmulation { get; set; }
|
|
|
|
|
|
|
|
|
|
public void ResetCounters()
|
|
|
|
|
{
|
|
|
|
|
_frame = 0;
|
|
|
|
|
_lagcount = 0;
|
|
|
|
|
_islag = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
public CoreComm CoreComm { get; }
|
|
|
|
|
|
|
|
|
|
public void Dispose()
|
|
|
|
|
{
|
|
|
|
|
maria = null;
|
|
|
|
|
tia = null;
|
2017-05-25 00:40:02 +00:00
|
|
|
|
m6532 = null;
|
2017-05-24 23:36:34 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|