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Minor tweaks while reviewing instructions.

This commit is contained in:
Ben Vanik 2015-01-11 13:11:13 -08:00
parent 5827f5f5d8
commit ffe9fad685
3 changed files with 9 additions and 5 deletions
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2
src/alloy/backend/x64/x64_sequences.cc
View File

@ -2893,6 +2893,8 @@ EMITTER(VECTOR_ADD, MATCH(I<OPCODE_VECTOR_ADD, V128<>, V128<>, V128<>>)){
}
break;
case FLOAT32_TYPE:
assert_false(is_unsigned);
assert_false(saturate);
e.vaddps(dest, src1, src2);
break;
default: assert_unhandled_case(part_type); break;

9
src/alloy/frontend/ppc/ppc_emit_alu.cc
View File

@ -365,9 +365,9 @@ XEEMITTER(mullwx, 0x7C0001D6, XO)(PPCHIRBuilder& f, InstrData& i) {
XEINSTRNOTIMPLEMENTED();
return 1;
}
Value* v = f.Mul(
f.SignExtend(f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE), INT64_TYPE),
f.SignExtend(f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE), INT64_TYPE));
Value* v = f.SignExtend(f.Mul(f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE),
f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE)),
INT64_TYPE);
f.StoreGPR(i.XO.RT, v);
if (i.XO.Rc) {
f.UpdateCR(0, v);
@ -743,8 +743,7 @@ XEEMITTER(nandx, 0x7C0003B8, X)(PPCHIRBuilder& f, InstrData& i) {
XEEMITTER(norx, 0x7C0000F8, X)(PPCHIRBuilder& f, InstrData& i) {
// RA <- ¬((RS) | (RB))
Value* ra = f.Or(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB));
ra = f.Not(ra);
Value* ra = f.Not(f.Or(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)));
f.StoreGPR(i.X.RA, ra);
if (i.X.Rc) {
f.UpdateCR(0, ra);

3
src/alloy/frontend/ppc/ppc_emit_fpu.cc
View File

@ -454,6 +454,9 @@ XEEMITTER(mtfsfx, 0xFC00058E, XFL)(PPCHIRBuilder& f, InstrData& i) {
return 1;
} else {
// Directly store.
// TODO(benvanik): use w/field mask to select bits.
i.XFL.W;
i.XFL.FM;
f.StoreFPSCR(f.Cast(f.LoadFPR(i.XFL.RB), INT64_TYPE));
}
return 0;