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Fixing vspltw and vrlimi.

This commit is contained in:
Ben Vanik 2013-10-03 20:19:11 -07:00
parent bdb5b0eae2
commit 611902a97e
2 changed files with 7 additions and 9 deletions
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6
src/xenia/cpu/ppc/disasm_altivec.cc
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@ -1882,9 +1882,9 @@ XEDISASMR(vspltisw128, VX128_3(6, 1904), VX128_3)(InstrData& i, InstrDisasm&
XEDISASMR(vspltw, 0x1000028C, VX )(InstrData& i, InstrDisasm& d) { XEDISASMR(vspltw, 0x1000028C, VX )(InstrData& i, InstrDisasm& d) {
d.Init("vspltw", "Vector Splat Word", d.Init("vspltw", "Vector Splat Word",
InstrDisasm::kVMX); InstrDisasm::kVMX);
//d.AddRegOperand(InstrRegister::kVMX, i.VX.VD, InstrRegister::kWrite); d.AddRegOperand(InstrRegister::kVMX, i.VX.VD, InstrRegister::kWrite);
//d.AddRegOperand(InstrRegister::kVMX, i.VX.VA, InstrRegister::kRead); d.AddRegOperand(InstrRegister::kVMX, i.VX.VB, InstrRegister::kRead);
//d.AddRegOperand(InstrRegister::kVMX, i.VX.VB, InstrRegister::kRead); d.AddUImmOperand(i.VX.VA, 1);
return d.Finish(); return d.Finish();
} }

10
src/xenia/cpu/x64/x64_emit_altivec.cc
View File

@ -1251,19 +1251,17 @@ XEEMITTER(vrlimi128, VX128_4(6, 1808), VX128_4)(X64Emitter& e, X86Compiler&
switch (y) { switch (y) {
case 1: case 1:
// X Y Z W -> Y Z W X // X Y Z W -> Y Z W X
c.shufps(v, v, imm(0x6C)); c.shufps(v, v, imm(0x39));
break; break;
case 2: case 2:
// X Y Z W -> Z W X Y // X Y Z W -> Z W X Y
c.shufps(v, v, imm(0xB1)); c.shufps(v, v, imm(0x4E));
break; break;
case 3: case 3:
// X Y Z W -> W X Y Z // X Y Z W -> W X Y Z
c.shufps(v, v, imm(0xC6)); c.shufps(v, v, imm(0x93));
break; break;
default: default: XEASSERTALWAYS(); return 1;
XEASSERTALWAYS();
return 1;
} }
} }
uint32_t blend_mask = uint32_t blend_mask =