diff --git a/src/xenia/cpu/ppc/disasm_altivec.cc b/src/xenia/cpu/ppc/disasm_altivec.cc index 5bbb06c2d..d6f19f615 100644 --- a/src/xenia/cpu/ppc/disasm_altivec.cc +++ b/src/xenia/cpu/ppc/disasm_altivec.cc @@ -1882,9 +1882,9 @@ XEDISASMR(vspltisw128, VX128_3(6, 1904), VX128_3)(InstrData& i, InstrDisasm& XEDISASMR(vspltw, 0x1000028C, VX )(InstrData& i, InstrDisasm& d) { d.Init("vspltw", "Vector Splat Word", InstrDisasm::kVMX); - //d.AddRegOperand(InstrRegister::kVMX, i.VX.VD, InstrRegister::kWrite); - //d.AddRegOperand(InstrRegister::kVMX, i.VX.VA, InstrRegister::kRead); - //d.AddRegOperand(InstrRegister::kVMX, i.VX.VB, InstrRegister::kRead); + d.AddRegOperand(InstrRegister::kVMX, i.VX.VD, InstrRegister::kWrite); + d.AddRegOperand(InstrRegister::kVMX, i.VX.VB, InstrRegister::kRead); + d.AddUImmOperand(i.VX.VA, 1); return d.Finish(); } diff --git a/src/xenia/cpu/x64/x64_emit_altivec.cc b/src/xenia/cpu/x64/x64_emit_altivec.cc index 4fadd4740..7257a4328 100644 --- a/src/xenia/cpu/x64/x64_emit_altivec.cc +++ b/src/xenia/cpu/x64/x64_emit_altivec.cc @@ -1251,19 +1251,17 @@ XEEMITTER(vrlimi128, VX128_4(6, 1808), VX128_4)(X64Emitter& e, X86Compiler& switch (y) { case 1: // X Y Z W -> Y Z W X - c.shufps(v, v, imm(0x6C)); + c.shufps(v, v, imm(0x39)); break; case 2: // X Y Z W -> Z W X Y - c.shufps(v, v, imm(0xB1)); + c.shufps(v, v, imm(0x4E)); break; case 3: // X Y Z W -> W X Y Z - c.shufps(v, v, imm(0xC6)); + c.shufps(v, v, imm(0x93)); break; - default: - XEASSERTALWAYS(); - return 1; + default: XEASSERTALWAYS(); return 1; } } uint32_t blend_mask =