From 52b259369e9c8e27d48c2c44b7b1c1473c66de03 Mon Sep 17 00:00:00 2001 From: Wunkolo Date: Mon, 6 May 2024 20:10:14 -0700 Subject: [PATCH] [a64] Fix `ComputeMemoryAddress{Offset}` register stomp `W1` is a possible HIR register allocation and using W1 here was stomping over it. Don't use W1, use the provided "scratch" register. --- src/xenia/cpu/backend/a64/a64_seq_memory.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/xenia/cpu/backend/a64/a64_seq_memory.cc b/src/xenia/cpu/backend/a64/a64_seq_memory.cc index 63b31e510..a23b708eb 100644 --- a/src/xenia/cpu/backend/a64/a64_seq_memory.cc +++ b/src/xenia/cpu/backend/a64/a64_seq_memory.cc @@ -49,8 +49,8 @@ XReg ComputeMemoryAddressOffset(A64Emitter& e, const T& guest, const T& offset, if (xe::memory::allocation_granularity() > 0x1000) { // Emulate the 4 KB physical address offset in 0xE0000000+ when can't do // it via memory mapping. - e.MOV(W1, 0xE0000000 - offset_const); - e.CMP(guest.reg().toW(), W1); + e.MOV(address_register.toW(), 0xE0000000 - offset_const); + e.CMP(guest.reg().toW(), address_register.toW()); e.CSET(W0, Cond::HS); e.LSL(W0, W0, 12); e.ADD(W0, W0, guest.reg().toW()); @@ -93,8 +93,8 @@ XReg ComputeMemoryAddress(A64Emitter& e, const T& guest, if (xe::memory::allocation_granularity() > 0x1000) { // Emulate the 4 KB physical address offset in 0xE0000000+ when can't do // it via memory mapping. - e.MOV(W1, 0xE0000000); - e.CMP(guest.reg().toW(), W1); + e.MOV(address_register.toW(), 0xE0000000); + e.CMP(guest.reg().toW(), address_register.toW()); e.CSET(X0, Cond::HS); e.LSL(X0, X0, 12); e.ADD(X0, X0, guest);