31 lines
1.7 KiB
Markdown
31 lines
1.7 KiB
Markdown
# CPU Documentation
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## Memory Management
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TODO
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## References
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### PowerPC
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The processor in the 360 is a 64-bit PowerPC chip running with 32-bit memory
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addresses. This can make some of the documentation a little confusing as most
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of the PowerPC docs only have a 'you're in 32 or 64' style. The CPU is largely
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similar to the PPC part in the PS3, so Cell documents often line up for the
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core instructions. The 360 adds some additional AltiVec instructions, though,
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which are only documented in a few places (like the gcc source code, etc).
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* [Free60 Info](http://www.free60.org/Xenon_\(CPU\))
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* [Power ISA docs](https://www.power.org/wp-content/uploads/2012/07/PowerISA_V2.06B_V2_PUBLIC.pdf) (aka 'PowerISA')
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* [PowerPC Programming Environments Manual](https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F7E732FF811F783187256FDD004D3797/$file/pem_64bit_v3.0.2005jul15.pdf) (aka 'pem_64')
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* [PowerPC Vector PEM](https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/C40E4C6133B31EE8872570B500791108/$file/vector_simd_pem_v_2.07c_26Oct2006_cell.pdf)
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* [AltiVec PEM](http://cache.freescale.com/files/32bit/doc/ref_manual/ALTIVECPEM.pdf)
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* [VMX128 Opcodes](http://biallas.net/doc/vmx128/vmx128.txt)
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* [AltiVec Decoding](https://github.com/kakaroto/ps3ida/blob/master/plugins/PPCAltivec/src/main.cpp)
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### x64
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* [Intel Manuals](http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html)
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** [Combined Intel Manuals](http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf)
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* [Apple AltiVec/SSE Migration Guide](https://developer.apple.com/legacy/library/documentation/Performance/Conceptual/Accelerate_sse_migration/Accelerate_sse_migration.pdf)
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