316 lines
11 KiB
C++
316 lines
11 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2020 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_GPU_COMMAND_PROCESSOR_H_
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#define XENIA_GPU_COMMAND_PROCESSOR_H_
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#include <atomic>
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#include <cstring>
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#include <functional>
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#include <memory>
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#include <mutex>
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#include <queue>
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#include <string>
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#include <vector>
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#include "xenia/base/ring_buffer.h"
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#include "xenia/base/threading.h"
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#include "xenia/gpu/register_file.h"
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#include "xenia/gpu/trace_writer.h"
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#include "xenia/gpu/xenos.h"
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#include "xenia/kernel/xthread.h"
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#include "xenia/memory.h"
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#include "xenia/ui/graphics_context.h"
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namespace xe {
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class ByteStream;
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namespace gpu {
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class GraphicsSystem;
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class Shader;
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struct SwapState {
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// Lock must be held when changing data in this structure.
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std::mutex mutex;
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// Dimensions of the framebuffer textures. Should match window size.
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uint32_t width = 0;
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uint32_t height = 0;
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// Current front buffer, being drawn to the screen.
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uintptr_t front_buffer_texture = 0;
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// Current back buffer, being updated by the CP.
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uintptr_t back_buffer_texture = 0;
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// Backend data
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void* backend_data = nullptr;
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// Whether the back buffer is dirty and a swap is pending.
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bool pending = false;
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};
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enum class SwapMode {
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kNormal,
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kIgnored,
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};
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enum class GammaRampType {
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kUnknown = 0,
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kNormal,
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kPWL,
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};
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struct GammaRamp {
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struct NormalEntry {
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union {
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struct {
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uint32_t b : 10;
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uint32_t g : 10;
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uint32_t r : 10;
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uint32_t : 2;
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};
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uint32_t value;
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};
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};
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struct PWLValue {
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union {
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struct {
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uint16_t base;
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uint16_t delta;
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};
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uint32_t value;
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};
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};
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struct PWLEntry {
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union {
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struct {
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PWLValue r;
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PWLValue g;
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PWLValue b;
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};
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PWLValue values[3];
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};
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};
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NormalEntry normal[256];
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PWLEntry pwl[128];
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};
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class CommandProcessor {
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public:
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CommandProcessor(GraphicsSystem* graphics_system,
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kernel::KernelState* kernel_state);
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virtual ~CommandProcessor();
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uint32_t counter() const { return counter_; }
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void increment_counter() { counter_++; }
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Shader* active_vertex_shader() const { return active_vertex_shader_; }
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Shader* active_pixel_shader() const { return active_pixel_shader_; }
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virtual bool Initialize(std::unique_ptr<xe::ui::GraphicsContext> context);
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virtual void Shutdown();
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void CallInThread(std::function<void()> fn);
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virtual void ClearCaches();
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SwapState& swap_state() { return swap_state_; }
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void set_swap_mode(SwapMode swap_mode) { swap_mode_ = swap_mode; }
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void IssueSwap(uint32_t frontbuffer_ptr, uint32_t frontbuffer_width,
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uint32_t frontbuffer_height);
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void set_swap_request_handler(std::function<void()> fn) {
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swap_request_handler_ = fn;
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}
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// May be called not only from the command processor thread when the command
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// processor is paused, and the termination of this function may be explicitly
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// awaited.
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virtual void InitializeShaderStorage(const std::filesystem::path& cache_root,
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uint32_t title_id, bool blocking);
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virtual void RequestFrameTrace(const std::filesystem::path& root_path);
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virtual void BeginTracing(const std::filesystem::path& root_path);
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virtual void EndTracing();
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virtual void TracePlaybackWroteMemory(uint32_t base_ptr, uint32_t length) = 0;
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virtual void RestoreEdramSnapshot(const void* snapshot) = 0;
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void InitializeRingBuffer(uint32_t ptr, uint32_t size_log2);
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void EnableReadPointerWriteBack(uint32_t ptr, uint32_t block_size_log2);
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void UpdateWritePointer(uint32_t value);
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void ExecutePacket(uint32_t ptr, uint32_t count);
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bool is_paused() const { return paused_; }
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void Pause();
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void Resume();
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bool Save(ByteStream* stream);
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bool Restore(ByteStream* stream);
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protected:
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struct IndexBufferInfo {
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xenos::IndexFormat format = xenos::IndexFormat::kInt16;
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xenos::Endian endianness = xenos::Endian::kNone;
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uint32_t count = 0;
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uint32_t guest_base = 0;
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size_t length = 0;
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};
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void WorkerThreadMain();
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virtual bool SetupContext() = 0;
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virtual void ShutdownContext() = 0;
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virtual void WriteRegister(uint32_t index, uint32_t value);
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void UpdateGammaRampValue(GammaRampType type, uint32_t value);
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virtual void MakeCoherent();
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virtual void PrepareForWait();
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virtual void ReturnFromWait();
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virtual void PerformSwap(uint32_t frontbuffer_ptr, uint32_t frontbuffer_width,
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uint32_t frontbuffer_height) = 0;
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uint32_t ExecutePrimaryBuffer(uint32_t start_index, uint32_t end_index);
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virtual void OnPrimaryBufferEnd() {}
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void ExecuteIndirectBuffer(uint32_t ptr, uint32_t length);
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bool ExecutePacket(RingBuffer* reader);
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bool ExecutePacketType0(RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType1(RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType2(RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType3(RingBuffer* reader, uint32_t packet);
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bool ExecutePacketType3_ME_INIT(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_NOP(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_INTERRUPT(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_XE_SWAP(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_INDIRECT_BUFFER(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_WAIT_REG_MEM(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_REG_RMW(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_REG_TO_MEM(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_MEM_WRITE(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_COND_WRITE(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE_SHD(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE_EXT(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_EVENT_WRITE_ZPD(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3Draw(RingBuffer* reader, uint32_t packet,
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const char* opcode_name,
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uint32_t viz_query_condition,
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uint32_t count_remaining);
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bool ExecutePacketType3_DRAW_INDX(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_DRAW_INDX_2(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_SET_CONSTANT(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_SET_CONSTANT2(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_LOAD_ALU_CONSTANT(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_SET_SHADER_CONSTANTS(RingBuffer* reader,
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uint32_t packet, uint32_t count);
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bool ExecutePacketType3_IM_LOAD(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_IM_LOAD_IMMEDIATE(RingBuffer* reader,
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uint32_t packet, uint32_t count);
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bool ExecutePacketType3_INVALIDATE_STATE(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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bool ExecutePacketType3_VIZ_QUERY(RingBuffer* reader, uint32_t packet,
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uint32_t count);
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virtual Shader* LoadShader(xenos::ShaderType shader_type,
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uint32_t guest_address,
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const uint32_t* host_address,
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uint32_t dword_count) = 0;
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virtual bool IssueDraw(xenos::PrimitiveType prim_type, uint32_t index_count,
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IndexBufferInfo* index_buffer_info,
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bool major_mode_explicit) = 0;
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virtual bool IssueCopy() = 0;
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virtual void InitializeTrace() = 0;
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Memory* memory_ = nullptr;
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kernel::KernelState* kernel_state_ = nullptr;
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GraphicsSystem* graphics_system_ = nullptr;
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RegisterFile* register_file_ = nullptr;
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TraceWriter trace_writer_;
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enum class TraceState {
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kDisabled,
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kStreaming,
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kSingleFrame,
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};
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TraceState trace_state_ = TraceState::kDisabled;
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std::filesystem::path trace_stream_path_;
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std::filesystem::path trace_frame_path_;
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std::atomic<bool> worker_running_;
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kernel::object_ref<kernel::XHostThread> worker_thread_;
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std::unique_ptr<xe::ui::GraphicsContext> context_;
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SwapMode swap_mode_ = SwapMode::kNormal;
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SwapState swap_state_;
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std::function<void()> swap_request_handler_;
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std::queue<std::function<void()>> pending_fns_;
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// MicroEngine binary from PM4_ME_INIT
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std::vector<uint32_t> me_bin_;
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uint32_t counter_ = 0;
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uint32_t primary_buffer_ptr_ = 0;
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uint32_t primary_buffer_size_ = 0;
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uint32_t read_ptr_index_ = 0;
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uint32_t read_ptr_update_freq_ = 0;
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uint32_t read_ptr_writeback_ptr_ = 0;
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std::unique_ptr<xe::threading::Event> write_ptr_index_event_;
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std::atomic<uint32_t> write_ptr_index_;
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uint64_t bin_select_ = 0xFFFFFFFFull;
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uint64_t bin_mask_ = 0xFFFFFFFFull;
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Shader* active_vertex_shader_ = nullptr;
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Shader* active_pixel_shader_ = nullptr;
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bool paused_ = false;
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GammaRamp gamma_ramp_ = {};
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int gamma_ramp_rw_subindex_ = 0;
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bool dirty_gamma_ramp_normal_ = true;
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bool dirty_gamma_ramp_pwl_ = true;
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};
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} // namespace gpu
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} // namespace xe
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#endif // XENIA_GPU_COMMAND_PROCESSOR_H_
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