Commit Graph

5481 Commits

Author SHA1 Message Date
Triang3l cf3ce4f98b [D3D12] Unhardcode forgotten pipeline creation thread count 2019-01-15 21:04:17 +03:00
Triang3l a1a1110784 [D3D12] Non-indexed line loops 2019-01-15 14:19:59 +03:00
Triang3l 17dfd84f71 [D3D12] Free two alphatest-related system constant dwords 2019-01-15 12:58:36 +03:00
Triang3l 7d7a539aee Merge branch 'master' into d3d12 2019-01-13 19:07:06 +03:00
Triang3l 8e5a11aeb4 [CPU] Add D3DCOLOR vpkd3d test with 0xFFFFFFFF 2019-01-13 19:06:14 +03:00
Triang3l 58d9c6f33f Merge branch 'master' into d3d12 2019-01-13 17:29:44 +03:00
Triang3l 949b05f517 [CPU] Fix saturation in D3DCOLOR vpkd3d 2019-01-13 17:29:06 +03:00
Triang3l 27a8e4259e [D3D12] DXBC: Fix 0*anything check with negated operands 2019-01-12 18:52:06 +03:00
Triang3l b8d1bb740b [GPU/D3D12] Fix CTX1 component order 2019-01-12 14:28:32 +03:00
Triang3l e5bcedfd1f [D3D12] DXBC: Fix 0*anything check in muls_prev 2019-01-12 13:07:45 +03:00
Triang3l ef523823d5 [D3D12] Force early Z with DSV, fix blend disabled flag in rb_colorcontrol ignored 2019-01-11 17:07:33 +03:00
Triang3l d7ed044be1 [D3D12] Don't cull points and rectangles 2019-01-09 16:25:03 +03:00
Triang3l 8ad12480a4 [D3D12] Copy index buffer to a scratch buffer for memexporting draws 2019-01-09 13:19:49 +03:00
Triang3l aabe6dec9c [D3D12] Fix log level of pipeline creation messages 2019-01-08 14:14:14 +03:00
Triang3l 0e9428f1bc Merge branch 'master' into d3d12 2019-01-08 01:40:08 +03:00
Triang3l ae6fd98c3c [CPU] Ignore upper bits of shift amount in srdx/srwx 2019-01-08 01:39:21 +03:00
Triang3l 77e9ab342c [D3D12] DXBC: Don't update coverage in the depth-only pixel shader 2019-01-06 20:13:23 +03:00
Triang3l 75ec48d225 [D3D12] DXBC: Don't declare shared memory SRV in the depth-only pixel shader 2019-01-06 18:41:54 +03:00
Triang3l 6c48f209a1 [D3D12] Fix 7e3 and 20e4 denormal conversion 2019-01-06 15:10:55 +03:00
Triang3l bc89a5822b [D3D12] Memexport: Fix red/blue swap not being in the write mask 2019-01-05 21:14:06 +03:00
Triang3l 1523a1f662 [D3D12] Use 3/4 of logical cores for pipeline creation, cleanup pipeline log messages 2019-01-04 14:30:26 +03:00
Triang3l 890228b6f3 [D3D12] Prototype multithreaded PSO creation 2019-01-04 00:30:11 +03:00
Triang3l 364cae6cc8 [D3D12] Use deferred command list 2019-01-03 15:08:49 +03:00
Triang3l f0c662fa1e [D3D12] Deferred command list class 2019-01-02 23:46:24 +03:00
Triang3l a97fc28ee2 [D3D12] Use multimap for pipelines 2019-01-01 23:13:26 +03:00
Triang3l 1cea4062c0 [D3D12] Rewrite pipeline cache for compact storage of pipeline descriptions 2019-01-01 22:20:50 +03:00
Triang3l 317e5c3ce2 [D3D12] Some stats in the profiler, tweak tiled buffer heap sizes 2018-12-30 15:09:58 +03:00
Triang3l 87d663d7e0 [D3D12] Disable adaptive tessellation temporarily because of cracks 2018-12-29 21:12:21 +03:00
Triang3l 928e46c8b2 [D3D12] Adaptive tessellation of triangle patches 2018-12-29 20:53:41 +03:00
Triang3l 14476e5453 [D3D12] Rename 2_10_10_10 AS_16 RT format to AS_10 2018-12-29 14:59:10 +03:00
Triang3l 616739048b Merge branch 'master' into d3d12 2018-12-29 14:55:17 +03:00
Triang3l 54b211ed18 [GPU] Rename 2_10_10_10 AS_16 RT format to AS_10 2018-12-29 14:54:01 +03:00
Triang3l af96b68398 [GPU] Copy SurfaceNumFormat comment from D3D12 branch 2018-12-29 14:18:10 +03:00
Triang3l cbfc00f80e [D3D12] Debug option to display tessellation as wireframe 2018-12-28 14:37:39 +03:00
Triang3l 43866092a5 [D3D12] Update some comments about numeric formats 2018-12-28 14:12:09 +03:00
Triang3l f3e3bbc4fa Revert "[D3D12] ROV: Round unorm/snorm to nearest rather than nearest even"
This reverts commit 216998eb56.
2018-12-28 14:05:13 +03:00
Triang3l 216998eb56 [D3D12] ROV: Round unorm/snorm to nearest rather than nearest even 2018-12-28 08:25:41 +03:00
Triang3l 5860a8fdc6 [D3D12] DXBC: Add a missing STAT increment to memexport 2018-12-28 08:13:35 +03:00
Triang3l ed09cac440 [D3D12] DXBC: vfetch RoundIndex, vertex index signedness fixes 2018-12-28 08:11:34 +03:00
Triang3l ec7667ce1b [D3D12] Broken memexport shader code 2018-12-27 20:43:17 +03:00
Triang3l bd9aae016f [D3D12] DXBC: eA and eM registers 2018-12-22 19:51:12 +03:00
Triang3l e803ee84d5 [D3D12] Bind shared memory as UAV with memexport 2018-12-22 15:39:47 +03:00
Triang3l 645f450321 [D3D12] DXBC: Fix UAV and sampler operands 2018-12-22 14:26:18 +03:00
Triang3l 6025599d3b [D3D12] Request memory for memexport in shared memory 2018-12-22 00:57:31 +03:00
Triang3l 0aeff797e5 [D3D12] DXBC: Allocate multiple registers with PushSystemTemp 2018-12-21 22:54:26 +03:00
Triang3l 72e9ac5c28 [GPU] Shader translator: More memexport validation 2018-12-21 22:24:09 +03:00
Triang3l 73baaa8e89 [GPU] Gather eA/eM# writes in shader translator 2018-12-21 10:06:41 +03:00
Triang3l 090bf8e353 [D3D12] Change RT in the title to something less ambiguous and more googlable 2018-12-20 20:48:15 +03:00
Triang3l adc0eb87f6 [GPU] Gather used memexport constants in shader translator 2018-12-20 10:14:18 +03:00
Triang3l dc0b468ea8 Merge branch 'master' into d3d12 2018-12-19 22:51:26 +03:00