Dr. Chat
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d94ff6eb25
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Shaders: Track the register count from the program control register (if available)
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2016-05-22 19:58:50 -05:00 |
Dr. Chat
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1faf5a813a
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Fix ALU scalar swizzles (Possibly)
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2016-05-22 19:57:05 -05:00 |
Dr. Chat
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b025790207
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Disable Vulkan native MSAA by default for now.
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2016-05-17 05:58:52 -05:00 |
Dr. Chat
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44284a780c
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SPIR-V: Misc. IR utility functions
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2016-05-15 14:27:44 -05:00 |
Dr. Chat
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b9a40d1a00
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Use Vulkan as the default graphics backend.
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2016-05-15 12:08:29 -05:00 |
Dr. Chat
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2bb52ef86b
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SPIR-V: WIP shader compiler / optimizations / alpha test implementation
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2016-05-15 12:01:38 -05:00 |
Dr. Chat
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c06a7cdf81
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BaseFencedPool::has_open_batch (and other uncommitted changes)
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2016-05-07 19:17:56 -05:00 |
Dr. Chat
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79f1193130
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Vulkan CP: Fix calculating an invalid copy destination base address when sizeof(texel) != 4
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2016-05-06 00:12:47 -05:00 |
Dr. Chat
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7c5042add7
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Vulkan CP: Add in separate swap-chain images
Some other changes I can't remember
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2016-05-03 14:12:05 -05:00 |
Dr. Chat
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f2af28c322
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TextureCache: Fix up some synchronization flaws (deleting in-use textures/etc)
Fix texture binding IDs not matching fetch instruction IDs.
Fix some bad texture format matching.
Add access watches
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2016-05-03 14:10:15 -05:00 |
Dr. Chat
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8e8df2e778
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PipelineCache: Support shader disasm dumps for nvidia cards.
Fix MSAA 2X multiplier.
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2016-05-03 14:07:20 -05:00 |
Dr. Chat
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d18c99aab6
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RenderCache: Account for MSAA when calculating tile sizes.
Add a new flag to enable native MSAA (this does not work properly at the moment)
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2016-05-03 14:05:34 -05:00 |
Dr. Chat
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aa038fbf23
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Skip the wrapping packet end after parsing IB end (to avoid false draws appearing)
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2016-05-01 15:48:31 -05:00 |
Dr. Chat
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065f777e67
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Merge branch 'vulkan' of github.com:benvanik/xenia into spv_translator
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2016-05-01 11:25:16 -05:00 |
Dr. Chat
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cbccc785cc
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TraceViewer: Build a tree of all command buffers and display that instead of a flat list.
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2016-05-01 10:15:33 -05:00 |
Dr. Chat
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6101b70641
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Fix the Vulkan immediate drawer not drawing lines.
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2016-04-29 13:09:39 -05:00 |
Dr. Chat
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9b2e2a7275
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SPIR-V: Hack in OpSelectionMerge as hints to NVidia's shader compiler (TODO: Make a Shader Compiler)
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2016-04-13 23:17:03 -05:00 |
Dr. Chat
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2bd603bf18
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CircularBuffer: use std::list for allocations instead of a vector.
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2016-04-09 21:40:18 -05:00 |
Dr. Chat
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4811ebc2ce
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BufferCache: Use a CircularBuffer as the transient buffer.
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2016-04-09 21:27:32 -05:00 |
Dr. Chat
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b7f2c93d73
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SPIR-V: Batch predicated instructions together into a single block.
Add Post-Translation validation.
Fix a couple of type-related typos.
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2016-04-09 21:03:44 -05:00 |
Dr. Chat
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a1c9540063
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SPIR-V Validator util class
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2016-04-09 18:35:00 -05:00 |
Dr. Chat
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3726064af5
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Can't use CmdCopyBufferToImage or vice versa for depth and stencil.
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2016-04-01 22:03:29 -05:00 |
Dr. Chat
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f9a634ad25
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CircularBuffer remove Discard functionality and allow rotation
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2016-04-01 21:53:46 -05:00 |
Dr. Chat
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50f72b4e42
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Enable native MSAA
Copy back EDRAM buffers in order by base offset.
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2016-04-01 21:52:39 -05:00 |
Dr. Chat
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2eca3ce9e6
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Texture uploads/basic formats
Fixed swizzle one/zero mismatch
Sampler setup
Remove samplers from the descriptor set layout
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2016-04-01 21:51:17 -05:00 |
Dr. Chat
|
1ea72c5e06
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FencedPool::CancelBatch
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2016-04-01 21:49:58 -05:00 |
Dr. Chat
|
44cffab389
|
SPIR-V Max4
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2016-03-25 18:23:45 -05:00 |
Dr. Chat
|
fc1bd0f379
|
Fix texture uploads
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2016-03-25 17:29:39 -05:00 |
Dr. Chat
|
692d666d57
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Wipe the buffer cache in ClearCache for now.
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2016-03-25 16:50:06 -05:00 |
Dr. Chat
|
0e44cda961
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Update the rectangle list shader
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2016-03-25 16:49:41 -05:00 |
Dr. Chat
|
d7599c817f
|
Formatting.
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2016-03-25 16:44:25 -05:00 |
Dr. Chat
|
a5a31cf123
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VulkanShader::Prepare - return false if vkCreateShaderModule failed.
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2016-03-25 16:37:24 -05:00 |
Dr. Chat
|
2bb40c122d
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Vulkan util Fence class
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2016-03-25 16:36:21 -05:00 |
Dr. Chat
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f75e5fec24
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CP: Use a single command buffer for every frame, reuse render passes/pipelines if not dirty
Hook up resolves and swaps
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2016-03-25 16:35:34 -05:00 |
Dr. Chat
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1e1da1eb6c
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PipelineCache::ConfigurePipeline - Inform the caller if the pipeline is dirty or they can reuse the previously bound pipeline.
Make SetDynamicState public.
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2016-03-25 16:34:14 -05:00 |
Dr. Chat
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b2457d7e72
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Basic texture uploads/address lookups/etc
Freeing of descriptor sets when the GPU is finished with them.
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2016-03-25 16:32:29 -05:00 |
Dr. Chat
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0e41774e36
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RenderCache::dirty() - used to tell if we need to begin a new pass
Round all pixel pitch/heights up before dividing.
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2016-03-25 16:31:12 -05:00 |
Dr. Chat
|
181b2af5a4
|
Vulkan Circular Buffer
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2016-03-25 13:49:07 -05:00 |
Dr. Chat
|
e72e283e79
|
Primitive type makes rasterization state dirty too!
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2016-03-23 16:20:06 -05:00 |
Dr. Chat
|
7b962e59a4
|
SPIR-V Dst
Fix a few bugs in the translator
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2016-03-20 14:21:55 -05:00 |
Dr. Chat
|
38b94dd9e2
|
Add in Xenos events
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2016-03-17 21:58:23 -05:00 |
Dr. Chat
|
2512a6360e
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Pass the physical frontbuffer address into the CP
|
2016-03-17 21:55:47 -05:00 |
Dr. Chat
|
0e3c113375
|
Physical write watches -> access watches (read and/or write watching)
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2016-03-17 21:55:16 -05:00 |
Dr. Chat
|
1831e7a936
|
Pipeline stencil state
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2016-03-16 14:45:40 -05:00 |
Dr. Chat
|
54f89825d9
|
SPIR-V Dp2Add/Dp3
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2016-03-15 00:30:39 -05:00 |
Dr. Chat
|
245102e9e5
|
RenderCache::BlitToImage
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2016-03-12 22:04:32 -06:00 |
Dr. Chat
|
822d61c3d9
|
Fix a few stale data usage bugs in the pipeline cache.
Hook up part of depth/stencil tests/writes
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2016-03-12 22:03:11 -06:00 |
Dr. Chat
|
5ba04b9e55
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RenderCache::ClearEDRAMColor/ClearEDRAMDepthStencil
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2016-03-12 11:49:59 -06:00 |
Dr. Chat
|
635d095b87
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RenderCache: Track color target / depth target usage, refactor RawCopyToImage
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2016-03-10 20:39:46 -06:00 |
Dr. Chat
|
f903a559b3
|
Blit Vulkan CP output to the main window's swap chain
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2016-03-10 13:01:39 -06:00 |