Hacky state for instruction gen.
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#include <xenia/common.h>
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namespace XE_PPC_SPR {
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enum XE_PPC_SPR_e {
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XER = 1,
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LR = 8,
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CTR = 9,
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};
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} // XE_PPC_SPR
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typedef struct XECACHEALIGN64 {
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uint64_t r[32]; // General purpose registers
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xefloat4_t v[128]; // VMX128 vector registers
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@ -0,0 +1,40 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_PPC_INSTR_CTX_H_
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#define XENIA_CPU_PPC_INSTR_CTX_H_
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#include <xenia/cpu/ppc/instr.h>
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typedef struct {
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llvm::LLVMContext *context;
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llvm::Module *module;
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// Address of the instruction being generated.
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uint32_t cia;
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llvm::Value *get_cia();
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void set_nia(llvm::Value *value);
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llvm::Value *get_spr(uint32_t n);
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void set_spr(uint32_t n, llvm::Value *value);
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llvm::Value *get_cr();
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void set_cr(llvm::Value *value);
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llvm::Value *get_gpr(uint32_t n);
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void set_gpr(uint32_t n, llvm::Value *value);
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llvm::Value *get_memory_addr(uint32_t addr);
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llvm::Value *read_memory(llvm::Value *addr, uint32_t size, bool extend);
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void write_memory(llvm::Value *addr, uint32_t size, llvm::Value *value);
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} xe_ppc_instr_ctx_t;
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#endif // XENIA_CPU_PPC_INSTR_CTX_H_
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