diff --git a/include/xenia/cpu/ppc/state.h b/include/xenia/cpu/ppc/state.h
index aa0000ac5..7a17bf4f0 100644
--- a/include/xenia/cpu/ppc/state.h
+++ b/include/xenia/cpu/ppc/state.h
@@ -13,6 +13,15 @@
 #include <xenia/common.h>
 
 
+namespace XE_PPC_SPR {
+  enum XE_PPC_SPR_e {
+    XER                   = 1,
+    LR                    = 8,
+    CTR                   = 9,
+  };
+}  // XE_PPC_SPR
+
+
 typedef struct XECACHEALIGN64 {
   uint64_t    r[32];              // General purpose registers
   xefloat4_t  v[128];             // VMX128 vector registers
diff --git a/src/cpu/ppc/instr_ctx.h b/src/cpu/ppc/instr_ctx.h
new file mode 100644
index 000000000..23675d29e
--- /dev/null
+++ b/src/cpu/ppc/instr_ctx.h
@@ -0,0 +1,40 @@
+/**
+ ******************************************************************************
+ * Xenia : Xbox 360 Emulator Research Project                                 *
+ ******************************************************************************
+ * Copyright 2013 Ben Vanik. All rights reserved.                             *
+ * Released under the BSD license - see LICENSE in the root for more details. *
+ ******************************************************************************
+ */
+
+#ifndef XENIA_CPU_PPC_INSTR_CTX_H_
+#define XENIA_CPU_PPC_INSTR_CTX_H_
+
+#include <xenia/cpu/ppc/instr.h>
+
+
+typedef struct {
+  llvm::LLVMContext   *context;
+  llvm::Module        *module;
+
+  // Address of the instruction being generated.
+  uint32_t            cia;
+
+  llvm::Value *get_cia();
+  void set_nia(llvm::Value *value);
+  llvm::Value *get_spr(uint32_t n);
+  void set_spr(uint32_t n, llvm::Value *value);
+
+  llvm::Value *get_cr();
+  void set_cr(llvm::Value *value);
+
+  llvm::Value *get_gpr(uint32_t n);
+  void set_gpr(uint32_t n, llvm::Value *value);
+
+  llvm::Value *get_memory_addr(uint32_t addr);
+  llvm::Value *read_memory(llvm::Value *addr, uint32_t size, bool extend);
+  void write_memory(llvm::Value *addr, uint32_t size, llvm::Value *value);
+} xe_ppc_instr_ctx_t;
+
+
+#endif  // XENIA_CPU_PPC_INSTR_CTX_H_