[GPU] Ignore z_enable for !z_write_enable && z_func == ALWAYS
This commit is contained in:
parent
5519dbb39f
commit
5ec0c92601
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@ -22,6 +22,7 @@
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#include "xenia/gpu/d3d12/d3d12_shader.h"
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#include "xenia/gpu/d3d12/d3d12_shader.h"
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#include "xenia/gpu/draw_util.h"
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#include "xenia/gpu/draw_util.h"
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#include "xenia/gpu/gpu_flags.h"
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#include "xenia/gpu/gpu_flags.h"
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#include "xenia/gpu/registers.h"
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#include "xenia/gpu/xenos.h"
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#include "xenia/gpu/xenos.h"
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#include "xenia/ui/d3d12/d3d12_presenter.h"
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#include "xenia/ui/d3d12/d3d12_presenter.h"
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#include "xenia/ui/d3d12/d3d12_util.h"
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#include "xenia/ui/d3d12/d3d12_util.h"
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@ -2127,13 +2128,16 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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return true;
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return true;
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}
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}
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reg::RB_DEPTHCONTROL normalized_depth_control =
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draw_util::GetNormalizedDepthControl(regs);
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// Shader modifications.
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// Shader modifications.
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DxbcShaderTranslator::Modification vertex_shader_modification =
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DxbcShaderTranslator::Modification vertex_shader_modification =
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pipeline_cache_->GetCurrentVertexShaderModification(
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pipeline_cache_->GetCurrentVertexShaderModification(
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*vertex_shader, primitive_processing_result.host_vertex_shader_type);
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*vertex_shader, primitive_processing_result.host_vertex_shader_type);
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DxbcShaderTranslator::Modification pixel_shader_modification =
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DxbcShaderTranslator::Modification pixel_shader_modification =
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pixel_shader
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pixel_shader ? pipeline_cache_->GetCurrentPixelShaderModification(
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? pipeline_cache_->GetCurrentPixelShaderModification(*pixel_shader)
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*pixel_shader, normalized_depth_control)
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: DxbcShaderTranslator::Modification(0);
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: DxbcShaderTranslator::Modification(0);
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// Set up the render targets - this may perform dispatches and draws.
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// Set up the render targets - this may perform dispatches and draws.
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@ -2142,6 +2146,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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regs, pixel_shader->writes_color_targets())
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regs, pixel_shader->writes_color_targets())
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: 0;
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: 0;
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if (!render_target_cache_->Update(is_rasterization_done,
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if (!render_target_cache_->Update(is_rasterization_done,
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normalized_depth_control,
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normalized_color_mask)) {
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normalized_color_mask)) {
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return false;
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return false;
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}
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}
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@ -2173,8 +2178,8 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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ID3D12RootSignature* root_signature;
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ID3D12RootSignature* root_signature;
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if (!pipeline_cache_->ConfigurePipeline(
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if (!pipeline_cache_->ConfigurePipeline(
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vertex_shader_translation, pixel_shader_translation,
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vertex_shader_translation, pixel_shader_translation,
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primitive_processing_result, normalized_color_mask,
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primitive_processing_result, normalized_depth_control,
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bound_depth_and_color_render_target_bits,
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normalized_color_mask, bound_depth_and_color_render_target_bits,
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bound_depth_and_color_render_target_formats, &pipeline_handle,
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bound_depth_and_color_render_target_formats, &pipeline_handle,
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&root_signature)) {
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&root_signature)) {
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return false;
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return false;
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@ -2206,6 +2211,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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draw_util::GetHostViewportInfo(
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draw_util::GetHostViewportInfo(
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regs, resolution_scale_x, resolution_scale_y, true,
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regs, resolution_scale_x, resolution_scale_y, true,
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D3D12_VIEWPORT_BOUNDS_MAX, D3D12_VIEWPORT_BOUNDS_MAX, false,
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D3D12_VIEWPORT_BOUNDS_MAX, D3D12_VIEWPORT_BOUNDS_MAX, false,
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normalized_depth_control,
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host_render_targets_used &&
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host_render_targets_used &&
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(depth_float24_conversion ==
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(depth_float24_conversion ==
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RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating ||
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RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating ||
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@ -2221,7 +2227,8 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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scissor.extent[1] *= resolution_scale_y;
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scissor.extent[1] *= resolution_scale_y;
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// Update viewport, scissor, blend factor and stencil reference.
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// Update viewport, scissor, blend factor and stencil reference.
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UpdateFixedFunctionState(viewport_info, scissor, primitive_polygonal);
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UpdateFixedFunctionState(viewport_info, scissor, primitive_polygonal,
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normalized_depth_control);
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// Update system constants before uploading them.
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// Update system constants before uploading them.
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// TODO(Triang3l): With ROV, pass the disabled render target mask for safety.
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// TODO(Triang3l): With ROV, pass the disabled render target mask for safety.
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@ -2229,7 +2236,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
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memexport_used, primitive_polygonal,
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memexport_used, primitive_polygonal,
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primitive_processing_result.line_loop_closing_index,
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primitive_processing_result.line_loop_closing_index,
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primitive_processing_result.host_index_endian, viewport_info,
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primitive_processing_result.host_index_endian, viewport_info,
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used_texture_mask, normalized_color_mask);
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used_texture_mask, normalized_depth_control, normalized_color_mask);
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// Update constant buffers, descriptors and root parameters.
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// Update constant buffers, descriptors and root parameters.
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if (!UpdateBindings(vertex_shader, pixel_shader, root_signature)) {
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if (!UpdateBindings(vertex_shader, pixel_shader, root_signature)) {
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@ -3029,7 +3036,8 @@ void D3D12CommandProcessor::ClearCommandAllocatorCache() {
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void D3D12CommandProcessor::UpdateFixedFunctionState(
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void D3D12CommandProcessor::UpdateFixedFunctionState(
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const draw_util::ViewportInfo& viewport_info,
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const draw_util::ViewportInfo& viewport_info,
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const draw_util::Scissor& scissor, bool primitive_polygonal) {
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const draw_util::Scissor& scissor, bool primitive_polygonal,
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reg::RB_DEPTHCONTROL normalized_depth_control) {
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#if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES
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#if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES
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SCOPE_profile_cpu_f("gpu");
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SCOPE_profile_cpu_f("gpu");
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#endif // XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES
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#endif // XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES
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@ -3077,8 +3085,7 @@ void D3D12CommandProcessor::UpdateFixedFunctionState(
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// choose the back face one only if drawing only back faces.
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// choose the back face one only if drawing only back faces.
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Register stencil_ref_mask_reg;
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Register stencil_ref_mask_reg;
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auto pa_su_sc_mode_cntl = regs.Get<reg::PA_SU_SC_MODE_CNTL>();
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auto pa_su_sc_mode_cntl = regs.Get<reg::PA_SU_SC_MODE_CNTL>();
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if (primitive_polygonal &&
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if (primitive_polygonal && normalized_depth_control.backface_enable &&
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draw_util::GetDepthControlForCurrentEdramMode(regs).backface_enable &&
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pa_su_sc_mode_cntl.cull_front && !pa_su_sc_mode_cntl.cull_back) {
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pa_su_sc_mode_cntl.cull_front && !pa_su_sc_mode_cntl.cull_back) {
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stencil_ref_mask_reg = XE_GPU_REG_RB_STENCILREFMASK_BF;
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stencil_ref_mask_reg = XE_GPU_REG_RB_STENCILREFMASK_BF;
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} else {
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} else {
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@ -3099,6 +3106,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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bool shared_memory_is_uav, bool primitive_polygonal,
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bool shared_memory_is_uav, bool primitive_polygonal,
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uint32_t line_loop_closing_index, xenos::Endian index_endian,
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uint32_t line_loop_closing_index, xenos::Endian index_endian,
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const draw_util::ViewportInfo& viewport_info, uint32_t used_texture_mask,
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const draw_util::ViewportInfo& viewport_info, uint32_t used_texture_mask,
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reg::RB_DEPTHCONTROL normalized_depth_control,
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uint32_t normalized_color_mask) {
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uint32_t normalized_color_mask) {
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#if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES
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#if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES
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SCOPE_profile_cpu_f("gpu");
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SCOPE_profile_cpu_f("gpu");
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@ -3113,7 +3121,6 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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float rb_alpha_ref = regs[XE_GPU_REG_RB_ALPHA_REF].f32;
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float rb_alpha_ref = regs[XE_GPU_REG_RB_ALPHA_REF].f32;
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auto rb_colorcontrol = regs.Get<reg::RB_COLORCONTROL>();
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auto rb_colorcontrol = regs.Get<reg::RB_COLORCONTROL>();
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auto rb_depth_info = regs.Get<reg::RB_DEPTH_INFO>();
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auto rb_depth_info = regs.Get<reg::RB_DEPTH_INFO>();
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auto rb_depthcontrol = draw_util::GetDepthControlForCurrentEdramMode(regs);
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auto rb_stencilrefmask = regs.Get<reg::RB_STENCILREFMASK>();
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auto rb_stencilrefmask = regs.Get<reg::RB_STENCILREFMASK>();
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auto rb_stencilrefmask_bf =
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auto rb_stencilrefmask_bf =
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regs.Get<reg::RB_STENCILREFMASK>(XE_GPU_REG_RB_STENCILREFMASK_BF);
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regs.Get<reg::RB_STENCILREFMASK>(XE_GPU_REG_RB_STENCILREFMASK_BF);
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@ -3155,8 +3162,8 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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// Disable depth and stencil if it aliases a color render target (for
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// Disable depth and stencil if it aliases a color render target (for
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// instance, during the XBLA logo in 58410954, though depth writing is already
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// instance, during the XBLA logo in 58410954, though depth writing is already
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// disabled there).
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// disabled there).
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bool depth_stencil_enabled =
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bool depth_stencil_enabled = normalized_depth_control.stencil_enable ||
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rb_depthcontrol.stencil_enable || rb_depthcontrol.z_enable;
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normalized_depth_control.z_enable;
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if (edram_rov_used && depth_stencil_enabled) {
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if (edram_rov_used && depth_stencil_enabled) {
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for (uint32_t i = 0; i < 4; ++i) {
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for (uint32_t i = 0; i < 4; ++i) {
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if (rb_depth_info.depth_base == color_infos[i].color_base &&
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if (rb_depth_info.depth_base == color_infos[i].color_base &&
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@ -3229,10 +3236,10 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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}
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}
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if (edram_rov_used && depth_stencil_enabled) {
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if (edram_rov_used && depth_stencil_enabled) {
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flags |= DxbcShaderTranslator::kSysFlag_ROVDepthStencil;
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flags |= DxbcShaderTranslator::kSysFlag_ROVDepthStencil;
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if (rb_depthcontrol.z_enable) {
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if (normalized_depth_control.z_enable) {
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flags |= uint32_t(rb_depthcontrol.zfunc)
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flags |= uint32_t(normalized_depth_control.zfunc)
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<< DxbcShaderTranslator::kSysFlag_ROVDepthPassIfLess_Shift;
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<< DxbcShaderTranslator::kSysFlag_ROVDepthPassIfLess_Shift;
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if (rb_depthcontrol.z_write_enable) {
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if (normalized_depth_control.z_write_enable) {
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flags |= DxbcShaderTranslator::kSysFlag_ROVDepthWrite;
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flags |= DxbcShaderTranslator::kSysFlag_ROVDepthWrite;
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}
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}
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} else {
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} else {
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@ -3242,7 +3249,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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DxbcShaderTranslator::kSysFlag_ROVDepthPassIfEqual |
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DxbcShaderTranslator::kSysFlag_ROVDepthPassIfEqual |
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DxbcShaderTranslator::kSysFlag_ROVDepthPassIfGreater;
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DxbcShaderTranslator::kSysFlag_ROVDepthPassIfGreater;
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}
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}
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if (rb_depthcontrol.stencil_enable) {
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if (normalized_depth_control.stencil_enable) {
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flags |= DxbcShaderTranslator::kSysFlag_ROVStencilTest;
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flags |= DxbcShaderTranslator::kSysFlag_ROVStencilTest;
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}
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}
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// Hint - if not applicable to the shader, will not have effect.
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// Hint - if not applicable to the shader, will not have effect.
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@ -3526,7 +3533,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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poly_offset_back_offset;
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poly_offset_back_offset;
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system_constants_.edram_poly_offset_back_offset = poly_offset_back_offset;
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system_constants_.edram_poly_offset_back_offset = poly_offset_back_offset;
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if (depth_stencil_enabled && rb_depthcontrol.stencil_enable) {
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if (depth_stencil_enabled && normalized_depth_control.stencil_enable) {
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dirty |= system_constants_.edram_stencil_front_reference !=
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dirty |= system_constants_.edram_stencil_front_reference !=
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rb_stencilrefmask.stencilref;
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rb_stencilrefmask.stencilref;
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system_constants_.edram_stencil_front_reference =
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system_constants_.edram_stencil_front_reference =
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@ -3540,12 +3547,12 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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system_constants_.edram_stencil_front_write_mask =
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system_constants_.edram_stencil_front_write_mask =
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rb_stencilrefmask.stencilwritemask;
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rb_stencilrefmask.stencilwritemask;
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uint32_t stencil_func_ops =
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uint32_t stencil_func_ops =
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(rb_depthcontrol.value >> 8) & ((1 << 12) - 1);
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(normalized_depth_control.value >> 8) & ((1 << 12) - 1);
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dirty |=
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dirty |=
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system_constants_.edram_stencil_front_func_ops != stencil_func_ops;
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system_constants_.edram_stencil_front_func_ops != stencil_func_ops;
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system_constants_.edram_stencil_front_func_ops = stencil_func_ops;
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system_constants_.edram_stencil_front_func_ops = stencil_func_ops;
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if (primitive_polygonal && rb_depthcontrol.backface_enable) {
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if (primitive_polygonal && normalized_depth_control.backface_enable) {
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dirty |= system_constants_.edram_stencil_back_reference !=
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dirty |= system_constants_.edram_stencil_back_reference !=
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rb_stencilrefmask_bf.stencilref;
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rb_stencilrefmask_bf.stencilref;
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system_constants_.edram_stencil_back_reference =
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system_constants_.edram_stencil_back_reference =
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@ -3559,7 +3566,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
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system_constants_.edram_stencil_back_write_mask =
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system_constants_.edram_stencil_back_write_mask =
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rb_stencilrefmask_bf.stencilwritemask;
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rb_stencilrefmask_bf.stencilwritemask;
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uint32_t stencil_func_ops_bf =
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uint32_t stencil_func_ops_bf =
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(rb_depthcontrol.value >> 20) & ((1 << 12) - 1);
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(normalized_depth_control.value >> 20) & ((1 << 12) - 1);
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dirty |= system_constants_.edram_stencil_back_func_ops !=
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dirty |= system_constants_.edram_stencil_back_func_ops !=
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stencil_func_ops_bf;
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stencil_func_ops_bf;
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system_constants_.edram_stencil_back_func_ops = stencil_func_ops_bf;
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system_constants_.edram_stencil_back_func_ops = stencil_func_ops_bf;
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@ -30,6 +30,7 @@
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#include "xenia/gpu/draw_util.h"
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#include "xenia/gpu/draw_util.h"
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#include "xenia/gpu/dxbc_shader.h"
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#include "xenia/gpu/dxbc_shader.h"
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#include "xenia/gpu/dxbc_shader_translator.h"
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#include "xenia/gpu/dxbc_shader_translator.h"
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#include "xenia/gpu/registers.h"
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#include "xenia/gpu/xenos.h"
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#include "xenia/gpu/xenos.h"
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#include "xenia/kernel/kernel_state.h"
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#include "xenia/kernel/kernel_state.h"
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#include "xenia/ui/d3d12/d3d12_descriptor_heap_pool.h"
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#include "xenia/ui/d3d12/d3d12_descriptor_heap_pool.h"
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@ -349,13 +350,15 @@ class D3D12CommandProcessor : public CommandProcessor {
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void UpdateFixedFunctionState(const draw_util::ViewportInfo& viewport_info,
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void UpdateFixedFunctionState(const draw_util::ViewportInfo& viewport_info,
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const draw_util::Scissor& scissor,
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const draw_util::Scissor& scissor,
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bool primitive_polygonal);
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bool primitive_polygonal,
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reg::RB_DEPTHCONTROL normalized_depth_control);
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void UpdateSystemConstantValues(bool shared_memory_is_uav,
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void UpdateSystemConstantValues(bool shared_memory_is_uav,
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bool primitive_polygonal,
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bool primitive_polygonal,
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uint32_t line_loop_closing_index,
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uint32_t line_loop_closing_index,
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xenos::Endian index_endian,
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xenos::Endian index_endian,
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const draw_util::ViewportInfo& viewport_info,
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const draw_util::ViewportInfo& viewport_info,
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uint32_t used_texture_mask,
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uint32_t used_texture_mask,
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reg::RB_DEPTHCONTROL normalized_depth_control,
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uint32_t normalized_color_mask);
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uint32_t normalized_color_mask);
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bool UpdateBindings(const D3D12Shader* vertex_shader,
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bool UpdateBindings(const D3D12Shader* vertex_shader,
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const D3D12Shader* pixel_shader,
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const D3D12Shader* pixel_shader,
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@ -1249,9 +1249,11 @@ void D3D12RenderTargetCache::BeginSubmission() {
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}
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}
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}
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}
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bool D3D12RenderTargetCache::Update(bool is_rasterization_done,
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bool D3D12RenderTargetCache::Update(
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bool is_rasterization_done, reg::RB_DEPTHCONTROL normalized_depth_control,
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uint32_t shader_writes_color_targets) {
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uint32_t shader_writes_color_targets) {
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if (!RenderTargetCache::Update(is_rasterization_done,
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if (!RenderTargetCache::Update(is_rasterization_done,
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normalized_depth_control,
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shader_writes_color_targets)) {
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shader_writes_color_targets)) {
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return false;
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return false;
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}
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}
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@ -64,6 +64,7 @@ class D3D12RenderTargetCache final : public RenderTargetCache {
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uint32_t GetResolutionScaleY() const override { return resolution_scale_y_; }
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uint32_t GetResolutionScaleY() const override { return resolution_scale_y_; }
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bool Update(bool is_rasterization_done,
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bool Update(bool is_rasterization_done,
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reg::RB_DEPTHCONTROL normalized_depth_control,
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uint32_t shader_writes_color_targets) override;
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uint32_t shader_writes_color_targets) override;
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void InvalidateCommandListRenderTargets() {
|
void InvalidateCommandListRenderTargets() {
|
||||||
|
|
|
@ -36,6 +36,7 @@
|
||||||
#include "xenia/gpu/d3d12/d3d12_render_target_cache.h"
|
#include "xenia/gpu/d3d12/d3d12_render_target_cache.h"
|
||||||
#include "xenia/gpu/draw_util.h"
|
#include "xenia/gpu/draw_util.h"
|
||||||
#include "xenia/gpu/gpu_flags.h"
|
#include "xenia/gpu/gpu_flags.h"
|
||||||
|
#include "xenia/gpu/registers.h"
|
||||||
#include "xenia/gpu/xenos.h"
|
#include "xenia/gpu/xenos.h"
|
||||||
#include "xenia/ui/d3d12/d3d12_util.h"
|
#include "xenia/ui/d3d12/d3d12_util.h"
|
||||||
|
|
||||||
|
@ -896,7 +897,8 @@ PipelineCache::GetCurrentVertexShaderModification(
|
||||||
}
|
}
|
||||||
|
|
||||||
DxbcShaderTranslator::Modification
|
DxbcShaderTranslator::Modification
|
||||||
PipelineCache::GetCurrentPixelShaderModification(const Shader& shader) const {
|
PipelineCache::GetCurrentPixelShaderModification(
|
||||||
|
const Shader& shader, reg::RB_DEPTHCONTROL normalized_depth_control) const {
|
||||||
assert_true(shader.type() == xenos::ShaderType::kPixel);
|
assert_true(shader.type() == xenos::ShaderType::kPixel);
|
||||||
assert_true(shader.is_ucode_analyzed());
|
assert_true(shader.is_ucode_analyzed());
|
||||||
const auto& regs = register_file_;
|
const auto& regs = register_file_;
|
||||||
|
@ -915,7 +917,7 @@ PipelineCache::GetCurrentPixelShaderModification(const Shader& shader) const {
|
||||||
RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating ||
|
RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating ||
|
||||||
depth_float24_conversion ==
|
depth_float24_conversion ==
|
||||||
RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding) &&
|
RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding) &&
|
||||||
draw_util::GetDepthControlForCurrentEdramMode(regs).z_enable &&
|
normalized_depth_control.z_enable &&
|
||||||
regs.Get<reg::RB_DEPTH_INFO>().depth_format ==
|
regs.Get<reg::RB_DEPTH_INFO>().depth_format ==
|
||||||
xenos::DepthRenderTargetFormat::kD24FS8) {
|
xenos::DepthRenderTargetFormat::kD24FS8) {
|
||||||
modification.pixel.depth_stencil_mode =
|
modification.pixel.depth_stencil_mode =
|
||||||
|
@ -941,6 +943,7 @@ bool PipelineCache::ConfigurePipeline(
|
||||||
D3D12Shader::D3D12Translation* vertex_shader,
|
D3D12Shader::D3D12Translation* vertex_shader,
|
||||||
D3D12Shader::D3D12Translation* pixel_shader,
|
D3D12Shader::D3D12Translation* pixel_shader,
|
||||||
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
uint32_t normalized_color_mask,
|
uint32_t normalized_color_mask,
|
||||||
uint32_t bound_depth_and_color_render_target_bits,
|
uint32_t bound_depth_and_color_render_target_bits,
|
||||||
const uint32_t* bound_depth_and_color_render_target_formats,
|
const uint32_t* bound_depth_and_color_render_target_formats,
|
||||||
|
@ -1013,7 +1016,8 @@ bool PipelineCache::ConfigurePipeline(
|
||||||
PipelineRuntimeDescription runtime_description;
|
PipelineRuntimeDescription runtime_description;
|
||||||
if (!GetCurrentStateDescription(
|
if (!GetCurrentStateDescription(
|
||||||
vertex_shader, pixel_shader, primitive_processing_result,
|
vertex_shader, pixel_shader, primitive_processing_result,
|
||||||
normalized_color_mask, bound_depth_and_color_render_target_bits,
|
normalized_depth_control, normalized_color_mask,
|
||||||
|
bound_depth_and_color_render_target_bits,
|
||||||
bound_depth_and_color_render_target_formats, runtime_description)) {
|
bound_depth_and_color_render_target_formats, runtime_description)) {
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
@ -1280,6 +1284,7 @@ bool PipelineCache::GetCurrentStateDescription(
|
||||||
D3D12Shader::D3D12Translation* vertex_shader,
|
D3D12Shader::D3D12Translation* vertex_shader,
|
||||||
D3D12Shader::D3D12Translation* pixel_shader,
|
D3D12Shader::D3D12Translation* pixel_shader,
|
||||||
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
uint32_t normalized_color_mask,
|
uint32_t normalized_color_mask,
|
||||||
uint32_t bound_depth_and_color_render_target_bits,
|
uint32_t bound_depth_and_color_render_target_bits,
|
||||||
const uint32_t* bound_depth_and_color_render_target_formats,
|
const uint32_t* bound_depth_and_color_render_target_formats,
|
||||||
|
@ -1483,18 +1488,16 @@ bool PipelineCache::GetCurrentStateDescription(
|
||||||
// Depth/stencil. No stencil, always passing depth test and no depth writing
|
// Depth/stencil. No stencil, always passing depth test and no depth writing
|
||||||
// means depth disabled.
|
// means depth disabled.
|
||||||
if (bound_depth_and_color_render_target_bits & 1) {
|
if (bound_depth_and_color_render_target_bits & 1) {
|
||||||
auto rb_depthcontrol =
|
if (normalized_depth_control.z_enable) {
|
||||||
draw_util::GetDepthControlForCurrentEdramMode(regs);
|
description_out.depth_func = normalized_depth_control.zfunc;
|
||||||
if (rb_depthcontrol.z_enable) {
|
description_out.depth_write = normalized_depth_control.z_write_enable;
|
||||||
description_out.depth_func = rb_depthcontrol.zfunc;
|
|
||||||
description_out.depth_write = rb_depthcontrol.z_write_enable;
|
|
||||||
} else {
|
} else {
|
||||||
description_out.depth_func = xenos::CompareFunction::kAlways;
|
description_out.depth_func = xenos::CompareFunction::kAlways;
|
||||||
}
|
}
|
||||||
if (rb_depthcontrol.stencil_enable) {
|
if (normalized_depth_control.stencil_enable) {
|
||||||
description_out.stencil_enable = 1;
|
description_out.stencil_enable = 1;
|
||||||
bool stencil_backface_enable =
|
bool stencil_backface_enable =
|
||||||
primitive_polygonal && rb_depthcontrol.backface_enable;
|
primitive_polygonal && normalized_depth_control.backface_enable;
|
||||||
// Per-face masks not supported by Direct3D 12, choose the back face
|
// Per-face masks not supported by Direct3D 12, choose the back face
|
||||||
// ones only if drawing only back faces.
|
// ones only if drawing only back faces.
|
||||||
Register stencil_ref_mask_reg;
|
Register stencil_ref_mask_reg;
|
||||||
|
@ -1507,18 +1510,23 @@ bool PipelineCache::GetCurrentStateDescription(
|
||||||
regs.Get<reg::RB_STENCILREFMASK>(stencil_ref_mask_reg);
|
regs.Get<reg::RB_STENCILREFMASK>(stencil_ref_mask_reg);
|
||||||
description_out.stencil_read_mask = stencil_ref_mask.stencilmask;
|
description_out.stencil_read_mask = stencil_ref_mask.stencilmask;
|
||||||
description_out.stencil_write_mask = stencil_ref_mask.stencilwritemask;
|
description_out.stencil_write_mask = stencil_ref_mask.stencilwritemask;
|
||||||
description_out.stencil_front_fail_op = rb_depthcontrol.stencilfail;
|
description_out.stencil_front_fail_op =
|
||||||
|
normalized_depth_control.stencilfail;
|
||||||
description_out.stencil_front_depth_fail_op =
|
description_out.stencil_front_depth_fail_op =
|
||||||
rb_depthcontrol.stencilzfail;
|
normalized_depth_control.stencilzfail;
|
||||||
description_out.stencil_front_pass_op = rb_depthcontrol.stencilzpass;
|
description_out.stencil_front_pass_op =
|
||||||
description_out.stencil_front_func = rb_depthcontrol.stencilfunc;
|
normalized_depth_control.stencilzpass;
|
||||||
|
description_out.stencil_front_func =
|
||||||
|
normalized_depth_control.stencilfunc;
|
||||||
if (stencil_backface_enable) {
|
if (stencil_backface_enable) {
|
||||||
description_out.stencil_back_fail_op = rb_depthcontrol.stencilfail_bf;
|
description_out.stencil_back_fail_op =
|
||||||
|
normalized_depth_control.stencilfail_bf;
|
||||||
description_out.stencil_back_depth_fail_op =
|
description_out.stencil_back_depth_fail_op =
|
||||||
rb_depthcontrol.stencilzfail_bf;
|
normalized_depth_control.stencilzfail_bf;
|
||||||
description_out.stencil_back_pass_op =
|
description_out.stencil_back_pass_op =
|
||||||
rb_depthcontrol.stencilzpass_bf;
|
normalized_depth_control.stencilzpass_bf;
|
||||||
description_out.stencil_back_func = rb_depthcontrol.stencilfunc_bf;
|
description_out.stencil_back_func =
|
||||||
|
normalized_depth_control.stencilfunc_bf;
|
||||||
} else {
|
} else {
|
||||||
description_out.stencil_back_fail_op =
|
description_out.stencil_back_fail_op =
|
||||||
description_out.stencil_front_fail_op;
|
description_out.stencil_front_fail_op;
|
||||||
|
|
|
@ -31,6 +31,7 @@
|
||||||
#include "xenia/gpu/gpu_flags.h"
|
#include "xenia/gpu/gpu_flags.h"
|
||||||
#include "xenia/gpu/primitive_processor.h"
|
#include "xenia/gpu/primitive_processor.h"
|
||||||
#include "xenia/gpu/register_file.h"
|
#include "xenia/gpu/register_file.h"
|
||||||
|
#include "xenia/gpu/registers.h"
|
||||||
#include "xenia/gpu/xenos.h"
|
#include "xenia/gpu/xenos.h"
|
||||||
#include "xenia/ui/d3d12/d3d12_api.h"
|
#include "xenia/ui/d3d12/d3d12_api.h"
|
||||||
|
|
||||||
|
@ -74,7 +75,8 @@ class PipelineCache {
|
||||||
const Shader& shader,
|
const Shader& shader,
|
||||||
Shader::HostVertexShaderType host_vertex_shader_type) const;
|
Shader::HostVertexShaderType host_vertex_shader_type) const;
|
||||||
DxbcShaderTranslator::Modification GetCurrentPixelShaderModification(
|
DxbcShaderTranslator::Modification GetCurrentPixelShaderModification(
|
||||||
const Shader& shader) const;
|
const Shader& shader,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control) const;
|
||||||
|
|
||||||
// If draw_util::IsRasterizationPotentiallyDone is false, the pixel shader
|
// If draw_util::IsRasterizationPotentiallyDone is false, the pixel shader
|
||||||
// MUST be made nullptr BEFORE calling this!
|
// MUST be made nullptr BEFORE calling this!
|
||||||
|
@ -82,6 +84,7 @@ class PipelineCache {
|
||||||
D3D12Shader::D3D12Translation* vertex_shader,
|
D3D12Shader::D3D12Translation* vertex_shader,
|
||||||
D3D12Shader::D3D12Translation* pixel_shader,
|
D3D12Shader::D3D12Translation* pixel_shader,
|
||||||
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
uint32_t normalized_color_mask,
|
uint32_t normalized_color_mask,
|
||||||
uint32_t bound_depth_and_color_render_target_bits,
|
uint32_t bound_depth_and_color_render_target_bits,
|
||||||
const uint32_t* bound_depth_and_color_render_targets_formats,
|
const uint32_t* bound_depth_and_color_render_targets_formats,
|
||||||
|
@ -248,6 +251,7 @@ class PipelineCache {
|
||||||
D3D12Shader::D3D12Translation* vertex_shader,
|
D3D12Shader::D3D12Translation* vertex_shader,
|
||||||
D3D12Shader::D3D12Translation* pixel_shader,
|
D3D12Shader::D3D12Translation* pixel_shader,
|
||||||
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
const PrimitiveProcessor::ProcessingResult& primitive_processing_result,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
uint32_t normalized_color_mask,
|
uint32_t normalized_color_mask,
|
||||||
uint32_t bound_depth_and_color_render_target_bits,
|
uint32_t bound_depth_and_color_render_target_bits,
|
||||||
const uint32_t* bound_depth_and_color_render_target_formats,
|
const uint32_t* bound_depth_and_color_render_target_formats,
|
||||||
|
|
|
@ -63,6 +63,27 @@ bool IsRasterizationPotentiallyDone(const RegisterFile& regs,
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
reg::RB_DEPTHCONTROL GetNormalizedDepthControl(const RegisterFile& regs) {
|
||||||
|
xenos::ModeControl edram_mode = regs.Get<reg::RB_MODECONTROL>().edram_mode;
|
||||||
|
if (edram_mode != xenos::ModeControl::kColorDepth &&
|
||||||
|
edram_mode != xenos::ModeControl::kDepth) {
|
||||||
|
// Both depth and stencil disabled (EDRAM depth and stencil ignored).
|
||||||
|
reg::RB_DEPTHCONTROL disabled;
|
||||||
|
disabled.value = 0;
|
||||||
|
return disabled;
|
||||||
|
}
|
||||||
|
reg::RB_DEPTHCONTROL depthcontrol = regs.Get<reg::RB_DEPTHCONTROL>();
|
||||||
|
// For more reliable skipping of depth render target management for draws not
|
||||||
|
// requiring depth.
|
||||||
|
if (depthcontrol.z_enable && !depthcontrol.z_write_enable &&
|
||||||
|
depthcontrol.zfunc == xenos::CompareFunction::kAlways) {
|
||||||
|
depthcontrol.z_enable = 0;
|
||||||
|
}
|
||||||
|
// Stencil is more complex and is expected to be usually enabled explicitly
|
||||||
|
// when needed.
|
||||||
|
return depthcontrol;
|
||||||
|
}
|
||||||
|
|
||||||
// https://docs.microsoft.com/en-us/windows/win32/api/d3d11/ne-d3d11-d3d11_standard_multisample_quality_levels
|
// https://docs.microsoft.com/en-us/windows/win32/api/d3d11/ne-d3d11-d3d11_standard_multisample_quality_levels
|
||||||
const int8_t kD3D10StandardSamplePositions2x[2][2] = {{4, 4}, {-4, -4}};
|
const int8_t kD3D10StandardSamplePositions2x[2][2] = {{4, 4}, {-4, -4}};
|
||||||
const int8_t kD3D10StandardSamplePositions4x[4][2] = {
|
const int8_t kD3D10StandardSamplePositions4x[4][2] = {
|
||||||
|
@ -148,6 +169,7 @@ bool IsPixelShaderNeededWithRasterization(const Shader& shader,
|
||||||
void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale_x,
|
void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale_x,
|
||||||
uint32_t resolution_scale_y, bool origin_bottom_left,
|
uint32_t resolution_scale_y, bool origin_bottom_left,
|
||||||
uint32_t x_max, uint32_t y_max, bool allow_reverse_z,
|
uint32_t x_max, uint32_t y_max, bool allow_reverse_z,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
bool convert_z_to_float24, bool full_float24_in_0_to_1,
|
bool convert_z_to_float24, bool full_float24_in_0_to_1,
|
||||||
bool pixel_shader_writes_depth,
|
bool pixel_shader_writes_depth,
|
||||||
ViewportInfo& viewport_info_out) {
|
ViewportInfo& viewport_info_out) {
|
||||||
|
@ -497,7 +519,7 @@ void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale_x,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (GetDepthControlForCurrentEdramMode(regs).z_enable &&
|
if (normalized_depth_control.z_enable &&
|
||||||
regs.Get<reg::RB_DEPTH_INFO>().depth_format ==
|
regs.Get<reg::RB_DEPTH_INFO>().depth_format ==
|
||||||
xenos::DepthRenderTargetFormat::kD24FS8) {
|
xenos::DepthRenderTargetFormat::kD24FS8) {
|
||||||
if (convert_z_to_float24) {
|
if (convert_z_to_float24) {
|
||||||
|
|
|
@ -84,18 +84,7 @@ bool IsRasterizationPotentiallyDone(const RegisterFile& regs,
|
||||||
extern const int8_t kD3D10StandardSamplePositions2x[2][2];
|
extern const int8_t kD3D10StandardSamplePositions2x[2][2];
|
||||||
extern const int8_t kD3D10StandardSamplePositions4x[4][2];
|
extern const int8_t kD3D10StandardSamplePositions4x[4][2];
|
||||||
|
|
||||||
inline reg::RB_DEPTHCONTROL GetDepthControlForCurrentEdramMode(
|
reg::RB_DEPTHCONTROL GetNormalizedDepthControl(const RegisterFile& regs);
|
||||||
const RegisterFile& regs) {
|
|
||||||
xenos::ModeControl edram_mode = regs.Get<reg::RB_MODECONTROL>().edram_mode;
|
|
||||||
if (edram_mode != xenos::ModeControl::kColorDepth &&
|
|
||||||
edram_mode != xenos::ModeControl::kDepth) {
|
|
||||||
// Both depth and stencil disabled (EDRAM depth and stencil ignored).
|
|
||||||
reg::RB_DEPTHCONTROL disabled;
|
|
||||||
disabled.value = 0;
|
|
||||||
return disabled;
|
|
||||||
}
|
|
||||||
return regs.Get<reg::RB_DEPTHCONTROL>();
|
|
||||||
}
|
|
||||||
|
|
||||||
constexpr float GetD3D10PolygonOffsetFactor(
|
constexpr float GetD3D10PolygonOffsetFactor(
|
||||||
xenos::DepthRenderTargetFormat depth_format, bool float24_as_0_to_0_5) {
|
xenos::DepthRenderTargetFormat depth_format, bool float24_as_0_to_0_5) {
|
||||||
|
@ -183,6 +172,7 @@ struct ViewportInfo {
|
||||||
void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale_x,
|
void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale_x,
|
||||||
uint32_t resolution_scale_y, bool origin_bottom_left,
|
uint32_t resolution_scale_y, bool origin_bottom_left,
|
||||||
uint32_t x_max, uint32_t y_max, bool allow_reverse_z,
|
uint32_t x_max, uint32_t y_max, bool allow_reverse_z,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
bool convert_z_to_float24, bool full_float24_in_0_to_1,
|
bool convert_z_to_float24, bool full_float24_in_0_to_1,
|
||||||
bool pixel_shader_writes_depth,
|
bool pixel_shader_writes_depth,
|
||||||
ViewportInfo& viewport_info_out);
|
ViewportInfo& viewport_info_out);
|
||||||
|
|
|
@ -2,7 +2,7 @@
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* Xenia : Xbox 360 Emulator Research Project *
|
* Xenia : Xbox 360 Emulator Research Project *
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* Copyright 2021 Ben Vanik. All rights reserved. *
|
* Copyright 2022 Ben Vanik. All rights reserved. *
|
||||||
* Released under the BSD license - see LICENSE in the root for more details. *
|
* Released under the BSD license - see LICENSE in the root for more details. *
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
@ -366,6 +366,7 @@ void RenderTargetCache::ClearCache() {
|
||||||
void RenderTargetCache::BeginFrame() { ResetAccumulatedRenderTargets(); }
|
void RenderTargetCache::BeginFrame() { ResetAccumulatedRenderTargets(); }
|
||||||
|
|
||||||
bool RenderTargetCache::Update(bool is_rasterization_done,
|
bool RenderTargetCache::Update(bool is_rasterization_done,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
uint32_t normalized_color_mask) {
|
uint32_t normalized_color_mask) {
|
||||||
const RegisterFile& regs = register_file();
|
const RegisterFile& regs = register_file();
|
||||||
bool interlock_barrier_only = GetPath() == Path::kPixelShaderInterlock;
|
bool interlock_barrier_only = GetPath() == Path::kPixelShaderInterlock;
|
||||||
|
@ -429,8 +430,8 @@ bool RenderTargetCache::Update(bool is_rasterization_done,
|
||||||
uint32_t rts_are_64bpp = 0;
|
uint32_t rts_are_64bpp = 0;
|
||||||
uint32_t color_rts_are_gamma = 0;
|
uint32_t color_rts_are_gamma = 0;
|
||||||
if (is_rasterization_done) {
|
if (is_rasterization_done) {
|
||||||
auto rb_depthcontrol = draw_util::GetDepthControlForCurrentEdramMode(regs);
|
if (normalized_depth_control.z_enable ||
|
||||||
if (rb_depthcontrol.z_enable || rb_depthcontrol.stencil_enable) {
|
normalized_depth_control.stencil_enable) {
|
||||||
depth_and_color_rts_used_bits |= 1;
|
depth_and_color_rts_used_bits |= 1;
|
||||||
auto rb_depth_info = regs.Get<reg::RB_DEPTH_INFO>();
|
auto rb_depth_info = regs.Get<reg::RB_DEPTH_INFO>();
|
||||||
// std::min for safety, to avoid negative numbers in case it's completely
|
// std::min for safety, to avoid negative numbers in case it's completely
|
||||||
|
|
|
@ -2,7 +2,7 @@
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* Xenia : Xbox 360 Emulator Research Project *
|
* Xenia : Xbox 360 Emulator Research Project *
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* Copyright 2021 Ben Vanik. All rights reserved. *
|
* Copyright 2022 Ben Vanik. All rights reserved. *
|
||||||
* Released under the BSD license - see LICENSE in the root for more details. *
|
* Released under the BSD license - see LICENSE in the root for more details. *
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
@ -23,6 +23,7 @@
|
||||||
#include "xenia/base/cvar.h"
|
#include "xenia/base/cvar.h"
|
||||||
#include "xenia/gpu/draw_util.h"
|
#include "xenia/gpu/draw_util.h"
|
||||||
#include "xenia/gpu/register_file.h"
|
#include "xenia/gpu/register_file.h"
|
||||||
|
#include "xenia/gpu/registers.h"
|
||||||
#include "xenia/gpu/xenos.h"
|
#include "xenia/gpu/xenos.h"
|
||||||
|
|
||||||
DECLARE_bool(depth_transfer_not_equal_test);
|
DECLARE_bool(depth_transfer_not_equal_test);
|
||||||
|
@ -215,6 +216,7 @@ class RenderTargetCache {
|
||||||
virtual void BeginFrame();
|
virtual void BeginFrame();
|
||||||
|
|
||||||
virtual bool Update(bool is_rasterization_done,
|
virtual bool Update(bool is_rasterization_done,
|
||||||
|
reg::RB_DEPTHCONTROL normalized_depth_control,
|
||||||
uint32_t normalized_color_mask);
|
uint32_t normalized_color_mask);
|
||||||
|
|
||||||
// Returns bits where 0 is whether a depth render target is currently bound on
|
// Returns bits where 0 is whether a depth render target is currently bound on
|
||||||
|
|
Loading…
Reference in New Issue