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Do not check if we should show the prefetchw error message if we already have an avx error message. 

mtmsrd writes the EE bit only now.
This commit is contained in:
chss95cs@gmail.com 2023-04-02 14:26:01 -04:00
parent e9d1e51c32
commit 356300d14c
2 changed files with 17 additions and 8 deletions
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15
src/xenia/base/main_init_win.cc
View File

@ -25,12 +25,15 @@ class StartupCpuFeatureCheck {
"the "
"FAQ for system requirements at https://xenia.jp";
}
unsigned int data[4];
Xbyak::util::Cpu::getCpuid(0x80000001, data);
if (!(data[2] & (1U << 8))) {
error_message =
"Your cpu does not support PrefetchW, which Xenia Canary "
"requires.";
if (!error_message) {
unsigned int data[4];
Xbyak::util::Cpu::getCpuid(0x80000001, data);
if (!(data[2] & (1U << 8))) {
error_message =
"Your cpu does not support PrefetchW, which Xenia Canary "
"requires.";
}
}
if (error_message == nullptr) {
return;

10
src/xenia/cpu/ppc/ppc_emit_control.cc
View File

@ -807,8 +807,14 @@ int InstrEmit_mtmsr(PPCHIRBuilder& f, const InstrData& i) {
int InstrEmit_mtmsrd(PPCHIRBuilder& f, const InstrData& i) {
//todo: this is moving msr under a mask, so only writing EE and RI
f.StoreContext(offsetof(PPCContext, scratch),
f.ZeroExtend(f.LoadGPR(i.X.RT), INT64_TYPE));
Value* from = f.LoadGPR(i.X.RT);
Value* mtmsrd_mask = f.LoadConstantUint64((1ULL << 15));
Value* msr = f.LoadContext(offsetof(PPCContext, msr), INT64_TYPE);
Value* new_msr = f.Or(f.And(from, mtmsrd_mask), f.AndNot(msr, mtmsrd_mask));
f.StoreContext(offsetof(PPCContext, msr), new_msr);
return 0;
}