From 356300d14cf86261d6a77125bbc0a4fc02d65247 Mon Sep 17 00:00:00 2001 From: "chss95cs@gmail.com" Date: Sun, 2 Apr 2023 14:26:01 -0400 Subject: [PATCH] Do not check if we should show the prefetchw error message if we already have an avx error message. mtmsrd writes the EE bit only now. --- src/xenia/base/main_init_win.cc | 15 +++++++++------ src/xenia/cpu/ppc/ppc_emit_control.cc | 10 ++++++++-- 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/src/xenia/base/main_init_win.cc b/src/xenia/base/main_init_win.cc index 6335958d2..9e5ddbb97 100644 --- a/src/xenia/base/main_init_win.cc +++ b/src/xenia/base/main_init_win.cc @@ -25,12 +25,15 @@ class StartupCpuFeatureCheck { "the " "FAQ for system requirements at https://xenia.jp"; } - unsigned int data[4]; - Xbyak::util::Cpu::getCpuid(0x80000001, data); - if (!(data[2] & (1U << 8))) { - error_message = - "Your cpu does not support PrefetchW, which Xenia Canary " - "requires."; + + if (!error_message) { + unsigned int data[4]; + Xbyak::util::Cpu::getCpuid(0x80000001, data); + if (!(data[2] & (1U << 8))) { + error_message = + "Your cpu does not support PrefetchW, which Xenia Canary " + "requires."; + } } if (error_message == nullptr) { return; diff --git a/src/xenia/cpu/ppc/ppc_emit_control.cc b/src/xenia/cpu/ppc/ppc_emit_control.cc index a57e7ca85..241dcf4af 100644 --- a/src/xenia/cpu/ppc/ppc_emit_control.cc +++ b/src/xenia/cpu/ppc/ppc_emit_control.cc @@ -807,8 +807,14 @@ int InstrEmit_mtmsr(PPCHIRBuilder& f, const InstrData& i) { int InstrEmit_mtmsrd(PPCHIRBuilder& f, const InstrData& i) { //todo: this is moving msr under a mask, so only writing EE and RI - f.StoreContext(offsetof(PPCContext, scratch), - f.ZeroExtend(f.LoadGPR(i.X.RT), INT64_TYPE)); + + Value* from = f.LoadGPR(i.X.RT); + Value* mtmsrd_mask = f.LoadConstantUint64((1ULL << 15)); + Value* msr = f.LoadContext(offsetof(PPCContext, msr), INT64_TYPE); + + Value* new_msr = f.Or(f.And(from, mtmsrd_mask), f.AndNot(msr, mtmsrd_mask)); + + f.StoreContext(offsetof(PPCContext, msr), new_msr); return 0; }