mirror of https://github.com/xemu-project/xemu.git
1371 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Fabiano Rosas
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e33b6712db |
tests/qtest/migration: Add a wrapper to print test names
Our usage of gtest results in us losing the very basic functionality
of "knowing which test failed". The issue is that gtest only prints
test names ("paths" in gtest parlance) once the test has finished, but
we use asserts in the tests and crash gtest itself before it can print
anything. We also use a final abort when the result of g_test_run is
not 0.
Depending on how the test failed/broke we can see the function that
trigged the abort, which may be representative of the test, but it
could also just be some generic function.
We have been relying on the primitive method of looking at the name of
the previous successful test and then looking at the code to figure
out which test should have come next.
Add a wrapper to the test registration that does the job of printing
the test name before running.
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Peter Xu <peterx@redhat.com>
Link: https://lore.kernel.org/r/20240104142144.9680-7-farosas@suse.de
Signed-off-by: Peter Xu <peterx@redhat.com>
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Fabiano Rosas
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679a7382a3 |
tests/qtest/migration: Print migration incoming errors
We're currently just asserting when incoming migration fails. Let's print the error message from QMP as well. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/20240104142144.9680-6-farosas@suse.de Signed-off-by: Peter Xu <peterx@redhat.com> |
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Inès Varhol
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a96bff6157 |
tests/qtest: Add STM32L4x5 SYSCFG QTest testcase
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240109194438.70934-4-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Inès Varhol
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4cb445717e |
tests/qtest: Add STM32L4x5 EXTI QTest testcase
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240109160658.311932-4-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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977542ded7 |
testing and misc updates
- add LE microblaze test to avocado - use modern snapshot=on to avoid trashing disk image - use plain bool for fe_is_open - various updates to qtest timeouts - enable meson test timeouts - tweak the readthedocs environment - partially revert un-flaking x86_64 -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmWhPccACgkQ+9DbCVqe KkS5agf+OoW6HOitt34YeL6cGGtIKaxbta+Fs6jq+ucIbN63TmLTuKrmPiRNxjuo Fj2Qvh9R7Tl7Q/a7ZAym0Fze7GtsvvsidkiQS4pmi9vYuJrhS734CxXHT8JS6zJr ymQ0nGZODg1cVB4oAR9sXo/OwEQdDTSgKp8wdNr930fxYwokUKBUgcOqElu3SWHv duSYDuaflnP5B8ZGbb1ZnOlwS9lZIHTwjZyN5J1YtxF0T8Ez4A+xseEOpQ/00MoE Ecjdp3ELCxzOI+1U33Yni7ol//fxQpRKi+xf2fGIxhuSA3i32rmY5NWTvl7VwuS1 gXryjX2rukSujySP3vkdtTp0dmkbpg== =ZuDd -----END PGP SIGNATURE----- Merge tag 'pull-testing-updates-120124-2' of https://gitlab.com/stsquad/qemu into staging testing and misc updates - add LE microblaze test to avocado - use modern snapshot=on to avoid trashing disk image - use plain bool for fe_is_open - various updates to qtest timeouts - enable meson test timeouts - tweak the readthedocs environment - partially revert un-flaking x86_64 # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmWhPccACgkQ+9DbCVqe # KkS5agf+OoW6HOitt34YeL6cGGtIKaxbta+Fs6jq+ucIbN63TmLTuKrmPiRNxjuo # Fj2Qvh9R7Tl7Q/a7ZAym0Fze7GtsvvsidkiQS4pmi9vYuJrhS734CxXHT8JS6zJr # ymQ0nGZODg1cVB4oAR9sXo/OwEQdDTSgKp8wdNr930fxYwokUKBUgcOqElu3SWHv # duSYDuaflnP5B8ZGbb1ZnOlwS9lZIHTwjZyN5J1YtxF0T8Ez4A+xseEOpQ/00MoE # Ecjdp3ELCxzOI+1U33Yni7ol//fxQpRKi+xf2fGIxhuSA3i32rmY5NWTvl7VwuS1 # gXryjX2rukSujySP3vkdtTp0dmkbpg== # =ZuDd # -----END PGP SIGNATURE----- # gpg: Signature made Fri 12 Jan 2024 13:25:27 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-testing-updates-120124-2' of https://gitlab.com/stsquad/qemu: (22 commits) tests/avocado: partially revert unmasking of replay_linux tests readthodocs: fully specify a build environment mtest2make: stop disabling meson test timeouts tests/fp: Bump fp-test-mulAdd test timeout to 3 minutes tests/unit: Bump test-crypto-block test timeout to 5 minutes tests/unit: Bump test-aio-multithread test timeout to 2 minutes tests/qtest: Bump the device-introspect-test timeout to 12 minutes qtest: bump bios-table-test timeout to 9 minutes qtest: bump aspeed_smc-test timeout to 6 minutes qtest: bump qos-test timeout to 2 minutes qtest: bump boot-serial-test timeout to 3 minutes qtest: bump prom-env-test timeout to 6 minutes qtest: bump pxe-test timeout to 10 minutes qtest: bump test-hmp timeout to 4 minutes qtest: bump npcm7xx_pwm-test timeout to 5 minutes qtest: bump qom-test timeout to 15 minutes qtest: bump migration-test timeout to 8 minutes qtest: bump min meson timeout to 60 seconds chardev: use bool for fe_is_open gitlab: include microblazeel in testing ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Thomas Huth
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50dfa7ca48 |
tests/qtest: Bump the device-introspect-test timeout to 12 minutes
When running the test in slow mode on a very loaded system with the arm/aarch64 target and with --enable-debug, it can take longer than 10 minutes to finish the introspection test. Bump the timeout to twelve minutes to make sure that it also finishes in such situations. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-13-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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794876fb52 |
qtest: bump bios-table-test timeout to 9 minutes
This is reliably hitting the current 2 minute timeout in GitLab CI, and for the TCI job, it even hits a 6 minute timeout. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20230717182859.707658-12-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-12-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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e8a12fe31f |
qtest: bump aspeed_smc-test timeout to 6 minutes
On a loaded system with --enable-debug, this test can take longer than 5 minutes. Raising the timeout to 6 minutes gives greater headroom for such situations. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> [thuth: Increase the timeout to 6 minutes for very loaded systems] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-11-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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f6bee9c2f2 |
qtest: bump qos-test timeout to 2 minutes
The qos-test takes just under 1 minute in a --enable-debug build. Bumping to 2 minutes will give more headroom. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20230717182859.707658-10-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-10-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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93b6d67348 |
qtest: bump boot-serial-test timeout to 3 minutes
The boot-serial-test takes about 1 + 1/2 minutes in a --enable-debug build. Bumping to 3 minutes will give more headroom. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20230717182859.707658-9-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-9-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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8911563900 |
qtest: bump prom-env-test timeout to 6 minutes
The prom-env-test can take more than 5 minutes in a --enable-debug build on a loaded system. Bumping to 6 minutes will give more headroom. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> [thuth: Bump timeout to 6 minutes instead of 3] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-8-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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17e164da12 |
qtest: bump pxe-test timeout to 10 minutes
The pxe-test uses the boot_sector_test() function, and that already uses a timeout of 600 seconds. So adjust the timeout on the meson side accordingly. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> [thuth: Bump timeout to 600s and adjust commit description] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-7-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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f6d8d0e542 |
qtest: bump test-hmp timeout to 4 minutes
The hmp test takes just under 3 minutes in a --enable-debug build. Bumping to 4 minutes will give more headroom. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20230717182859.707658-6-berrange@redhat.com> [thuth: fix copy-n-paste error in the description] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-6-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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d05328bcb0 |
qtest: bump npcm7xx_pwm-test timeout to 5 minutes
The npcm7xx_pwm-test takes 3 & 1/2 minutes in a --enable-debug build. Bumping to 5 minutes will give more headroom. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20230717182859.707658-5-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-5-thuth@redhat.com> [AJB: s/pwn/pwm] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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cb2218ab16 |
qtest: bump qom-test timeout to 15 minutes
The qom-test is periodically hitting the 5 minute timeout when running on the aarch64 emulator under GitLab CI. With an --enable-debug build it can take over 10 minutes for arm/aarch64 targets. Setting timeout to 15 minutes gives enough headroom to hopefully make it reliable. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20230717182859.707658-4-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-4-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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7071795114 |
qtest: bump migration-test timeout to 8 minutes
The migration test should take between 1 min 30 and 2 mins on reasonably modern hardware. The test is not especially compute bound, rather its running time is dominated by the guest RAM size relative to the bandwidth cap, which forces each iteration to take at least 30 seconds. None the less under high load conditions with multiple QEMU processes spawned and competing with other parallel tests, the worst case running time might be somewhat extended. Bumping the timeout to 8 minutes gives us good headroom, while still catching stuck tests relatively quickly. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20230717182859.707658-3-berrange@redhat.com> [thuth: Bump timeout to 8 minutes to make it work on very loaded systems, too] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-3-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Daniel P. Berrangé
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9eb95e5c56 |
qtest: bump min meson timeout to 60 seconds
Even some of the relatively fast qtests can sometimes hit the 30 second timeout in GitLab CI under high parallelism/load conditions. Bump the min to 60 seconds to give a higher margin for reliability. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20230717182859.707658-2-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231215070357.10888-2-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
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Samuel Tardieu
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c98873ee4a |
tests/qtest/virtio-ccw: Fix device presence checking
An apparent copy-paste error tests for the presence of the
virtio-rng-ccw device in order to perform tests on the virtio-scsi-ccw
device.
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Message-ID: <20240106130121.1244993-1-sam@rfc1149.net>
Fixes:
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Daniel P. Berrangé
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f51d3fb14d |
qtest: ensure netdev-socket tests have non-overlapping names
When naming glib tests if the name of one test is a substring of the name of another test, it is not possible to use the '-p /the/name' option to run a single test. Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com> Message-ID: <20240104162942.211458-7-berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Daniel P. Berrangé
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cc91ca64d8 |
net: add explicit info about connecting/listening state
When running 'info network', if the stream backend is still in the process of connecting, or waiting for an incoming connection, no information is displayed. There is also no way to distinguish whether the server is still in the process of setting up the listener socket, or whether it is ready to accept incoming client connections. This leads to a race condition in the netdev-socket qtest which launches a server process followed by a client process. Under high load conditions it is possible for the client to attempt to connect before the server is accepting clients. For the scenarios which do not set the 'reconnect' option, this opens up a race which can lead to the test scenario failing to reach the expected state. Now that 'info network' can distinguish between initialization phase and the listening phase, the netdev-socket qtest will correctly synchronize, such that the client QEMU is not spawned until the server is ready. This should solve the non-deterministic failures seen with the netdev-socket qtest. Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com> Message-ID: <20240104162942.211458-5-berrange@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Daniel P. Berrangé
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a298293866 |
Revert "tests/qtest/netdev-socket: Raise connection timeout to 120 seconds"
This reverts commit
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Daniel P. Berrangé
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9f7ac8e869 |
Revert "netdev: set timeout depending on loadavg"
This reverts commit
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Daniel P. Berrangé
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b01932889d |
qtest: use correct boolean type for failover property
QMP device_add does not historically validate the parameter types. At some point it will likely change to enforce correct types, to match behaviour of -device. The failover property is expected to be a boolean in JSON. Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com> Message-ID: <20240103123005.2400437-1-berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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c8193acc07 |
migration 1st pull for 9.0
- We lost Juan and Leo in the maintainers file - Steven's suspend state fix - Steven's fix for coverity on migrate_mode - Avihai's migration cleanup series -----BEGIN PGP SIGNATURE----- iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZZY0TxIccGV0ZXJ4QHJl ZGhhdC5jb20ACgkQO1/MzfOr1wbSxgEAoM5g3wkc22lpAlRpU+hJUqT9NVOVQSK+ Fk7XJYTdSgABAKzykA6hAmU5Kj+yVI6jI874SVZbs2FWpFs4osvsKk4D =sfuM -----END PGP SIGNATURE----- Merge tag 'migration-20240104-pull-request' of https://gitlab.com/peterx/qemu into staging migration 1st pull for 9.0 - We lost Juan and Leo in the maintainers file - Steven's suspend state fix - Steven's fix for coverity on migrate_mode - Avihai's migration cleanup series # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZZY0TxIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wbSxgEAoM5g3wkc22lpAlRpU+hJUqT9NVOVQSK+ # Fk7XJYTdSgABAKzykA6hAmU5Kj+yVI6jI874SVZbs2FWpFs4osvsKk4D # =sfuM # -----END PGP SIGNATURE----- # gpg: Signature made Thu 04 Jan 2024 04:30:07 GMT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [unknown] # gpg: aka "Peter Xu <peterx@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'migration-20240104-pull-request' of https://gitlab.com/peterx/qemu: (26 commits) migration: fix coverity migrate_mode finding migration/multifd: Remove unnecessary usage of local Error migration: Remove unnecessary usage of local Error migration: Fix migration_channel_read_peek() error path migration/multifd: Remove error_setg() in migration_ioc_process_incoming() migration/multifd: Fix leaking of Error in TLS error flow migration/multifd: Simplify multifd_channel_connect() if else statement migration/multifd: Fix error message in multifd_recv_initial_packet() migration: Remove errp parameter in migration_fd_process_incoming() migration: Refactor migration_incoming_setup() migration: Remove nulling of hostname in migrate_init() migration: Remove migrate_max_downtime() declaration tests/qtest: postcopy migration with suspend tests/qtest: precopy migration with suspend tests/qtest: option to suspend during migration tests/qtest: migration events migration: preserve suspended for bg_migration migration: preserve suspended for snapshot migration: preserve suspended runstate migration: propagate suspended runstate ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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05470c3979 |
* configure: use a native non-cross compiler for linux-user
* meson: cleanups * target/i386: miscellaneous cleanups and optimizations * target/i386: implement CMPccXADD * target/i386: the sgx_epc_get_section stub is reachable * esp: check for NULL result from scsi_device_find() -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmWRImYUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNd7AgAgcyJGiMfUkXqhefplpm06RDXQIa8 FuoJqPb21lO75DQKfaFRAc4xGLagjJROMJGHMm9HvMu2VlwvOydkQlfFRspENxQ/ 5XzGdb/X0A7HA/mwUfnMB1AZx0Vs32VI5IBSc6acc9fmgeZ84XQEoM3KBQHUik7X mSkE4eltR9gJ+4IaGo4voZtK+YoVD8nEcuqmnKihSPWizev0FsZ49aNMtaYa9qC/ Xs3kiQd/zPibHDHJu0ulFsNZgxtUcvlLHTCf8gO4dHWxCFLXGubMush83McpRtNB Qoh6cTLH+PBXfrxMR3zmTZMNvo8Euls3s07Y8TkNP4vdIIE/kMeMDW1wJw== =mq30 -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * configure: use a native non-cross compiler for linux-user * meson: cleanups * target/i386: miscellaneous cleanups and optimizations * target/i386: implement CMPccXADD * target/i386: the sgx_epc_get_section stub is reachable * esp: check for NULL result from scsi_device_find() # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmWRImYUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNd7AgAgcyJGiMfUkXqhefplpm06RDXQIa8 # FuoJqPb21lO75DQKfaFRAc4xGLagjJROMJGHMm9HvMu2VlwvOydkQlfFRspENxQ/ # 5XzGdb/X0A7HA/mwUfnMB1AZx0Vs32VI5IBSc6acc9fmgeZ84XQEoM3KBQHUik7X # mSkE4eltR9gJ+4IaGo4voZtK+YoVD8nEcuqmnKihSPWizev0FsZ49aNMtaYa9qC/ # Xs3kiQd/zPibHDHJu0ulFsNZgxtUcvlLHTCf8gO4dHWxCFLXGubMush83McpRtNB # Qoh6cTLH+PBXfrxMR3zmTZMNvo8Euls3s07Y8TkNP4vdIIE/kMeMDW1wJw== # =mq30 # -----END PGP SIGNATURE----- # gpg: Signature made Sun 31 Dec 2023 08:12:22 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits) meson.build: report graphics backends separately configure, meson: rename targetos to host_os meson: rename config_all meson: remove CONFIG_ALL meson: remove config_targetos meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos meson: remove OS definitions from config_targetos meson: always probe u2f and canokey if the option is enabled meson: move subdirs to "Collect sources" section meson: move config-host.h definitions together meson: move CFI detection code with other compiler flags meson: keep subprojects together meson: move accelerator dependency checks together meson: move option validation together meson: move program checks together meson: add more sections to main meson.build configure: unify again the case arms in probe_target_compiler configure: remove unnecessary subshell Makefile: clean qemu-iotests output meson: use version_compare() to compare version ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Steve Sistare
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2b58a8b963 |
tests/qtest: postcopy migration with suspend
Add a test case to verify that the suspended state is handled correctly by live migration postcopy. The test suspends the src, migrates, then wakes the dest. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1704312341-66640-13-git-send-email-steven.sistare@oracle.com Signed-off-by: Peter Xu <peterx@redhat.com> |
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Steve Sistare
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b1fdd21e8c |
tests/qtest: precopy migration with suspend
Add a test case to verify that the suspended state is handled correctly during live migration precopy. The test suspends the src, migrates, then wakes the dest. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1704312341-66640-12-git-send-email-steven.sistare@oracle.com Signed-off-by: Peter Xu <peterx@redhat.com> |
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Steve Sistare
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5014478e0d |
tests/qtest: option to suspend during migration
Add an option to suspend the src in a-b-bootblock.S, which puts the guest in S3 state after one round of writing to memory. The option is enabled by poking a 1 into the suspend_me word in the boot block prior to starting the src vm. Generate symbol offsets in a-b-bootblock.h so that the suspend_me offset is known. Generate the bootblock for each test, because suspend_me may differ for each. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/1704312341-66640-11-git-send-email-steven.sistare@oracle.com Signed-off-by: Peter Xu <peterx@redhat.com> |
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Steve Sistare
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f0649758be |
tests/qtest: migration events
Define a state object to capture events seen by migration tests, to allow more events to be captured in a subsequent patch, and simplify event checking in wait_for_migration_pass. No functional change. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com> Link: https://lore.kernel.org/r/1704312341-66640-10-git-send-email-steven.sistare@oracle.com Signed-off-by: Peter Xu <peterx@redhat.com> |
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Paolo Bonzini
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d0cda6f461 |
configure, meson: rename targetos to host_os
This variable is about the host OS, not the target. It is used a lot more since the Meson conversion, but the original sin dates back to 2003. Time to fix it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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cfc1a889e5 |
meson: rename config_all
config_all now lists only accelerators, rename it to indicate its actual content. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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1220f5813a |
meson: remove config_targetos
config_targetos is now empty and can be removed; its use in sourcesets that do not involve target-specific files can be replaced with an empty dictionary. In fact, at this point *all* sourcesets that do not involve target-specific files are just glorified mutable arrays. Enforce that they never test for symbols in "when:" by computing the set of files without "strict: false". Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Zhao Liu
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c40db4ba60 |
tests: bios-tables-test: Rename smbios type 4 related test functions
In fact, type4-count, core-count, core-count2, thread-count and thread-count2 are tested with KVM not TCG. Rename these test functions to reflect KVM base instead of TCG. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231127160202.1037290-1-zhao1.liu@linux.intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Thomas Huth
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71dc6ca2a8 |
tests/qtest/npcm7xx_pwm-test: Only do full testing in slow mode
The npcm7xx_pwm-test can take quite a while when running with --enable-debug on a loaded system. The tests here are quite repetitive - by default it should be fine if we only execute some of them and only execute all when running in slow testing mode. Message-ID: <20231215143524.49241-1-thuth@redhat.com> Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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81c2c9dd5d |
tests/qtest/migration-test: Fix analyze-migration.py for s390x
The migration stream on s390x contains data for the storage_attributes which the analyze-migration.py cannot handle yet. Add the basic code for handling this, so we can re-enable the check in the migration-test. Message-ID: <20231120113951.162090-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Stefan Hajnoczi
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169c4e7764 |
* Fix wording in iotest 149
* Fix whitespace issues in sh4 code (ignore checkpatch.pl warnings here) * Make sure to check return values in qtests -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmVt4PwRHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbWhYxAAm6ww++qfCh5uLrKjXrv/ZS+b+8UVMT+p wOBNBz0RDpDahAwesxLABAg9b+fabLTx9OpOyQRgmM/ofCoW/Oi7xzCEwv9JPJX0 Kr7x5AMCTc2hPydxsMenWYZXLZXcc0HSkB+4yN5FTeOl8YPoRetegsGbiirGpod1 QyD/oLMZzBxqteF/m0a4gxEuwi3qgRVIOkdk8zeSBMAl6EUazsKR8sTrdCrkupHl ddMKjRH4Gr2sXoZ8L/mr4T5FodVxAF1pcZnVyPYDlVgNK/V0IWDcbmFFNr0rXxCM CZz7gIOZkpm/MXpVE9UEg++ZOQ16gDUNpvQRyNPgIn0vbiuF5kcXmUpstJWHDico O98wgH6im3iC7xyaMTOq3pjSb9RNP4cmIw77EKJyS93RDAgiCX0ozN3zEkxsvZYu hQadBd3TSUP6jxz2SWQ6irCwkElfozCc1cPfUyW0rFXjLqWei0UirWDdyN5dL8vk pkupZG5p3jiiZs1hm+TQ4W1CPVZFTAW+LcI7V/Na3EBKQvrjYDlHMQdx0NaJh5e3 xn84bvTnuYfT/I63z9zqIbMwPQ5t+lJaR9ohkn9Q4tTEnHuMV9svON5rsRc3YE6p XrR02G9zu4kVAKs51DFNWC9SLgviW+LB2DCe+e2CrqwPjiz+MeOVGEEre7/nnj/q clP7u3MyX5A= =rU6S -----END PGP SIGNATURE----- Merge tag 'pull-request-2023-12-04' of https://gitlab.com/thuth/qemu into staging * Fix wording in iotest 149 * Fix whitespace issues in sh4 code (ignore checkpatch.pl warnings here) * Make sure to check return values in qtests # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmVt4PwRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWhYxAAm6ww++qfCh5uLrKjXrv/ZS+b+8UVMT+p # wOBNBz0RDpDahAwesxLABAg9b+fabLTx9OpOyQRgmM/ofCoW/Oi7xzCEwv9JPJX0 # Kr7x5AMCTc2hPydxsMenWYZXLZXcc0HSkB+4yN5FTeOl8YPoRetegsGbiirGpod1 # QyD/oLMZzBxqteF/m0a4gxEuwi3qgRVIOkdk8zeSBMAl6EUazsKR8sTrdCrkupHl # ddMKjRH4Gr2sXoZ8L/mr4T5FodVxAF1pcZnVyPYDlVgNK/V0IWDcbmFFNr0rXxCM # CZz7gIOZkpm/MXpVE9UEg++ZOQ16gDUNpvQRyNPgIn0vbiuF5kcXmUpstJWHDico # O98wgH6im3iC7xyaMTOq3pjSb9RNP4cmIw77EKJyS93RDAgiCX0ozN3zEkxsvZYu # hQadBd3TSUP6jxz2SWQ6irCwkElfozCc1cPfUyW0rFXjLqWei0UirWDdyN5dL8vk # pkupZG5p3jiiZs1hm+TQ4W1CPVZFTAW+LcI7V/Na3EBKQvrjYDlHMQdx0NaJh5e3 # xn84bvTnuYfT/I63z9zqIbMwPQ5t+lJaR9ohkn9Q4tTEnHuMV9svON5rsRc3YE6p # XrR02G9zu4kVAKs51DFNWC9SLgviW+LB2DCe+e2CrqwPjiz+MeOVGEEre7/nnj/q # clP7u3MyX5A= # =rU6S # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Dec 2023 09:23:56 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-12-04' of https://gitlab.com/thuth/qemu: tests/qtest: check the return value sh4: Coding style: Remove tabs tests/qemu-iotests/149: Use more inclusive language in this test Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Zhu Jun
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4d98618b8a |
tests/qtest: check the return value
These variables "ret" are never referenced in the code, thus add check logic for the "ret" Signed-off-by: Zhu Jun <zhujun2@cmss.chinamobile.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231121080802.4500-1-zhujun2@cmss.chinamobile.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Ani Sinha
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de35244e99 |
tests/acpi/bios-tables-test: do not write new blobs unless there are changes
When dumping table blobs using rebuild-expected-aml.sh, table blobs from all test variants are dumped regardless of whether there are any actual changes to the tables or not. This creates lot of new files for various test variants that are not part of the git repository. This is because we do not check in all table blobs for all test variants into the repository. Only those blobs for those variants that are different from the generic test-variant agnostic blob are checked in. This change makes the test smarter by checking if at all there are any changes in the tables from the checked-in gold master blobs and take actions accordingly. When there are no changes: - No new table blobs would be written. - Existing table blobs will be refreshed (git diff will show no changes). When there are changes: - New table blob files will be dumped. - Existing table blobs will be refreshed (git diff will show that the files changed, asl diff will show the actual changes). When new tables are introduced: - Zero byte empty file blobs for new tables as instructed in the header of bios-tables-test.c will be regenerated to actual table blobs. This would make analyzing changes to tables less confusing and there would be no need to clean useless untracked files when there are no table changes. CC: peter.maydell@linaro.org Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231107044952.5461-1-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> |
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Michael S. Tsirkin
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cadfc72939 |
netdev: set timeout depending on loadavg
netdev test keeps failing sometimes. I don't think we should increase the timeout some more: let's try something else instead, testing how busy the system is. Seems to work for me. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Michael Tokarev
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4b3e4d2b43 |
tests/qtest/ufs-test.c: spelling fix: tranfer
Fixes:
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Michael Tokarev
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8053feaae0 |
tests/qtest/migration-test.c: spelling fix: bandwith
Fixes:
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Stefan Hajnoczi
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ed1d873caa |
Misc hardware patch queue
HW emulation: - PMBus fixes and tests (Titus) - IDE fixes and tests (Fiona) - New ADM1266 sensor (Titus) - Better error propagation in PCI-ISA i82378 (Philippe) - Declare SD model QOM types using DEFINE_TYPES macro (Philippe) Topology: - Fix CPUState::nr_cores calculation (Zhuocheng Ding and Zhao Liu) Monitor: - Synchronize CPU state in 'info lapic' (Dongli Zhang) QOM: - Have 'cpu-qom.h' target-agnostic (Philippe) - Move ArchCPUClass definition to each target's cpu.h (Philippe) - Call object_class_is_abstract once in cpu_class_by_name (Philippe) UI: - Use correct key names in titles on MacOS / SDL2 (Adrian) MIPS: - Fix MSA BZ/BNZ and TX79 LQ/SQ opcodes (Philippe) Nios2: - Create IRQs *after* vCPU is realized (Philippe) PPC: - Restrict KVM objects to system emulation (Philippe) - Move target-specific definitions out of 'cpu-qom.h' (Philippe) S390X: - Make hw/s390x/css.h and hw/s390x/sclp.h headers target agnostic (Philippe) X86: - HVF & KVM cleanups (Philippe) Various targets: - Use env_archcpu() to optimize (Philippe) Misc: - Few global variable shadowing removed (Philippe) - Introduce cpu_exec_reset_hold and factor tcg_cpu_reset_hold out (Philippe) - Remove few more 'softmmu' mentions (Philippe) - Fix and cleanup in vl.c (Akihiko & Marc-André) - Resource leak fix in dump (Zongmin Zhou) - MAINTAINERS updates (Thomas, Daniel) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVKKmEACgkQ4+MsLN6t wN4xHQ//X/enH4C7K3VP/tSinDiwmXN2o61L9rjqSDQkBaCtktZx4c8qKSDL7V4S vwzmvvBn3biMXQwZNVJo9d0oz2qoaF9tI6Ao0XDHAan9ziagfG9YMqWhkCfj077Q jLdCqkUuMJBvQgXGB1a6UgCme8PQx7h0oqjbCNfB0ZBls24b5DiEjO87LE4OTbTi zKRhYEpZpGwIVcy+1dAsbaBpGFP06sr1doB9Wz4c06eSx7t0kFSPk6U4CyOPrGXh ynyCxPwngxIXmarY8gqPs3SBs7oXsH8Q/ZOHr1LbuXhwSuw/0zBQU9aF7Ir8RPan DB79JjPrtxTAhICKredWT79v9M18D2/1MpONgg4vtx5K2FzGYoAJULCHyfkHMRSM L6/H0ZQPHvf7w72k9EcSQIhd0wPlMqRmfy37/8xcLiw1h4l/USx48QeKaeFWeSEu DgwSk+R61HbrKvQz/U0tF98zUEyBaQXNrKmyzht0YE4peAtpbPNBeRHkd0GMae/Z HOmkt8QlFQ0T14qSK7mSHaSJTUzRvFGD01cbuCDxVsyCWWsesEikXBACZLG5RCRY Rn1WeX1H9eE3kKi9iueLnhzcF9yM5XqFE3f6RnDzY8nkg91lsTMSQgFcIpv6uGyp 3WOTNSC9SoFyI3x8pCWiKOGytPUb8xk+PnOA85wYvVmT+7j6wus= =OVdQ -----END PGP SIGNATURE----- Merge tag 'misc-cpus-20231107' of https://github.com/philmd/qemu into staging Misc hardware patch queue HW emulation: - PMBus fixes and tests (Titus) - IDE fixes and tests (Fiona) - New ADM1266 sensor (Titus) - Better error propagation in PCI-ISA i82378 (Philippe) - Declare SD model QOM types using DEFINE_TYPES macro (Philippe) Topology: - Fix CPUState::nr_cores calculation (Zhuocheng Ding and Zhao Liu) Monitor: - Synchronize CPU state in 'info lapic' (Dongli Zhang) QOM: - Have 'cpu-qom.h' target-agnostic (Philippe) - Move ArchCPUClass definition to each target's cpu.h (Philippe) - Call object_class_is_abstract once in cpu_class_by_name (Philippe) UI: - Use correct key names in titles on MacOS / SDL2 (Adrian) MIPS: - Fix MSA BZ/BNZ and TX79 LQ/SQ opcodes (Philippe) Nios2: - Create IRQs *after* vCPU is realized (Philippe) PPC: - Restrict KVM objects to system emulation (Philippe) - Move target-specific definitions out of 'cpu-qom.h' (Philippe) S390X: - Make hw/s390x/css.h and hw/s390x/sclp.h headers target agnostic (Philippe) X86: - HVF & KVM cleanups (Philippe) Various targets: - Use env_archcpu() to optimize (Philippe) Misc: - Few global variable shadowing removed (Philippe) - Introduce cpu_exec_reset_hold and factor tcg_cpu_reset_hold out (Philippe) - Remove few more 'softmmu' mentions (Philippe) - Fix and cleanup in vl.c (Akihiko & Marc-André) - Resource leak fix in dump (Zongmin Zhou) - MAINTAINERS updates (Thomas, Daniel) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVKKmEACgkQ4+MsLN6t # wN4xHQ//X/enH4C7K3VP/tSinDiwmXN2o61L9rjqSDQkBaCtktZx4c8qKSDL7V4S # vwzmvvBn3biMXQwZNVJo9d0oz2qoaF9tI6Ao0XDHAan9ziagfG9YMqWhkCfj077Q # jLdCqkUuMJBvQgXGB1a6UgCme8PQx7h0oqjbCNfB0ZBls24b5DiEjO87LE4OTbTi # zKRhYEpZpGwIVcy+1dAsbaBpGFP06sr1doB9Wz4c06eSx7t0kFSPk6U4CyOPrGXh # ynyCxPwngxIXmarY8gqPs3SBs7oXsH8Q/ZOHr1LbuXhwSuw/0zBQU9aF7Ir8RPan # DB79JjPrtxTAhICKredWT79v9M18D2/1MpONgg4vtx5K2FzGYoAJULCHyfkHMRSM # L6/H0ZQPHvf7w72k9EcSQIhd0wPlMqRmfy37/8xcLiw1h4l/USx48QeKaeFWeSEu # DgwSk+R61HbrKvQz/U0tF98zUEyBaQXNrKmyzht0YE4peAtpbPNBeRHkd0GMae/Z # HOmkt8QlFQ0T14qSK7mSHaSJTUzRvFGD01cbuCDxVsyCWWsesEikXBACZLG5RCRY # Rn1WeX1H9eE3kKi9iueLnhzcF9yM5XqFE3f6RnDzY8nkg91lsTMSQgFcIpv6uGyp # 3WOTNSC9SoFyI3x8pCWiKOGytPUb8xk+PnOA85wYvVmT+7j6wus= # =OVdQ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 20:15:29 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-cpus-20231107' of https://github.com/philmd/qemu: (75 commits) dump: Add close fd on error return to avoid resource leak ui/sdl2: use correct key names in win title on mac MAINTAINERS: Add more guest-agent related files to the corresponding section MAINTAINERS: Add include/hw/xtensa/mx_pic.h to the XTFPGA machine section MAINTAINERS: update libvirt devel mailing list address MAINTAINERS: Add the CAN documentation file to the CAN section MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section hw/sd: Declare QOM types using DEFINE_TYPES() macro hw/i2c: pmbus: reset page register for out of range reads hw/i2c: pmbus: immediately clear faults on request tests/qtest: add tests for ADM1266 hw/sensor: add ADM1266 device model hw/i2c: pmbus: add VCAP register hw/i2c: pmbus: add fan support hw/i2c: pmbus: add vout mode bitfields hw/i2c: pmbus add support for block receive tests/qtest: ahci-test: add test exposing reset issue with pending callback hw/ide: reset: cancel async DMA operation before resetting state hw/cpu: Update the comments of nr_cores and nr_dies system/cpus: Fix CPUState.nr_cores' calculation ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Titus Rwantare
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ff0511282d |
hw/i2c: pmbus: reset page register for out of range reads
The linux pmbus driver scans all possible pages and does not reset the current page after the scan, making all future page reads fail as out of range on devices with a single page. This change resets out of range pages immediately on write. Also added a qtest for simultaneous writes to all pages. Reviewed-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Titus Rwantare <titusr@google.com> Message-ID: <20231023-staging-pmbus-v3-v4-8-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
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Titus Rwantare
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5861f5abf4 |
tests/qtest: add tests for ADM1266
The ADM1266 can have string fields written by the driver, so it's worth specifically testing. Reviewed-by: Hao Wu <wuhaotsh@google.com> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Titus Rwantare <titusr@google.com> [PMD: Cover file in MAINTAINERS] Message-ID: <20231023-staging-pmbus-v3-v4-6-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
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Fiona Ebner
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cc610857bb |
tests/qtest: ahci-test: add test exposing reset issue with pending callback
Before commit "hw/ide: reset: cancel async DMA operation before resetting state", this test would fail, because a reset with a pending write operation would lead to an unsolicited write to the first sector of the disk. The test writes a pattern to the beginning of the disk and verifies that it is still intact after a reset with a pending operation. It also checks that the pending operation actually completes correctly. Signed-off-by: Fiona Ebner <f.ebner@proxmox.com> Message-ID: <20230906130922.142845-2-f.ebner@proxmox.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
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Stefan Hajnoczi
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f6b615b52d |
virtio,pc,pci: features, fixes
virtio sound card support
vhost-user: back-end state migration
cxl:
line length reduction
enabling fabric management
vhost-vdpa:
shadow virtqueue hash calculation Support
shadow virtqueue RSS Support
tests:
CPU topology related smbios test cases
Fixes, cleanups all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-----BEGIN PGP SIGNATURE-----
iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmVKDDoPHG1zdEByZWRo
YXQuY29tAAoJECgfDbjSjVRpF08H/0Zts8uvkHbgiOEJw4JMHU6/VaCipfIYsp01
GSfwYOyEsXJ7GIxKWaCiMnWXEm7tebNCPKf3DoUtcAojQj3vuF9XbWBKw/bfRn83
nGO/iiwbYViSKxkwqUI+Up5YiN9o0M8gBFrY0kScPezbnYmo5u2bcADdEEq6gH68
D0Ea8i+WmszL891ypvgCDBL2ObDk3qX3vA5Q6J2I+HKX2ofJM59BwaKwS5ghw+IG
BmbKXUZJNjUQfN9dQ7vJuiuqdknJ2xUzwW2Vn612ffarbOZB1DZ6ruWlrHty5TjX
0w4IXEJPBgZYbX9oc6zvTQnbLDBJbDU89mnme0TcmNMKWmQKTtc=
=vEv+
-----END PGP SIGNATURE-----
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, fixes
virtio sound card support
vhost-user: back-end state migration
cxl:
line length reduction
enabling fabric management
vhost-vdpa:
shadow virtqueue hash calculation Support
shadow virtqueue RSS Support
tests:
CPU topology related smbios test cases
Fixes, cleanups all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE-----
#
# iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmVKDDoPHG1zdEByZWRo
# YXQuY29tAAoJECgfDbjSjVRpF08H/0Zts8uvkHbgiOEJw4JMHU6/VaCipfIYsp01
# GSfwYOyEsXJ7GIxKWaCiMnWXEm7tebNCPKf3DoUtcAojQj3vuF9XbWBKw/bfRn83
# nGO/iiwbYViSKxkwqUI+Up5YiN9o0M8gBFrY0kScPezbnYmo5u2bcADdEEq6gH68
# D0Ea8i+WmszL891ypvgCDBL2ObDk3qX3vA5Q6J2I+HKX2ofJM59BwaKwS5ghw+IG
# BmbKXUZJNjUQfN9dQ7vJuiuqdknJ2xUzwW2Vn612ffarbOZB1DZ6ruWlrHty5TjX
# 0w4IXEJPBgZYbX9oc6zvTQnbLDBJbDU89mnme0TcmNMKWmQKTtc=
# =vEv+
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 07 Nov 2023 18:06:50 HKT
# gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg: issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (63 commits)
acpi/tests/avocado/bits: enable console logging from bits VM
acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry point
hw/cxl: Add tunneled command support to mailbox for switch cci.
hw/cxl: Add dummy security state get
hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions
hw/cxl/mbox: Add Get Background Operation Status Command
hw/cxl: Add support for device sanitation
hw/cxl/mbox: Wire up interrupts for background completion
hw/cxl/mbox: Add support for background operations
hw/cxl: Implement Physical Ports status retrieval
hw/pci-bridge/cxl_downstream: Set default link width and link speed
hw/cxl/mbox: Add Physical Switch Identify command.
hw/cxl/mbox: Add Information and Status / Identify command
hw/cxl: Add a switch mailbox CCI function
hw/pci-bridge/cxl_upstream: Move defintion of device to header.
hw/cxl/mbox: Generalize the CCI command processing
hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceState
hw/cxl/mbox: Split mailbox command payload into separate input and output
hw/cxl/mbox: Pull the payload out of struct cxl_cmd and make instances constant
hw/cxl: Fix a QEMU_BUILD_BUG_ON() in switch statement scope issue.
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
|
|
|
Zhao Liu
|
f58db4eeb1 |
tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count2 test
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-CNE3C2, Mon Oct 23 15:25:01 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-WKE3C2, Mon Oct 23 15:25:01 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000CA6
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 2C
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[434h 1076 1] Subtable Type : 00 [Processor Local APIC]
+[435h 1077 1] Length : 08
+[436h 1078 1] Processor ID : 81
+[437h 1079 1] Local Apic ID : 81
+[438h 1080 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[43Ch 1084 1] Subtable Type : 09 [Processor Local x2APIC]
+[43Dh 1085 1] Length : 10
+[43Eh 1086 2] Reserved : 0000
+[440h 1088 4] Processor x2Apic ID : 00000100
+[444h 1092 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[448h 1096 4] Processor UID : 00000082
[snip]
+[C4Ch 3148 1] Subtable Type : 09 [Processor Local x2APIC]
+[C4Dh 3149 1] Length : 10
+[C4Eh 3150 2] Reserved : 0000
+[C50h 3152 4] Processor x2Apic ID : 00000181
+[C54h 3156 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+[C58h 3160 4] Processor UID : 00000103
+
+[C5Ch 3164 1] Subtable Type : 01 [I/O APIC]
+[C5Dh 3165 1] Length : 0C
+[C5Eh 3166 1] I/O Apic ID : 00
+[C5Fh 3167 1] Reserved : 00
+[C60h 3168 4] Address : FEC00000
+[C64h 3172 4] Interrupt : 00000000
+
+[C68h 3176 1] Subtable Type : 02 [Interrupt Source Override]
+[C69h 3177 1] Length : 0A
+[C6Ah 3178 1] Bus : 00
+[C6Bh 3179 1] Source : 00
+[C6Ch 3180 4] Interrupt : 00000002
+[C70h 3184 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
[snip]
+[C90h 3216 1] Subtable Type : 02 [Interrupt Source Override]
+[C91h 3217 1] Length : 0A
+[C92h 3218 1] Bus : 00
+[C93h 3219 1] Source : 0B
+[C94h 3220 4] Interrupt : 0000000B
+[C98h 3224 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[C9Ah 3226 1] Subtable Type : 0A [Local x2APIC NMI]
+[C9Bh 3227 1] Length : 0C
+[C9Ch 3228 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[C9Eh 3230 4] Processor UID : FFFFFFFF
+[CA2h 3234 1] Interrupt Input LINT : 01
+[CA3h 3235 3] Reserved : 000000
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-CDE3C2, Mon Oct 23 15:25:01 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x000083EA (33770)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0x01
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
[snip]
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C081, 0x81, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x81))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x81, 0x81, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x81)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x81, Arg0, Arg1, Arg2)
+ }
+ }
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231023094635.1588282-17-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
Zhao Liu
|
198eee0cc1 |
tests: bios-tables-test: Add test for smbios type4 thread count2
This tests the commit
|
|
|
Zhao Liu
|
7cb953ca19 |
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count2 test
Following the guidelines in tests/qtest/bios-tables-test.c, this is step 1 - 3. List the ACPI tables that will be added to test the thread count2 field of smbios type4 table. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231023094635.1588282-15-zhao1.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Zhao Liu
|
a775cb191e |
tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count test
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-1NP791, Wed Aug 23 21:51:31 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-2JP791, Wed Aug 23 21:51:31 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000220
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 63
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[1D4h 0468 1] Subtable Type : 00 [Processor Local APIC]
+[1D5h 0469 1] Length : 08
+[1D6h 0470 1] Processor ID : 35
+[1D7h 0471 1] Local Apic ID : 6A
+[1D8h 0472 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+ Runtime Online Capable : 0
+
+[1DCh 0476 1] Subtable Type : 01 [I/O APIC]
+[1DDh 0477 1] Length : 0C
+[1DEh 0478 1] I/O Apic ID : 00
+[1DFh 0479 1] Reserved : 00
+[1E0h 0480 4] Address : FEC00000
+[1E4h 0484 4] Interrupt : 00000000
+
+[1E8h 0488 1] Subtable Type : 02 [Interrupt Source Override]
+[1E9h 0489 1] Length : 0A
+[1EAh 0490 1] Bus : 00
+[1EBh 0491 1] Source : 00
+[1ECh 0492 4] Interrupt : 00000002
+[1F0h 0496 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+
+[1F2h 0498 1] Subtable Type : 02 [Interrupt Source Override]
+[1F3h 0499 1] Length : 0A
+[1F4h 0500 1] Bus : 00
+[1F5h 0501 1] Source : 05
+[1F6h 0502 4] Interrupt : 00000005
+[1FAh 0506 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[1FCh 0508 1] Subtable Type : 02 [Interrupt Source Override]
+[1FDh 0509 1] Length : 0A
+[1FEh 0510 1] Bus : 00
+[1FFh 0511 1] Source : 09
+[200h 0512 4] Interrupt : 00000009
+[204h 0516 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[206h 0518 1] Subtable Type : 02 [Interrupt Source Override]
+[207h 0519 1] Length : 0A
+[208h 0520 1] Bus : 00
+[209h 0521 1] Source : 0A
+[20Ah 0522 4] Interrupt : 0000000A
+[20Eh 0526 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[210h 0528 1] Subtable Type : 02 [Interrupt Source Override]
+[211h 0529 1] Length : 0A
+[212h 0530 1] Bus : 00
+[213h 0531 1] Source : 0B
+[214h 0532 4] Interrupt : 0000000B
+[218h 0536 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[21Ah 0538 1] Subtable Type : 04 [Local APIC NMI]
+[21Bh 0539 1] Length : 06
+[21Ch 0540 1] Processor ID : FF
+[21Dh 0541 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[21Fh 0543 1] Interrupt Input LINT : 01
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-00O791, Wed Aug 23 21:51:31 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x00003271 (12913)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0xAF
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
[snip]
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C035, 0x35, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x35))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x35, 0x6A, 0x01, 0x00, 0x00, 0x00 // ..5j....
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x35)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x35, Arg0, Arg1, Arg2)
+ }
+ }
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-14-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
Zhao Liu
|
7ee18dcef1 |
tests: bios-tables-test: Add test for smbios type4 thread count
This tests the commit
|
|
|
Zhao Liu
|
85ccbe1275 |
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count test
Following the guidelines in tests/qtest/bios-tables-test.c, this is step 1 - 3. List the ACPI tables that will be added to test the thread count field of smbios type4 table. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231023094635.1588282-12-zhao1.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Zhao Liu
|
f03359a85b |
tests: bios-tables-test: Update ACPI table binaries for smbios core count2 test
Change the core count2 from 275 to 260.
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
APIC:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.core-count2, Wed Aug 23 16:29:51 2023
+ * Disassembly of /tmp/aml-KQDX91, Wed Aug 23 16:29:51 2023
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
-[004h 0004 4] Table Length : 000009AE
+[004h 0004 4] Table Length : 00000CA6
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : CE
+[009h 0009 1] Checksum : FA
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
@@ -1051,1256 +1051,1136 @@
[42Ch 1068 1] Subtable Type : 00 [Processor Local APIC]
[42Dh 1069 1] Length : 08
[42Eh 1070 1] Processor ID : 80
[42Fh 1071 1] Local Apic ID : 80
[430h 1072 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[434h 1076 1] Subtable Type : 00 [Processor Local APIC]
[435h 1077 1] Length : 08
[436h 1078 1] Processor ID : 81
[437h 1079 1] Local Apic ID : 81
[438h 1080 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
-[43Ch 1084 1] Subtable Type : 00 [Processor Local APIC]
-[43Dh 1085 1] Length : 08
-[43Eh 1086 1] Processor ID : 82
-[43Fh 1087 1] Local Apic ID : 82
-[440h 1088 4] Flags (decoded below) : 00000001
- Processor Enabled : 1
- Runtime Online Capable : 0
-
-[444h 1092 1] Subtable Type : 00 [Processor Local APIC]
-[445h 1093 1] Length : 08
-[446h 1094 1] Processor ID : 83
-[447h 1095 1] Local Apic ID : 83
-[448h 1096 4] Flags (decoded below) : 00000001
- Processor Enabled : 1
- Runtime Online Capable : 0
[snip]
-
-[964h 2404 1] Subtable Type : 01 [I/O APIC]
-[965h 2405 1] Length : 0C
-[966h 2406 1] I/O Apic ID : 00
-[967h 2407 1] Reserved : 00
-[968h 2408 4] Address : FEC00000
-[96Ch 2412 4] Interrupt : 00000000
-
-[970h 2416 1] Subtable Type : 02 [Interrupt Source Override]
-[971h 2417 1] Length : 0A
-[972h 2418 1] Bus : 00
-[973h 2419 1] Source : 00
-[974h 2420 4] Interrupt : 00000002
-[978h 2424 2] Flags (decoded below) : 0000
+[43Ch 1084 1] Subtable Type : 09 [Processor Local x2APIC]
+[43Dh 1085 1] Length : 10
+[43Eh 1086 2] Reserved : 0000
+[440h 1088 4] Processor x2Apic ID : 00000100
+[444h 1092 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[448h 1096 4] Processor UID : 00000082
+
+[44Ch 1100 1] Subtable Type : 09 [Processor Local x2APIC]
+[44Dh 1101 1] Length : 10
+[44Eh 1102 2] Reserved : 0000
+[450h 1104 4] Processor x2Apic ID : 00000101
+[454h 1108 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+[458h 1112 4] Processor UID : 00000083
+
[snip]
+
+[C68h 3176 1] Subtable Type : 02 [Interrupt Source Override]
+[C69h 3177 1] Length : 0A
+[C6Ah 3178 1] Bus : 00
+[C6Bh 3179 1] Source : 00
+[C6Ch 3180 4] Interrupt : 00000002
+[C70h 3184 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
-[97Ah 2426 1] Subtable Type : 02 [Interrupt Source Override]
-[97Bh 2427 1] Length : 0A
-[97Ch 2428 1] Bus : 00
-[97Dh 2429 1] Source : 05
-[97Eh 2430 4] Interrupt : 00000005
-[982h 2434 2] Flags (decoded below) : 000D
+[C72h 3186 1] Subtable Type : 02 [Interrupt Source Override]
+[C73h 3187 1] Length : 0A
+[C74h 3188 1] Bus : 00
+[C75h 3189 1] Source : 05
+[C76h 3190 4] Interrupt : 00000005
+[C7Ah 3194 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[984h 2436 1] Subtable Type : 02 [Interrupt Source Override]
-[985h 2437 1] Length : 0A
-[986h 2438 1] Bus : 00
-[987h 2439 1] Source : 09
-[988h 2440 4] Interrupt : 00000009
-[98Ch 2444 2] Flags (decoded below) : 000D
+[C7Ch 3196 1] Subtable Type : 02 [Interrupt Source Override]
+[C7Dh 3197 1] Length : 0A
+[C7Eh 3198 1] Bus : 00
+[C7Fh 3199 1] Source : 09
+[C80h 3200 4] Interrupt : 00000009
+[C84h 3204 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[98Eh 2446 1] Subtable Type : 02 [Interrupt Source Override]
-[98Fh 2447 1] Length : 0A
-[990h 2448 1] Bus : 00
-[991h 2449 1] Source : 0A
-[992h 2450 4] Interrupt : 0000000A
-[996h 2454 2] Flags (decoded below) : 000D
+[C86h 3206 1] Subtable Type : 02 [Interrupt Source Override]
+[C87h 3207 1] Length : 0A
+[C88h 3208 1] Bus : 00
+[C89h 3209 1] Source : 0A
+[C8Ah 3210 4] Interrupt : 0000000A
+[C8Eh 3214 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[998h 2456 1] Subtable Type : 02 [Interrupt Source Override]
-[999h 2457 1] Length : 0A
-[99Ah 2458 1] Bus : 00
-[99Bh 2459 1] Source : 0B
-[99Ch 2460 4] Interrupt : 0000000B
-[9A0h 2464 2] Flags (decoded below) : 000D
+[C90h 3216 1] Subtable Type : 02 [Interrupt Source Override]
+[C91h 3217 1] Length : 0A
+[C92h 3218 1] Bus : 00
+[C93h 3219 1] Source : 0B
+[C94h 3220 4] Interrupt : 0000000B
+[C98h 3224 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[9A2h 2466 1] Subtable Type : 0A [Local x2APIC NMI]
-[9A3h 2467 1] Length : 0C
-[9A4h 2468 2] Flags (decoded below) : 0000
+[C9Ah 3226 1] Subtable Type : 0A [Local x2APIC NMI]
+[C9Bh 3227 1] Length : 0C
+[C9Ch 3228 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
-[9A6h 2470 4] Processor UID : FFFFFFFF
-[9AAh 2474 1] Interrupt Input LINT : 01
-[9ABh 2475 3] Reserved : 000000
+[C9Eh 3230 4] Processor UID : FFFFFFFF
+[CA2h 3234 1] Interrupt Input LINT : 01
+[CA3h 3235 3] Reserved : 000000
...
DSDT:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.core-count2, Wed Aug 23 16:29:51 2023
+ * Disassembly of /tmp/aml-6DDX91, Wed Aug 23 16:29:51 2023
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00007EEF (32495)
+ * Length 0x000083EA (33770)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x52
+ * Checksum 0x01
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -4196,107 +4196,32 @@
}
If ((Arg0 == 0x0101))
{
Notify (C101, Arg1)
}
If ((Arg0 == 0x0102))
{
Notify (C102, Arg1)
}
If ((Arg0 == 0x0103))
{
Notify (C103, Arg1)
}
-
- If ((Arg0 == 0x0104))
- {
- Notify (C104, Arg1)
- }
-
- If ((Arg0 == 0x0105))
- {
- Notify (C105, Arg1)
- }
-
- If ((Arg0 == 0x0106))
- {
- Notify (C106, Arg1)
- }
-
[snip]
- If ((Arg0 == 0x0112))
- {
- Notify (C112, Arg1)
- }
}
Method (CSTA, 1, Serialized)
{
Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF)
\_SB.PCI0.PRES.CSEL = Arg0
Local0 = Zero
If ((\_SB.PCI0.PRES.CPEN == One))
{
Local0 = 0x0F
}
Release (\_SB.PCI0.PRES.CPLK)
Return (Local0)
}
@@ -4306,33 +4231,33 @@
\_SB.PCI0.PRES.CSEL = Arg0
\_SB.PCI0.PRES.CEJ0 = One
Release (\_SB.PCI0.PRES.CPLK)
}
Method (CSCN, 0, Serialized)
{
Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF)
Name (CNEW, Package (0xFF) {})
Local3 = Zero
Local4 = One
While ((Local4 == One))
{
Local4 = Zero
Local0 = One
Local1 = Zero
- While (((Local0 == One) && (Local3 < 0x0113)))
+ While (((Local0 == One) && (Local3 < 0x0104)))
{
Local0 = Zero
\_SB.PCI0.PRES.CSEL = Local3
\_SB.PCI0.PRES.CCMD = Zero
If ((\_SB.PCI0.PRES.CDAT < Local3))
{
Break
}
If ((Local1 == 0xFF))
{
Local4 = One
Break
}
Local3 = \_SB.PCI0.PRES.CDAT
@@ -7220,3281 +7145,3281 @@
Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
{
0x00, 0x08, 0x81, 0x81, 0x01, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x81)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x81, Arg0, Arg1, Arg2)
}
}
- Processor (C082, 0x82, 0x00000000, 0x00)
+ Device (C082)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x82) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0x82))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0x82, 0x82, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x82, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x82)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x82, Arg0, Arg1, Arg2)
}
}
- Processor (C083, 0x83, 0x00000000, 0x00)
+ Device (C083)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x83) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0x83))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0x83, 0x83, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x83)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x83, Arg0, Arg1, Arg2)
}
}
- Processor (C084, 0x84, 0x00000000, 0x00)
+ Device (C084)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x84) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0x84))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0x84, 0x84, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, // ........
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x84, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0x84)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0x84, Arg0, Arg1, Arg2)
}
}
[snip]
- Processor (C0FE, 0xFE, 0x00000000, 0x00)
+ Device (C0FE)
{
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0xFE) // _UID: Unique ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (CSTA (0xFE))
}
- Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ Name (_MAT, Buffer (0x10) // _MAT: Multiple APIC Table Entry
{
- 0x00, 0x08, 0xFE, 0xFE, 0x01, 0x00, 0x00, 0x00 // ........
+ /* 0000 */ 0x09, 0x10, 0x00, 0x00, 0x7C, 0x01, 0x00, 0x00, // ....|...
+ /* 0008 */ 0x01, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00 // ........
})
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
{
CEJ0 (0xFE)
}
Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
{
COST (0xFE, Arg0, Arg1, Arg2)
}
}
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-11-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
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Zhao Liu
|
6dc82e3222 |
tests: bios-tables-test: Extend smbios core count2 test to cover general topology
The commit
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|
Zhao Liu
|
c63fcb2c10 |
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core count2 test
Following the guidelines in tests/qtest/bios-tables-test.c, this is step 1 - 3. List the ACPI tables that will be changed about the type 4 core count2 test case. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231023094635.1588282-9-zhao1.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
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Zhao Liu
|
61ace1d772 |
tests: bios-tables-test: Add ACPI table binaries for smbios type4 core count test
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-Y6WW91, Wed Aug 23 15:43:43 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-FFXW91, Wed Aug 23 15:43:43 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000220
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : 3C
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[1D4h 0468 1] Subtable Type : 00 [Processor Local APIC]
+[1D5h 0469 1] Length : 08
+[1D6h 0470 1] Processor ID : 35
+[1D7h 0471 1] Local Apic ID : 6A
+[1D8h 0472 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[1DCh 0476 1] Subtable Type : 01 [I/O APIC]
+[1DDh 0477 1] Length : 0C
+[1DEh 0478 1] I/O Apic ID : 00
+[1DFh 0479 1] Reserved : 00
+[1E0h 0480 4] Address : FEC00000
+[1E4h 0484 4] Interrupt : 00000000
+
+[1E8h 0488 1] Subtable Type : 02 [Interrupt Source Override]
+[1E9h 0489 1] Length : 0A
+[1EAh 0490 1] Bus : 00
+[1EBh 0491 1] Source : 00
+[1ECh 0492 4] Interrupt : 00000002
+[1F0h 0496 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+
+[1F2h 0498 1] Subtable Type : 02 [Interrupt Source Override]
+[1F3h 0499 1] Length : 0A
+[1F4h 0500 1] Bus : 00
+[1F5h 0501 1] Source : 05
+[1F6h 0502 4] Interrupt : 00000005
+[1FAh 0506 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[1FCh 0508 1] Subtable Type : 02 [Interrupt Source Override]
+[1FDh 0509 1] Length : 0A
+[1FEh 0510 1] Bus : 00
+[1FFh 0511 1] Source : 09
+[200h 0512 4] Interrupt : 00000009
+[204h 0516 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[206h 0518 1] Subtable Type : 02 [Interrupt Source Override]
+[207h 0519 1] Length : 0A
+[208h 0520 1] Bus : 00
+[209h 0521 1] Source : 0A
+[20Ah 0522 4] Interrupt : 0000000A
+[20Eh 0526 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[210h 0528 1] Subtable Type : 02 [Interrupt Source Override]
+[211h 0529 1] Length : 0A
+[212h 0530 1] Bus : 00
+[213h 0531 1] Source : 0B
+[214h 0532 4] Interrupt : 0000000B
+[218h 0536 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[21Ah 0538 1] Subtable Type : 04 [Local APIC NMI]
+[21Bh 0539 1] Length : 06
+[21Ch 0540 1] Processor ID : FF
+[21Dh 0541 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[21Fh 0543 1] Interrupt Input LINT : 01
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-9ZXW91, Wed Aug 23 15:43:43 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x00003271 (12913)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0xAF
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
[snip]
+ Device (\_SB.CPUS)
+ {
+ Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID
+ Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID
+ Method (CTFY, 2, NotSerialized)
+ {
+ If ((Arg0 == Zero))
+ {
+ Notify (C000, Arg1)
+ }
+
+ If ((Arg0 == One))
+ {
+ Notify (C001, Arg1)
+ }
[snip]
+ If ((Arg0 == 0x35))
+ {
+ Notify (C035, Arg1)
+ }
+ }
[snip]
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C035, 0x35, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x35))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x35, 0x6A, 0x01, 0x00, 0x00, 0x00 // ..5j....
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x35)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x35, Arg0, Arg1, Arg2)
+ }
+ }
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-8-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Zhao Liu
|
148a8a1d5f |
tests: bios-tables-test: Add test for smbios type4 core count
This tests the commit
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Zhao Liu
|
623d26ad9a |
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core count test
Following the guidelines in tests/qtest/bios-tables-test.c, this is step 1 - 3. List the ACPI tables that will be added to test the type 4 core count field. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231023094635.1588282-6-zhao1.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Zhao Liu
|
c1cd1d360d |
tests: bios-tables-test: Add ACPI table binaries for smbios type4 count test
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.
Changes in the tables:
FACP:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-W37791, Wed Aug 23 10:36:32 2023
+ *
+ * ACPI Data Table [FACP]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
+[004h 0004 4] Table Length : 000000F4
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : B3
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] FACS Address : 00000000
+[028h 0040 4] DSDT Address : 00000000
+[02Ch 0044 1] Model : 01
+[02Dh 0045 1] PM Profile : 00 [Unspecified]
+[02Eh 0046 2] SCI Interrupt : 0009
+[030h 0048 4] SMI Command Port : 000000B2
+[034h 0052 1] ACPI Enable Value : 02
+[035h 0053 1] ACPI Disable Value : 03
+[036h 0054 1] S4BIOS Command : 00
+[037h 0055 1] P-State Control : 00
+[038h 0056 4] PM1A Event Block Address : 00000600
+[03Ch 0060 4] PM1B Event Block Address : 00000000
+[040h 0064 4] PM1A Control Block Address : 00000604
+[044h 0068 4] PM1B Control Block Address : 00000000
+[048h 0072 4] PM2 Control Block Address : 00000000
+[04Ch 0076 4] PM Timer Block Address : 00000608
+[050h 0080 4] GPE0 Block Address : 00000620
+[054h 0084 4] GPE1 Block Address : 00000000
+[058h 0088 1] PM1 Event Block Length : 04
+[059h 0089 1] PM1 Control Block Length : 02
+[05Ah 0090 1] PM2 Control Block Length : 00
+[05Bh 0091 1] PM Timer Block Length : 04
+[05Ch 0092 1] GPE0 Block Length : 10
+[05Dh 0093 1] GPE1 Block Length : 00
+[05Eh 0094 1] GPE1 Base Offset : 00
+[05Fh 0095 1] _CST Support : 00
+[060h 0096 2] C2 Latency : 0FFF
+[062h 0098 2] C3 Latency : 0FFF
+[064h 0100 2] CPU Cache Size : 0000
+[066h 0102 2] Cache Flush Stride : 0000
+[068h 0104 1] Duty Cycle Offset : 00
+[069h 0105 1] Duty Cycle Width : 00
+[06Ah 0106 1] RTC Day Alarm Index : 00
+[06Bh 0107 1] RTC Month Alarm Index : 00
+[06Ch 0108 1] RTC Century Index : 32
+[06Dh 0109 2] Boot Flags (decoded below) : 0002
+ Legacy Devices Supported (V2) : 0
+ 8042 Present on ports 60/64 (V2) : 1
+ VGA Not Present (V4) : 0
+ MSI Not Supported (V4) : 0
+ PCIe ASPM Not Supported (V4) : 0
+ CMOS RTC Not Present (V5) : 0
+[06Fh 0111 1] Reserved : 00
+[070h 0112 4] Flags (decoded below) : 000484A5
+ WBINVD instruction is operational (V1) : 1
+ WBINVD flushes all caches (V1) : 0
+ All CPUs support C1 (V1) : 1
+ C2 works on MP system (V1) : 0
+ Control Method Power Button (V1) : 0
+ Control Method Sleep Button (V1) : 1
+ RTC wake not in fixed reg space (V1) : 0
+ RTC can wake system from S4 (V1) : 1
+ 32-bit PM Timer (V1) : 0
+ Docking Supported (V1) : 0
+ Reset Register Supported (V2) : 1
+ Sealed Case (V3) : 0
+ Headless - No Video (V3) : 0
+ Use native instr after SLP_TYPx (V3) : 0
+ PCIEXP_WAK Bits Supported (V4) : 0
+ Use Platform Timer (V4) : 1
+ RTC_STS valid on S4 wake (V4) : 0
+ Remote Power-on capable (V4) : 0
+ Use APIC Cluster Model (V4) : 1
+ Use APIC Physical Destination Mode (V4) : 0
+ Hardware Reduced (V5) : 0
+ Low Power S0 Idle (V5) : 0
+
+[074h 0116 12] Reset Register : [Generic Address Structure]
+[074h 0116 1] Space ID : 01 [SystemIO]
+[075h 0117 1] Bit Width : 08
+[076h 0118 1] Bit Offset : 00
+[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
+[078h 0120 8] Address : 0000000000000CF9
+
+[080h 0128 1] Value to cause reset : 0F
+[081h 0129 2] ARM Flags (decoded below) : 0000
+ PSCI Compliant : 0
+ Must use HVC for PSCI : 0
+
+[083h 0131 1] FADT Minor Revision : 00
+[084h 0132 8] FACS Address : 0000000000000000
+[08Ch 0140 8] DSDT Address : 0000000000000000
+[094h 0148 12] PM1A Event Block : [Generic Address Structure]
+[094h 0148 1] Space ID : 01 [SystemIO]
+[095h 0149 1] Bit Width : 20
+[096h 0150 1] Bit Offset : 00
+[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
+[098h 0152 8] Address : 0000000000000600
+
+[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
+[0A0h 0160 1] Space ID : 00 [SystemMemory]
+[0A1h 0161 1] Bit Width : 00
+[0A2h 0162 1] Bit Offset : 00
+[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0A4h 0164 8] Address : 0000000000000000
+
+[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
+[0ACh 0172 1] Space ID : 01 [SystemIO]
+[0ADh 0173 1] Bit Width : 10
+[0AEh 0174 1] Bit Offset : 00
+[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0B0h 0176 8] Address : 0000000000000604
+
+[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
+[0B8h 0184 1] Space ID : 00 [SystemMemory]
+[0B9h 0185 1] Bit Width : 00
+[0BAh 0186 1] Bit Offset : 00
+[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0BCh 0188 8] Address : 0000000000000000
+
+[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
+[0C4h 0196 1] Space ID : 00 [SystemMemory]
+[0C5h 0197 1] Bit Width : 00
+[0C6h 0198 1] Bit Offset : 00
+[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0C8h 0200 8] Address : 0000000000000000
+
+[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
+[0D0h 0208 1] Space ID : 01 [SystemIO]
+[0D1h 0209 1] Bit Width : 20
+[0D2h 0210 1] Bit Offset : 00
+[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0D4h 0212 8] Address : 0000000000000608
+
+[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
+[0DCh 0220 1] Space ID : 01 [SystemIO]
+[0DDh 0221 1] Bit Width : 80
+[0DEh 0222 1] Bit Offset : 00
+[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0E0h 0224 8] Address : 0000000000000620
+
+[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
+[0E8h 0232 1] Space ID : 00 [SystemMemory]
+[0E9h 0233 1] Bit Width : 00
+[0EAh 0234 1] Bit Offset : 00
+[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
+[0ECh 0236 8] Address : 0000000000000000
+
...
APIC:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembly of /tmp/aml-687791, Wed Aug 23 10:36:32 2023
+ *
+ * ACPI Data Table [APIC]
+ *
+ * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
+ */
+
+[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
+[004h 0004 4] Table Length : 00000430
+[008h 0008 1] Revision : 03
+[009h 0009 1] Checksum : C5
+[00Ah 0010 6] Oem ID : "BOCHS "
+[010h 0016 8] Oem Table ID : "BXPC "
+[018h 0024 4] Oem Revision : 00000001
+[01Ch 0028 4] Asl Compiler ID : "BXPC"
+[020h 0032 4] Asl Compiler Revision : 00000001
+
+[024h 0036 4] Local Apic Address : FEE00000
+[028h 0040 4] Flags (decoded below) : 00000001
+ PC-AT Compatibility : 1
+
+[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
+[02Dh 0045 1] Length : 08
+[02Eh 0046 1] Processor ID : 00
+[02Fh 0047 1] Local Apic ID : 00
+[030h 0048 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
+
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000001
+ Processor Enabled : 1
+ Runtime Online Capable : 0
[snip]
+[3E4h 0996 1] Subtable Type : 00 [Processor Local APIC]
+[3E5h 0997 1] Length : 08
+[3E6h 0998 1] Processor ID : 77
+[3E7h 0999 1] Local Apic ID : 9E
+[3E8h 1000 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+ Runtime Online Capable : 0
+
+[3ECh 1004 1] Subtable Type : 01 [I/O APIC]
+[3EDh 1005 1] Length : 0C
+[3EEh 1006 1] I/O Apic ID : 00
+[3EFh 1007 1] Reserved : 00
+[3F0h 1008 4] Address : FEC00000
+[3F4h 1012 4] Interrupt : 00000000
+
+[3F8h 1016 1] Subtable Type : 02 [Interrupt Source Override]
+[3F9h 1017 1] Length : 0A
+[3FAh 1018 1] Bus : 00
+[3FBh 1019 1] Source : 00
+[3FCh 1020 4] Interrupt : 00000002
+[400h 1024 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+
+[402h 1026 1] Subtable Type : 02 [Interrupt Source Override]
+[403h 1027 1] Length : 0A
+[404h 1028 1] Bus : 00
+[405h 1029 1] Source : 05
+[406h 1030 4] Interrupt : 00000005
+[40Ah 1034 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[40Ch 1036 1] Subtable Type : 02 [Interrupt Source Override]
+[40Dh 1037 1] Length : 0A
+[40Eh 1038 1] Bus : 00
+[40Fh 1039 1] Source : 09
+[410h 1040 4] Interrupt : 00000009
+[414h 1044 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[416h 1046 1] Subtable Type : 02 [Interrupt Source Override]
+[417h 1047 1] Length : 0A
+[418h 1048 1] Bus : 00
+[419h 1049 1] Source : 0A
+[41Ah 1050 4] Interrupt : 0000000A
+[41Eh 1054 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[420h 1056 1] Subtable Type : 02 [Interrupt Source Override]
+[421h 1057 1] Length : 0A
+[422h 1058 1] Bus : 00
+[423h 1059 1] Source : 0B
+[424h 1060 4] Interrupt : 0000000B
+[428h 1064 2] Flags (decoded below) : 000D
+ Polarity : 1
+ Trigger Mode : 3
+
+[42Ah 1066 1] Subtable Type : 04 [Local APIC NMI]
+[42Bh 1067 1] Length : 06
+[42Ch 1068 1] Processor ID : FF
+[42Dh 1069 2] Flags (decoded below) : 0000
+ Polarity : 0
+ Trigger Mode : 0
+[42Fh 1071 1] Interrupt Input LINT : 01
+
...
DSDT:
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20200925 (64-bit version)
+ * Copyright (c) 2000 - 2020 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-8G8791, Wed Aug 23 10:36:32 2023
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x0000489D (18589)
+ * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
+ * Checksum 0xDB
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\)
+ {
+ OperationRegion (DBG, SystemIO, 0x0402, One)
+ Field (DBG, ByteAcc, NoLock, Preserve)
+ {
+ DBGB, 8
+ }
+
+ Method (DBUG, 1, NotSerialized)
+ {
+ ToHexString (Arg0, Local0)
+ ToBuffer (Local0, Local0)
+ Local1 = (SizeOf (Local0) - One)
+ Local2 = Zero
+ While ((Local2 < Local1))
+ {
+ DBGB = DerefOf (Local0 [Local2])
+ Local2++
+ }
+
+ DBGB = 0x0A
+ }
+ }
+
[snip]
+
+ Processor (C000, 0x00, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (Zero))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (Zero, Arg0, Arg1, Arg2)
+ }
+ }
+
+ Processor (C001, 0x01, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (One))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (One)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (One, Arg0, Arg1, Arg2)
+ }
+ }
[snip]
+ Processor (C077, 0x77, 0x00000000, 0x00)
+ {
+ Method (_STA, 0, Serialized) // _STA: Status
+ {
+ Return (CSTA (0x77))
+ }
+
+ Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry
+ {
+ 0x00, 0x08, 0x77, 0x9E, 0x01, 0x00, 0x00, 0x00 // ..w.....
+ })
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ CEJ0 (0x77)
+ }
+
+ Method (_OST, 3, Serialized) // _OST: OSPM Status Indication
+ {
+ COST (0x77, Arg0, Arg1, Arg2)
+ }
+ }
+ }
+ }
+
...
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231023094635.1588282-5-zhao1.liu@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Zhao Liu
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df210963a1 |
tests: bios-tables-test: Add test for smbios type4 count
This tests the commit
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Zhao Liu
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6c7937ece9 |
tests: bios-tables-test: Prepare the ACPI table change for smbios type4 count test
Following the guidelines in tests/qtest/bios-tables-test.c, this is step 1 - 3. List the ACPI tables that will be added to test the type 4 count. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231023094635.1588282-3-zhao1.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Stefan Hajnoczi
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17735e9371 |
Hyper-V Dynamic Memory protocol driver.
This driver is like virtio-balloon on steroids for Windows guests: it allows both changing the guest memory allocation via ballooning and inserting pieces of extra RAM into it on demand from a provided memory backend via Windows-native Hyper-V Dynamic Memory protocol. * Preparatory patches to support empty memory devices and ones with large alignment requirements. * Revert of recently added "hw/virtio/virtio-pmem: Replace impossible check by assertion" commit |
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Maciej S. Szmigiero
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259ebed45a |
qapi: Add HV_BALLOON_STATUS_REPORT event and its QMP query command
Used by the hv-balloon driver for (optional) guest memory status reports. Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> |
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Hyman Huang
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17257b90be |
tests: Add migration dirty-limit capability test
Add migration dirty-limit capability test if kernel support dirty ring. Migration dirty-limit capability introduce dirty limit capability, two parameters: x-vcpu-dirty-limit-period and vcpu-dirty-limit are introduced to implement the live migration with dirty limit. The test case does the following things: 1. start src, dst vm and enable dirty-limit capability 2. start migrate and set cancel it to check if dirty limit stop working. 3. restart dst vm 4. start migrate and enable dirty-limit capability 5. check if migration satisfy the convergence condition during pre-switchover phase. Note that this test case involves many passes, so it runs in slow mode only. Signed-off-by: Hyman Huang <yong.huang@smartx.com> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <e55a302df9da7dbc00ad825f47f57c1a756d303e.1698847223.git.yong.huang@smartx.com> |
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Stefan Hajnoczi
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d762bf9793 |
target-arm queue:
* linux-user/elfload: Add missing arm64 hwcap values * stellaris-gamepad: Convert to qdev * docs/specs: Convert various txt docs to rST * MAINTAINERS: Make sure that gicv3_internal.h is covered, too * hw/arm/pxa2xx_gpio: Pass CPU using QOM link property * hw/watchdog/wdt_imx2: Trace MMIO access and timer activity * hw/misc/imx7_snvs: Trace MMIO access * hw/misc/imx6_ccm: Convert DPRINTF to trace events * hw/i2c/pm_smbus: Convert DPRINTF to trace events * target/arm: Enable FEAT_MOPS insns in user-mode emulation * linux-user: Report AArch64 hwcap2 fields above bit 31 * target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly * target/arm: Fix SVE STR increment * hw/char/stm32f2xx_usart: implement TX interrupts * target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk * xlnx-versal-virt: Add AMD/Xilinx TRNG device -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmVD3hEZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3kuRD/4mLL2DB+yvQJrzSvUlrjfi /orPDrY9xEQ7ln2YpNqc2BZ4wAgh947yk/ae5+lyACQcBhCPiwMyVK1bBscNxkgA 8YPmuugNem/64+IHiKkz6aroqjvC83dUzJ9R5O9ctV70mgrX32YnhXNkkYVI81Ar bEwBznyYeCiy8ZafVxc2m70fiBOlurb6htYYdt7VHsgB0ozK/80UmuFI6exOKt1r oVyYouMaidNV/AoqZBGSKT2UFvFmI57PWN0YQD8CMECLsB/mBE9TEzSvLRdlOB4G qI5hgEJks61qDL6+YMJ+hskxW+D3g3I1WjuyqhKfiAzcKmmTAp1NsiiDtva8yBzX lDUXc6bPomalrKo1SPsooJv9r4uE3hCayDOlR+qM38DL4j2soSd3QIP7dCzERbZx snrD+ZTtgXtomUN8ojbnOK+kClEfURZ+wALbUEXwAh1sBwrKBxaD4ss4lA2esq10 HJPjBJzAWoSmK2DY6GWt2xIa+GvQwdPnxMpHbp3yAddGP7i/lHM0x60q5YpjHV++ DHaZmLBA7L9wcvT1VrwmieJaB+ADcSfkzBz2KznC4usdEY8BiJhjdRAzkqdGZWV5 HKEg8QwMYHg4QRUoZxW/XdtVzdqcjO5pTSUr3HUE+85sum2e9Yee6rybg1W/EWYv 7SnVkD5zG1BU268/p5k6UA== =OgfH -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * linux-user/elfload: Add missing arm64 hwcap values * stellaris-gamepad: Convert to qdev * docs/specs: Convert various txt docs to rST * MAINTAINERS: Make sure that gicv3_internal.h is covered, too * hw/arm/pxa2xx_gpio: Pass CPU using QOM link property * hw/watchdog/wdt_imx2: Trace MMIO access and timer activity * hw/misc/imx7_snvs: Trace MMIO access * hw/misc/imx6_ccm: Convert DPRINTF to trace events * hw/i2c/pm_smbus: Convert DPRINTF to trace events * target/arm: Enable FEAT_MOPS insns in user-mode emulation * linux-user: Report AArch64 hwcap2 fields above bit 31 * target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly * target/arm: Fix SVE STR increment * hw/char/stm32f2xx_usart: implement TX interrupts * target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk * xlnx-versal-virt: Add AMD/Xilinx TRNG device * tag 'pull-target-arm-20231102' of https://git.linaro.org/people/pmaydell/qemu-arm: (33 commits) tests/qtest: Introduce tests for AMD/Xilinx Versal TRNG device hw/arm: xlnx-versal-virt: Add AMD/Xilinx TRNG device hw/misc: Introduce AMD/Xilix Versal TRNG device target/arm: Correctly propagate stage 1 BTI guarded bit in a two-stage walk hw/char/stm32f2xx_usart: Add more definitions for CR1 register hw/char/stm32f2xx_usart: Update IRQ when DR is written hw/char/stm32f2xx_usart: Extract common IRQ update code to update_irq() target/arm: Fix SVE STR increment target/arm: Make FEAT_MOPS SET* insns handle Xs == XZR correctly linux-user: Report AArch64 hwcap2 fields above bit 31 target/arm: Enable FEAT_MOPS insns in user-mode emulation hw/i2c/pm_smbus: Convert DPRINTF to trace events hw/misc/imx6_ccm: Convert DPRINTF to trace events hw/misc/imx7_snvs: Trace MMIO access hw/watchdog/wdt_imx2: Trace timer activity hw/watchdog/wdt_imx2: Trace MMIO access hw/arm/pxa2xx_gpio: Pass CPU using QOM link property MAINTAINERS: Make sure that gicv3_internal.h is covered, too docs/specs/vmgenid: Convert to rST docs/specs/vmcoreinfo: Convert to rST ... Conflicts: hw/input/stellaris_input.c The qdev conversion in this pull request ("stellaris-gamepad: Convert to qdev") eliminates the vmstate_register() call that was converted to vmstate_register_any() in the conflicting migration pull request. vmstate_register_any() is no longer necessary now that this device has been converted to qdev, so take this pull request's version of stellaris_gamepad.c over the previous pull request's stellaris_input.c (the file was renamed). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Tong Ho
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1c98a821a2 |
tests/qtest: Introduce tests for AMD/Xilinx Versal TRNG device
Signed-off-by: Tong Ho <tong.ho@amd.com> Message-id: 20231031184611.3029156-4-tong.ho@amd.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Het Gala
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8e3766eefb |
migration: modify test_multifd_tcp_none() to use new QAPI syntax.
modify multifd tcp common test to incorporate the new QAPI syntax defined. Suggested-by: Aravind Retnakaran <aravind.retnakaran@nutanix.com> Signed-off-by: Het Gala <het.gala@nutanix.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231023182053.8711-15-farosas@suse.de> |
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Fabiano Rosas
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7bca2bb7bf |
tests/migration-test: Add a test for postcopy hangs during RECOVER
To do so, create two paired sockets, but make them not providing real data. Feed those fake sockets to src/dst QEMUs for recovery to let them go into RECOVER stage without going out. Test that we can always kick it out and recover again with the right ports. This patch is based on Fabiano's version here: https://lore.kernel.org/r/877cowmdu0.fsf@suse.de Signed-off-by: Fabiano Rosas <farosas@suse.de> [peterx: write commit message, remove case 1, fix bugs, and more] Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231017202633.296756-4-peterx@redhat.com> |
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Steve Sistare
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e7b428d6bc |
tests/qtest: migration: add reboot mode test
[ Maintainer note: I put the test as flaky because our CI has problems with shared memory. We will remove the flaky bits as soon as we get a solution. ] Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <1698263069-406971-7-git-send-email-steven.sistare@oracle.com> |
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Stefan Hajnoczi
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235fe6d06e |
ufs-next-pull-request
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEUBfYMVl8eKPZB+73EuIgTA5dtgIFAmU/DfoACgkQEuIgTA5d tgKZ3g/+J38LTaktLPgUb0Kg390anPkIAkqqA1QZC8lC/FRSEWpgsNBqcvAASNTl jj1c80k/+Dvf9Ti1lmDNkuYczCFvKNJZQ1iRHmv2wc79A01GV0Ue6xayQjjNjoKK SBMIsFpArmFQjR2wGlkRc8PXha1JyWrsD4iPY6ZqedEcyuueLx69XbLL37FfVbQt 5IMnDqGkLCmrGowAjwurq2UM5IiYjeB4I5OwUgJC526zlyngXTFJimCWS6b2uUBk Yg1PnFffBsh11Pwmq4IZ1DAv3Bv/gFovenuatFqZrgqtfK7tEiARInIEsctu0U0a hPK/KojJAPF/cfMssRm1D1GCfsXM4tP2yFY/6q0wTRr9Dod8OSjlvfJR7+ez71/j aoY4N/nYYrZ6+pQNsPJcuBqQdtjdNUp4gUHx5qYxwwqZcHK4ubxpIvstmxceoLEX 3PG4O1iAapc/aL12ww9bYJ2lrbKGx7ZJU/Ij8bud8tYzLheG3xaYUEhonk7DE6+e AXFSad5CJTIF9Duh1uAMe1sV9GxELV8MHZSalqfGOhWYp7LzUBgouEJ1gQdOQbTK VsLs48WQ23OjWNKyAMaXQXdFO4FVbsjIg9nQXEHNRPkUownVHNVL8zu6EsXvHfch u691ygt5pD100SYdcDv73xTSeqP/rxqyYdxJl4LRkv/hGWU4y78= =Oisg -----END PGP SIGNATURE----- Merge tag 'pull-ufs-20231030' of https://gitlab.com/jeuk20.kim/qemu into staging ufs-next-pull-request # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEUBfYMVl8eKPZB+73EuIgTA5dtgIFAmU/DfoACgkQEuIgTA5d # tgKZ3g/+J38LTaktLPgUb0Kg390anPkIAkqqA1QZC8lC/FRSEWpgsNBqcvAASNTl # jj1c80k/+Dvf9Ti1lmDNkuYczCFvKNJZQ1iRHmv2wc79A01GV0Ue6xayQjjNjoKK # SBMIsFpArmFQjR2wGlkRc8PXha1JyWrsD4iPY6ZqedEcyuueLx69XbLL37FfVbQt # 5IMnDqGkLCmrGowAjwurq2UM5IiYjeB4I5OwUgJC526zlyngXTFJimCWS6b2uUBk # Yg1PnFffBsh11Pwmq4IZ1DAv3Bv/gFovenuatFqZrgqtfK7tEiARInIEsctu0U0a # hPK/KojJAPF/cfMssRm1D1GCfsXM4tP2yFY/6q0wTRr9Dod8OSjlvfJR7+ez71/j # aoY4N/nYYrZ6+pQNsPJcuBqQdtjdNUp4gUHx5qYxwwqZcHK4ubxpIvstmxceoLEX # 3PG4O1iAapc/aL12ww9bYJ2lrbKGx7ZJU/Ij8bud8tYzLheG3xaYUEhonk7DE6+e # AXFSad5CJTIF9Duh1uAMe1sV9GxELV8MHZSalqfGOhWYp7LzUBgouEJ1gQdOQbTK # VsLs48WQ23OjWNKyAMaXQXdFO4FVbsjIg9nQXEHNRPkUownVHNVL8zu6EsXvHfch # u691ygt5pD100SYdcDv73xTSeqP/rxqyYdxJl4LRkv/hGWU4y78= # =Oisg # -----END PGP SIGNATURE----- # gpg: Signature made Mon 30 Oct 2023 10:59:22 JST # gpg: using RSA key 5017D831597C78A3D907EEF712E2204C0E5DB602 # gpg: Good signature from "Jeuk Kim <jeuk20.kim@samsung.com>" [unknown] # gpg: aka "Jeuk Kim <jeuk20.kim@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 5017 D831 597C 78A3 D907 EEF7 12E2 204C 0E5D B602 * tag 'pull-ufs-20231030' of https://gitlab.com/jeuk20.kim/qemu: hw/ufs: Modify lu.c to share codes with SCSI subsystem Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Jeuk Kim
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096434fea1 |
hw/ufs: Modify lu.c to share codes with SCSI subsystem
This patch removes the code that ufs-lu was duplicating from scsi-hd and allows them to share code. It makes ufs-lu have a virtual scsi-bus and scsi-hd internally. This allows scsi related commands to be passed thorugh to the scsi-hd. The query request and nop command work the same as the existing logic. Well-known lus do not have a virtual scsi-bus and scsi-hd, and handle the necessary scsi commands by emulating them directly. Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com> |
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Vladimir Sementsov-Ogievskiy
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1aa84a4b6e |
ipmi-bt-test: force ipv4
We open ipv4 listening socket. But "localhost" in qemu parameters may load to Qemu trying to connect with ipv6 and fail with "Connection refused". Force ipv4 by using ipv4 ip address. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-ID: <20231018191123.1176602-1-vsementsov@yandex-team.ru> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Philippe Mathieu-Daudé
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ec3ad0face |
tests/npcm7xx_adc: Clean up global variable shadowing
Rename the global 'adc' variable in order to avoid:
tests/qtest/npcm7xx_adc-test.c:98:58: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static uint32_t adc_read_con(QTestState *qts, const ADC *adc)
^
tests/qtest/npcm7xx_adc-test.c:103:55: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void adc_write_con(QTestState *qts, const ADC *adc, uint32_t value)
^
tests/qtest/npcm7xx_adc-test.c:108:59: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static uint32_t adc_read_data(QTestState *qts, const ADC *adc)
^
tests/qtest/npcm7xx_adc-test.c:119:53: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void adc_qom_set(QTestState *qts, const ADC *adc,
^
tests/qtest/npcm7xx_adc-test.c:135:57: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void adc_write_input(QTestState *qts, const ADC *adc,
^
tests/qtest/npcm7xx_adc-test.c:144:56: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void adc_write_vref(QTestState *qts, const ADC *adc, uint32_t value)
^
tests/qtest/npcm7xx_adc-test.c:162:59: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static uint32_t adc_prescaler(QTestState *qts, const ADC *adc)
^
tests/qtest/npcm7xx_adc-test.c:175:64: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void adc_wait_conv_finished(QTestState *qts, const ADC *adc,
^
tests/qtest/npcm7xx_adc-test.c:196:16: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
const ADC *adc = adc_p;
^
tests/qtest/npcm7xx_adc-test.c:207:16: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
const ADC *adc = adc_p;
^
tests/qtest/npcm7xx_adc-test.c:235:16: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
const ADC *adc = adc_p;
^
tests/qtest/npcm7xx_adc-test.c:267:16: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
const ADC *adc = adc_p;
^
tests/qtest/npcm7xx_adc-test.c:293:16: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
const ADC *adc = adc_p;
^
tests/qtest/npcm7xx_adc-test.c:311:16: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
const ADC *adc = adc_p;
^
tests/qtest/npcm7xx_adc-test.c:93:5: note: previous declaration is here
ADC adc = {
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20231009100251.56019-8-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Philippe Mathieu-Daudé
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a186fedbef |
tests/rtl8139: Clean up global variable shadowing
Rename the variable to fix:
tests/qtest/rtl8139-test.c:28:33: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void save_fn(QPCIDevice *dev, int devfn, void *data)
^
tests/qtest/rtl8139-test.c:37:17: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
QPCIDevice *dev;
^
tests/qtest/rtl8139-test.c:25:20: note: previous declaration is here
static QPCIDevice *dev;
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20231009100251.56019-7-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Philippe Mathieu-Daudé
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e33ba60bdb |
tests/cdrom-test: Clean up global variable shadowing in prepare_image()
Rename the variable to fix:
tests/qtest/cdrom-test.c:40:50: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static int prepare_image(const char *arch, char *isoimage)
^
tests/qtest/cdrom-test.c:18:13: note: previous declaration is here
static char isoimage[] = "cdrom-boot-iso-XXXXXX";
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: John Snow <jsnow@redhat.com>
Message-ID: <20231009100251.56019-5-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Philippe Mathieu-Daudé
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79a8d00073 |
tests/virtio-scsi: Clean up global variable shadowing
Rename the (unused) 'allow' argument, following the pattern
used by the other tests in this file. This fixes:
tests/qtest/virtio-scsi-test.c:159:61: error: declaration shadows a variable in the global scope [-Werror,-Wshadow]
static void hotplug(void *obj, void *data, QGuestAllocator *alloc)
^
tests/qtest/virtio-scsi-test.c:37:25: note: previous declaration is here
static QGuestAllocator *alloc;
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-By: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20231009100251.56019-4-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Fabiano Rosas
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7789331b03 |
tests/qtest: Don't print messages from query instances
Now that we can query more than one binary, the "starting QEMU..." message can get a little noisy. Mute those messages unless we're running with --verbose. Only affects qtest_init() calls from within libqtest. The tests continue to output as usual. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20231018192741.25885-13-farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Fabiano Rosas
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6c6d2330a0 |
tests/qtest/migration: Allow user to specify a machine type
Accept the QTEST_QEMU_MACHINE_TYPE environment variable to take a machine type to use in the tests. The full machine type is recognized (e.g. pc-q35-8.2). Aliases (e.g. pc) are also allowed and resolve to the latest machine version for that alias, or, if using two QEMU binaries, to the latest common machine version between the two. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-12-farosas@suse.de> |
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Fabiano Rosas
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5050ad2a38 |
tests/qtest/migration: Support more than one QEMU binary
We have strict rules around migration compatibility between different QEMU versions but no test to validate the migration state between different binaries. Add infrastructure to allow running the migration tests with two different QEMU binaries as migration source and destination. The code now recognizes two new environment variables QTEST_QEMU_BINARY_SRC and QTEST_QEMU_BINARY_DST. In the absence of either of them, the test will use the QTEST_QEMU_BINARY variable. If both are missing then the tests are run with single binary as previously. The machine type is selected automatically as the latest machine type version that works with both binaries. Usage (only one of SRC|DST is allowed): QTEST_QEMU_BINARY_SRC=../build-8.2.0/qemu-system-x86_64 \ QTEST_QEMU_BINARY=../build-8.1.0/qemu-system-x86_64 \ ./tests/qtest/migration-test Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-11-farosas@suse.de> |
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Fabiano Rosas
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fa35b0cb25 |
tests/qtest/migration: Set q35 as the default machine for x86_86
Change the x86_64 to use the q35 machines in tests from now on. Keep testing the pc macine on 32bit. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-10-farosas@suse.de> |
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Fabiano Rosas
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3cb9c6553b |
tests/qtest/migration: Specify the geometry of the bootsector
We're about to enable the x86_64 tests to run with the q35 machine, but that machine does not work with the program we use to dirty the memory for the tests. The issue is that QEMU needs to guess the geometry of the "disk" we give to it and the guessed geometry doesn't pass the sanity checks done by SeaBIOS. This causes SeaBIOS to interpret the geometry as if needing a translation from LBA to CHS and SeaBIOS ends up miscomputing the number of cylinders and aborting due to that. The reason things work with the "pc" machine is that is uses ATA instead of AHCI like q35 and SeaBIOS has an exception for ATA that ends up skipping the sanity checks and ignoring translation altogether. Workaround this situation by specifying a geometry in the command line. Signed-off-by: Fabiano Rosas <farosas@suse.de> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-9-farosas@suse.de> |
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Fabiano Rosas
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c996139101 |
tests/qtest/migration: Define a machine for all architectures
Stop relying on defaults and select a machine explicitly for every architecture. This is a prerequisite for being able to select machine types for migration using different QEMU binaries for source and destination. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-8-farosas@suse.de> |
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Fabiano Rosas
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dcf389cbc8 |
tests/qtest/migration: Introduce find_common_machine_version
When using two different QEMU binaries for migration testing, we'll need to find what is the machine version that will work with both binaries. Add a helper for that. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-7-farosas@suse.de> |
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Fabiano Rosas
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a3c0ebc9b0 |
tests/qtest: Introduce qtest_resolve_machine_alias
The migration tests are being enhanced to test migration between different QEMU versions. A requirement of migration is that the machine type between source and destination matches, including the version. We cannot hardcode machine types in the tests because those change with each release. QEMU provides a machine type alias that has a fixed name, but points to the latest machine type at each release. Add a helper to resolve the alias into the exact machine type. E.g. "-machine pc" resolves to "pc-i440fx-8.2" Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-6-farosas@suse.de> |
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Fabiano Rosas
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1027fc0ae4 |
tests/qtest: Introduce qtest_has_machine_with_env
Add a variant of qtest_has_machine() that receives an environment variable containing an alternate QEMU binary path. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-5-farosas@suse.de> |
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Fabiano Rosas
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41b2eba4e5 |
tests/qtest: Allow qtest_get_machines to use an alternate QEMU binary
We're adding support for using more than one QEMU binary in tests. Modify qtest_get_machines() to take an environment variable that contains the QEMU binary path. Since the function keeps a cache of the machines list in the form of a static variable, refresh it any time the environment variable changes. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-4-farosas@suse.de> |
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Fabiano Rosas
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9931215bd3 |
tests/qtest: Introduce qtest_init_with_env
Add a version of qtest_init() that takes an environment variable containing the path of the QEMU binary. This allows tests to use more than one QEMU binary. If no variable is provided or the environment variable does not exist, that is not an error. Fallback to using QTEST_QEMU_BINARY. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-3-farosas@suse.de> |
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Fabiano Rosas
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f4a7b30fcd |
tests/qtest: Allow qtest_qemu_binary to use a custom environment variable
We're adding support for testing migration using two different QEMU binaries. We'll provide the second binary in a new environment variable. Allow qtest_qemu_binary() to receive the name of the new variable. If the new environment variable is not set, that's not an error, we use QTEST_QEMU_BINARY as a fallback. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231018192741.25885-2-farosas@suse.de> |
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Thomas Huth
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04131e0009 |
tests/qtest/migration-test: Disable the analyze-migration.py test on s390x
The analyze-migration.py script fails on s390x hosts:
Traceback (most recent call last):
File "scripts/analyze-migration.py", line 662, in <module>
dump.read(dump_memory = args.memory)
File "scripts/analyze-migration.py", line 596, in read
classdesc = self.section_classes[section_key]
KeyError: ('s390-storage_attributes', 0)
It obviously never has been adapted to s390x yet, so until this
has been done, disable this test on s390x.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-ID: <20231018091239.164452-1-thuth@redhat.com>
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Fabiano Rosas
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3dc35470c8 |
tests/qtest: migration-test: Add tests for file-based migration
Add basic tests for file-based migration. Note that we cannot use test_precopy_common because that routine expects it to be possible to run the migration live. With the file transport there is no live migration because we must wait for the source to finish writing the migration data to the file before the destination can start reading. Add a new migration function specifically to handle the file migration. Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230712190742.22294-7-farosas@suse.de> |
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Fabiano Rosas
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d864756e87 |
tests/qtest/migration: Add a test for the analyze-migration script
Add a smoke test that migrates to a file and gives it to the script. It should catch the most annoying errors such as changes in the ram flags. After code has been merged it becomes way harder to figure out what is causing the script to fail, the person making the change is the most likely to know right away what the problem is. Signed-off-by: Fabiano Rosas <farosas@suse.de> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231009184326.15777-7-farosas@suse.de> |
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Stefan Hajnoczi
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2778f754e6 |
hw/ufs: fixes
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEUBfYMVl8eKPZB+73EuIgTA5dtgIFAmUozswACgkQEuIgTA5d tgITExAAo0BSNir4I5MfeNIjZTNNdxLXDl0+92JyairB2m/gWH/02jGtrJBYp5On ELnixKj2Ntn9IIRr3NwQHNTnDOZHRkUBH+pRVeMbZ+IWLjEoWQdl03ge7e9sHai3 CLXB4HPSnXddy1SmS9FEkdBWopqxKF4BLZnpAfwh/dj2fzSyDyNIMmGoRimRQhph 9A90304ERUdpREAXncTgSdXeDZz+lScadzUJZrPPiG2ZHXL+qzDCX7ojEnNaUFxz W1IfriI8oeeORfCQaNEOncLKhSwE1WscGxP0vILPApKOu251tObgSbK90QlQR2qT BMl7k4BDfYeksXMGc0BXVFrOfv1ud86NlCE2OokK6HBZVuHio4C6TU/t65MC4Rw5 mJ8CPgbN+7sgVmAGo0sLYzI6GiRR27VqqLh6KXVAa5c/fAdt5pHSkakwSvxiXsAl EqskmOY2em5O//+7CWN1CtY+I2pHyltMXAi3Cb2vjweNx88kuhmxFQWeZVI10/H3 gNrNfu32+ihDLMqR7uQamdAZV0lnIwp97nCbf3LzpM0btjl70QvGZhsbiCDiLQrG mJjnaix4xDb8T21WKrI8DKcwR4rvD8hZsCUp31XJnA8HWtdPnEQldK8NEGNlU5ye lrGc6gxiwZLCBBIj9lwbZW3Zv9Vz9jNWISOmY+KWLCIus98DBxQ= =XXsQ -----END PGP SIGNATURE----- Merge tag 'pull-ufs-20231013' of https://gitlab.com/jeuk20.kim/qemu into staging hw/ufs: fixes # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEUBfYMVl8eKPZB+73EuIgTA5dtgIFAmUozswACgkQEuIgTA5d # tgITExAAo0BSNir4I5MfeNIjZTNNdxLXDl0+92JyairB2m/gWH/02jGtrJBYp5On # ELnixKj2Ntn9IIRr3NwQHNTnDOZHRkUBH+pRVeMbZ+IWLjEoWQdl03ge7e9sHai3 # CLXB4HPSnXddy1SmS9FEkdBWopqxKF4BLZnpAfwh/dj2fzSyDyNIMmGoRimRQhph # 9A90304ERUdpREAXncTgSdXeDZz+lScadzUJZrPPiG2ZHXL+qzDCX7ojEnNaUFxz # W1IfriI8oeeORfCQaNEOncLKhSwE1WscGxP0vILPApKOu251tObgSbK90QlQR2qT # BMl7k4BDfYeksXMGc0BXVFrOfv1ud86NlCE2OokK6HBZVuHio4C6TU/t65MC4Rw5 # mJ8CPgbN+7sgVmAGo0sLYzI6GiRR27VqqLh6KXVAa5c/fAdt5pHSkakwSvxiXsAl # EqskmOY2em5O//+7CWN1CtY+I2pHyltMXAi3Cb2vjweNx88kuhmxFQWeZVI10/H3 # gNrNfu32+ihDLMqR7uQamdAZV0lnIwp97nCbf3LzpM0btjl70QvGZhsbiCDiLQrG # mJjnaix4xDb8T21WKrI8DKcwR4rvD8hZsCUp31XJnA8HWtdPnEQldK8NEGNlU5ye # lrGc6gxiwZLCBBIj9lwbZW3Zv9Vz9jNWISOmY+KWLCIus98DBxQ= # =XXsQ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 13 Oct 2023 00:59:56 EDT # gpg: using RSA key 5017D831597C78A3D907EEF712E2204C0E5DB602 # gpg: Good signature from "Jeuk Kim <jeuk20.kim@samsung.com>" [unknown] # gpg: aka "Jeuk Kim <jeuk20.kim@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 5017 D831 597C 78A3 D907 EEF7 12E2 204C 0E5D B602 * tag 'pull-ufs-20231013' of https://gitlab.com/jeuk20.kim/qemu: hw/ufs: Fix incorrect register fields hw/ufs: Fix code coverity issues Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Jeuk Kim
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97970dae53 |
hw/ufs: Fix code coverity issues
Fixed four ufs-related coverity issues. The coverity issues and fixes are as follows 1. CID 1519042: Security issue with the rand() function Changed to use a fixed value (0xab) instead of rand() as the value for testing 2. CID 1519043: Dereference after null check Removed useless (redundant) null checks 3. CID 1519050: Out-of-bounds access issue Fix to pass an array type variable to find_first_bit and find_next_bit using DECLARE_BITMAP() 4. CID 1519051: Out-of-bounds read issue Fix incorrect range check for lun Fix coverity CID: 1519042 1519043 1519050 1519051 Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com> |
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Chris Rauer
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d0353b6e7b |
tests/qtest: Fix npcm7xx_timer-test.c flaky test
npcm7xx_timer-test occasionally fails due to the state of the timers from the previous test iteration. Advancing the clock step after the reset resolves this issue. Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1897 Signed-off-by: Chris Rauer <crauer@google.com> Message-ID: <20230929000831.691559-1-crauer@google.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Fabiano Rosas
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5274274c26 |
tests/qtest: migration: Add support for negative testing of qmp_migrate
There is currently no way to write a test for errors that happened in qmp_migrate before the migration has started. Add a version of qmp_migrate that ensures an error happens. To make use of it a test needs to set MigrateCommon.result as MIG_TEST_QMP_ERROR. Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230712190742.22294-6-farosas@suse.de> |
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Fabiano Rosas
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6830e53b4b |
tests/qtest: migration: Use migrate_incoming_qmp where appropriate
Use the new migrate_incoming_qmp helper in the places that currently open-code calling migrate-incoming. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230712190742.22294-4-farosas@suse.de> |
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Fabiano Rosas
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28fa97e006 |
tests/qtest: migration: Add migrate_incoming_qmp helper
file-based migration requires the target to initiate its migration after the source has finished writing out the data in the file. Currently there's no easy way to initiate 'migrate-incoming', allow this by introducing migrate_incoming_qmp helper, similarly to migrate_qmp. Also make sure migration events are enabled and wait for the incoming migration to start before returning. This avoid a race when querying the migration status too soon after issuing the command. Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230712190742.22294-3-farosas@suse.de> |
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Fabiano Rosas
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9d47929034 |
tests/qtest: migration: Expose migrate_set_capability
The following patch will make use of this function from within migrate-helpers.c, so move it there. Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230712190742.22294-2-farosas@suse.de> |
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Stefan Hajnoczi
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0ad0d9dcd1 |
seabios: update to git snapshot
Give seabios a bit real world testing before tagging a release. Update to release will follow later in the devel cycle. v3: update mmio64 acpi test. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmUlNMUACgkQTLbY7tPo cTgp5RAA154WTGRGEoBveu8ocIVNzPxDB8esLBDmsQ7VSKo6e7wJvS+IyPBVYDSW O0p8Hr/2WlXV1BA1pVUyxzEN4AwqiRDBw4Elir6n//MF7r0wR84401hz6er+4O8j U/xkMXPL/mVV+dulNq+ACjt0nRWIQgdlxEnIl9AY7Nbx3l8NM70PrxRbiG/CtRUz gJW3uDU5xRWWGsI7tO8ZEuB2RRQ9B1uCw2ljx9QbxDonJABLUe6YVOI/QhBboX4B 2lIezGxRzDwvCdgHXCraakm0ZE6fL9FlHJ4tyapWt21ggkHA6+5oPcx/zisNuCIy EMiu6p7ttlC3AiaXUmjdCYboRzNKV+S6NvweqzQis5aUedomuFDt3yKo8BqHdzkO uxSFbzpVxXzSXer1OlRZfVGxME35oyfPfeRPVNpef4zg/XdtOeAhckMVHr72QqEd pRyR2x+CTxzJ2SsbQ21AS+0PUtEa3JHcna6VMlblCO4uRppb/cnpq6SA2m343PCB D9IVgtui7+VEbaTxMmkUfOLTP/+QQnF6KOCcOlGtB6HjzqNfJnwuu2k6RsYCkdZf 3tJIdVv72LsopZNHYrqm7iU3XpEBGqFdv3Dq3pm35uW1nRKBdr2VQPjANfttHKxd pUFve1EObHDRTbEFXI0ALvdlDLSX/54McTFF9BKuRPyuxJKyvPM= =7FXs -----END PGP SIGNATURE----- Merge tag 'firmware/seabios-20231010-pull-request' of https://gitlab.com/kraxel/qemu into staging seabios: update to git snapshot Give seabios a bit real world testing before tagging a release. Update to release will follow later in the devel cycle. v3: update mmio64 acpi test. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmUlNMUACgkQTLbY7tPo # cTgp5RAA154WTGRGEoBveu8ocIVNzPxDB8esLBDmsQ7VSKo6e7wJvS+IyPBVYDSW # O0p8Hr/2WlXV1BA1pVUyxzEN4AwqiRDBw4Elir6n//MF7r0wR84401hz6er+4O8j # U/xkMXPL/mVV+dulNq+ACjt0nRWIQgdlxEnIl9AY7Nbx3l8NM70PrxRbiG/CtRUz # gJW3uDU5xRWWGsI7tO8ZEuB2RRQ9B1uCw2ljx9QbxDonJABLUe6YVOI/QhBboX4B # 2lIezGxRzDwvCdgHXCraakm0ZE6fL9FlHJ4tyapWt21ggkHA6+5oPcx/zisNuCIy # EMiu6p7ttlC3AiaXUmjdCYboRzNKV+S6NvweqzQis5aUedomuFDt3yKo8BqHdzkO # uxSFbzpVxXzSXer1OlRZfVGxME35oyfPfeRPVNpef4zg/XdtOeAhckMVHr72QqEd # pRyR2x+CTxzJ2SsbQ21AS+0PUtEa3JHcna6VMlblCO4uRppb/cnpq6SA2m343PCB # D9IVgtui7+VEbaTxMmkUfOLTP/+QQnF6KOCcOlGtB6HjzqNfJnwuu2k6RsYCkdZf # 3tJIdVv72LsopZNHYrqm7iU3XpEBGqFdv3Dq3pm35uW1nRKBdr2VQPjANfttHKxd # pUFve1EObHDRTbEFXI0ALvdlDLSX/54McTFF9BKuRPyuxJKyvPM= # =7FXs # -----END PGP SIGNATURE----- # gpg: Signature made Tue 10 Oct 2023 07:25:57 EDT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * tag 'firmware/seabios-20231010-pull-request' of https://gitlab.com/kraxel/qemu: tests/acpi: disable tests/data/acpi/q35/DSDT.mmio64 updates tests/acpi: update expected data files seabios: update binaries to git snapshot seabios: update submodule to git snapshot tests/acpi: enable tests/data/acpi/q35/DSDT.mmio64 updates tests/bios-tables-test: tcg-emulate opteron for mmio64 test Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Gerd Hoffmann
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e83f3600f9 |
tests/acpi: disable tests/data/acpi/q35/DSDT.mmio64 updates
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> |
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Gerd Hoffmann
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9a5ac9c261 |
tests/acpi: enable tests/data/acpi/q35/DSDT.mmio64 updates
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> |
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Gerd Hoffmann
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7ff1b8c088 |
tests/bios-tables-test: tcg-emulate opteron for mmio64 test
seabios starts to make the placement of the 64bit mmio window depend on the physical address space. Run the testcase with a fixed processor on tcg to avoid different results depending on the host machine. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> |
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Paolo Bonzini
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912eef205a |
audio, qtest: get rid of QEMU_AUDIO_DRV
Default audio devices can now be created with "-audio". Tests for soundcards were already using "-audiodev" if they want to specify a particular backend, for the others remove the last remnants of legacy audio configuration. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Philippe Mathieu-Daudé
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c2646d4958 |
fuzz: Correct invalid mentions of 'softmmu' by 'system'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Message-ID: <20231004090629.37473-5-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Stefan Hajnoczi
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2f3913f4b2 |
virtio,pci: features, cleanups
vdpa:
shadow vq vlan support
net migration with cvq
cxl:
support emulating 4 HDM decoders
serial number extended capability
virtio:
hared dma-buf
Fixes, cleanups all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-----BEGIN PGP SIGNATURE-----
iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmUd4/YPHG1zdEByZWRo
YXQuY29tAAoJECgfDbjSjVRpyM8H/02cRbJcQOjYt7j68zPW6GaDXxBI/UmdWDyG
15LZZbGNOPjyjNd3Vz1M7stQ5rhoKcgo/RdI+0E60a78svgW5JvpXoXR3pksc3Dx
v28B/akXwHUErYFSZQ+2VHNc8OhCd0v2ehxZxbwPEAYIOAj3hcCIVoPGXTnKJmAJ
imr5hjH0wZUc0+xdsmn8Vfdv5NTzpwfVObbGiMZejeJsaoh0y6Rt8RANBMY67KQD
S7/HPlVuDYf/y43t4ZEHNYuV9RaCdZZYlLWwV1scdKaYcofgmtJOKbOdCjHRXgj+
004Afb3rggIoCfnCzOFzhGx+MLDtLjvEn2N4oLEWCLi+k/3huaA=
=GAvH
-----END PGP SIGNATURE-----
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pci: features, cleanups
vdpa:
shadow vq vlan support
net migration with cvq
cxl:
support emulating 4 HDM decoders
serial number extended capability
virtio:
hared dma-buf
Fixes, cleanups all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53 commits)
libvhost-user: handle shared_object msg
vhost-user: add shared_object msg
hw/display: introduce virtio-dmabuf
util/uuid: add a hash function
virtio: remove unused next argument from virtqueue_split_read_next_desc()
virtio: remove unnecessary thread fence while reading next descriptor
virtio: use shadow_avail_idx while checking number of heads
libvhost-user.c: add assertion to vu_message_read_default
pcie_sriov: unregister_vfs(): fix error path
hw/i386/pc: improve physical address space bound check for 32-bit x86 systems
amd_iommu: Fix APIC address check
vdpa net: follow VirtIO initialization properly at cvq isolation probing
vdpa net: stop probing if cannot set features
vdpa net: fix error message setting virtio status
hw/pci-bridge/cxl-upstream: Add serial number extended capability support
hw/cxl: Support 4 HDM decoders at all levels of topology
hw/cxl: Fix and use same calculation for HDM decoder block size everywhere
hw/cxl: Add utility functions decoder interleave ways and target count.
hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c
vdpa net: zero vhost_vdpa iova_tree pointer at cleanup
...
Conflicts:
hw/core/machine.c
Context conflict with commit
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Ani Sinha
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cf0386509e |
hw/i386/pc: improve physical address space bound check for 32-bit x86 systems
32-bit x86 systems do not have a reserved memory for hole64. On those 32-bit
systems without PSE36 or PAE CPU features, hotplugging memory devices are not
supported by QEMU as QEMU always places hotplugged memory above 4 GiB boundary
which is beyond the physical address space of the processor. Linux guests also
does not support memory hotplug on those systems. Please see Linux
kernel commit b59d02ed08690 ("mm/memory_hotplug: disable the functionality
for 32b") for more details.
Therefore, the maximum limit of the guest physical address in the absence of
additional memory devices effectively coincides with the end of
"above 4G memory space" region for 32-bit x86 without PAE/PSE36. When users
configure additional memory devices, after properly accounting for the
additional device memory region to find the maximum value of the guest
physical address, the address will be outside the range of the processor's
physical address space.
This change adds improvements to take above into consideration.
For example, previously this was allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
With this change now it is no longer allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
qemu-system-x86_64: Address space limit 0xffffffff < 0x2bfffffff phys-bits too low (32)
However, the following are allowed since on both cases physical address
space of the processor is 36 bits:
$ ./qemu-system-x86_64 -cpu pentium2 -m size=10G
$ ./qemu-system-x86_64 -cpu pentium,pse36=on -m size=10G
For 32-bit, without PAE/PSE36, hotplugging additional memory is no longer allowed.
$ ./qemu-system-i386 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too low (32)
$ ./qemu-system-i386 -machine q35 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too low (32)
A new compatibility flag is introduced to make sure pc_max_used_gpa() keeps
returning the old value for machines 8.1 and older.
Therefore, the above is still allowed for older machine types in order to support
compatibility. Hence, the following still works:
$ ./qemu-system-i386 -machine pc-i440fx-8.1 -m size=1G,maxmem=3G,slots=2
$ ./qemu-system-i386 -machine pc-q35-8.1 -m size=1G,maxmem=3G,slots=2
Further, following is also allowed as with PSE36, the processor has 36-bit
address space:
$ ./qemu-system-i386 -cpu 486,pse36=on -m size=1G,maxmem=3G,slots=2
After calling CPUID with EAX=0x80000001, all AMD64 compliant processors
have the longmode-capable-bit turned on in the extended feature flags (bit 29)
in EDX. The absence of CPUID longmode can be used to differentiate between
32-bit and 64-bit processors and is the recommended approach. QEMU takes this
approach elsewhere (for example, please see x86_cpu_realizefn()), With
this change, pc_max_used_gpa() also uses the same method to detect 32-bit
processors.
Unit tests are modified to not run 32-bit x86 tests that use memory hotplug.
Suggested-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230922160413.165702-1-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Juan Quintela
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0368ace8f9 |
migration-test: simplify shmem_opts handling
Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-4-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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22d3c6e16c |
migration-test: dirtylimit checks for x86_64 arch before
So no need to assert we are in x86_64. Once there, refactor the function to remove useless variables. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-11-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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0c690d3e2a |
migration-test: Add bootfile_create/delete() functions
The bootsector code is read only from the guest (otherwise we are going to have problems with it being read from both source and destination). Create a single copy for all the tests. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-10-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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877cec63d7 |
migration-test: bootpath is the same for all tests and for all archs
So just make it a global variable. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-9-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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71d3612401 |
migration-test: Create kvm_opts
So arch_dirty_ring option becomes one option like the others. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-8-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Paolo Bonzini
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168d46749d |
m48t59-test: avoid possible overflow on ABS
Originally meant to avoid a shadowed variable "s", which was fixed by renaming the outer declaration to "qts". Avoid the chance of an overflow in the computation of ABS(t - s). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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ea985d235b |
pc_piix: remove pc-i440fx-1.4 up to pc-i440fx-1.7
These are the last users of the 128K SeaBIOS blob in the i440FX family. Removing them allows us to drop PCI support from the 128K blob, thus making it easier to update SeaBIOS to newer versions. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Stefan Hajnoczi
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494a6a2cf7 |
* Make keyutils independent from keyring in meson.build
* Simplify the NIC init code of the jazz machine a little bit * Minor qtest and avocado fixes -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmURS8gRHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbVn4A/+NQKFZcN7gVn5JXkK7kf6i01LNmAoqjj9 QeQL+WCoNC68OApw7DxIEnpBYT0G42NTHHx4SYeOvzJUzCpeWcxYzQUz58ObZML7 +OKsiOsaHu3/qOuihBCn43et6moLdDCWbee5Zr6JQv/Fjn3q3nEQZnJDWdw8vm1v csYQJZOD6HelLVMmbLfl1szzrykDTT53NhPncH/SjPz6we17sKqHqmT6LBUIsXcV u2LaowppKmT7Ooexu6SmsCagLhtWuYo1iGGcRqoojtRWo7eZtWLrAy2DJpyFkPBW AIYBfntRISZv4eBGCxcVfvODD/Q4OXHuYTfGzD3m+ELJ6hUk/+d4/aHJ2hm+KEm+ AD0IpDtimaEmyQTPlaWHhhEur/82JZ+zYlxUMPf3+hglB/rbr6fhA0SMAV6nwR0r N8jnB8UCml9oDxJVvDZyrcPMGFs1xlr5FVSHHEoL338SvSfjG3NOEtcNao9n6A8d rO2CfPzI7peQhKWAzJL+qpnmenyIniH23tFnf2mpOZ0g45ZWtJeT0CXL3aQO3XAZ m56pkM0d/etAHHRoLQ5D/iKZpwiTRLjdzsJ0gMAQsIuRlG/j5h+zou0vUMgm6F8F igRHLxytlywZBTCABm2XIlKmaJp8hQlVQMpKsv/BwzTvzzk0GGS5d1qzzFt5WWR7 4rSalTn5Xuw= =FioB -----END PGP SIGNATURE----- Merge tag 'pull-request-2023-09-25' of https://gitlab.com/thuth/qemu into staging * Make keyutils independent from keyring in meson.build * Simplify the NIC init code of the jazz machine a little bit * Minor qtest and avocado fixes # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmURS8gRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVn4A/+NQKFZcN7gVn5JXkK7kf6i01LNmAoqjj9 # QeQL+WCoNC68OApw7DxIEnpBYT0G42NTHHx4SYeOvzJUzCpeWcxYzQUz58ObZML7 # +OKsiOsaHu3/qOuihBCn43et6moLdDCWbee5Zr6JQv/Fjn3q3nEQZnJDWdw8vm1v # csYQJZOD6HelLVMmbLfl1szzrykDTT53NhPncH/SjPz6we17sKqHqmT6LBUIsXcV # u2LaowppKmT7Ooexu6SmsCagLhtWuYo1iGGcRqoojtRWo7eZtWLrAy2DJpyFkPBW # AIYBfntRISZv4eBGCxcVfvODD/Q4OXHuYTfGzD3m+ELJ6hUk/+d4/aHJ2hm+KEm+ # AD0IpDtimaEmyQTPlaWHhhEur/82JZ+zYlxUMPf3+hglB/rbr6fhA0SMAV6nwR0r # N8jnB8UCml9oDxJVvDZyrcPMGFs1xlr5FVSHHEoL338SvSfjG3NOEtcNao9n6A8d # rO2CfPzI7peQhKWAzJL+qpnmenyIniH23tFnf2mpOZ0g45ZWtJeT0CXL3aQO3XAZ # m56pkM0d/etAHHRoLQ5D/iKZpwiTRLjdzsJ0gMAQsIuRlG/j5h+zou0vUMgm6F8F # igRHLxytlywZBTCABm2XIlKmaJp8hQlVQMpKsv/BwzTvzzk0GGS5d1qzzFt5WWR7 # 4rSalTn5Xuw= # =FioB # -----END PGP SIGNATURE----- # gpg: Signature made Mon 25 Sep 2023 04:58:48 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-09-25' of https://gitlab.com/thuth/qemu: tests/avocado: fix waiting for vm shutdown in replay_linux hw/mips/jazz: Simplify the NIC setup code hw/mips/jazz: Move the NIC init code into a separate function tests/qtest/netdev-socket: Do not test multicast on Darwin tests/qtest/m48t59-test: Silence compiler warning with -Wshadow tests/qtest/netdev-socket: Raise connection timeout to 120 seconds meson.build: Make keyutils independent from keyring Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
|
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Stefan Hajnoczi
|
29578f5757 |
* add host ticks function for RISC-V
* target/i386: Export GDS_NO bit * target/i386: add support for bit 56 of MSR_IA32_VMX_BASIC * first part of audiodev cleanups -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmUNtYUUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroN7Uwf9Fy4aE1PHzSNr2FqT4rUSYrT4N8cL QiPeB8JiJUnl73TcCkTwi7S/Az+37okv+Qsr7eh1wdarY8DOYir9dGJU3TGzICSw cgPImb99rhBc2kEmwciCWGlhXIMD8WNN64EanPPg5VeQYdzrorYwl7jCTMQMBR5H wtOq3f6FfYJonVwZ6YOmbioD2mFfoGBuiDcYmTTw440vrruKqHagbm5onD1SY9kR SM0/HXcYaKB6Ae9qNKhyR9h94KZzDUkCvcTLdFGtK90GBs4VxZVHQn6Dpkh5lPtT t0MbMv1mcO6ODzg9TxO3gUAgoklTy3gM2wISXo5C9NGuxmF2svwkuQl5pg== =CuIa -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * add host ticks function for RISC-V * target/i386: Export GDS_NO bit * target/i386: add support for bit 56 of MSR_IA32_VMX_BASIC * first part of audiodev cleanups # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmUNtYUUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroN7Uwf9Fy4aE1PHzSNr2FqT4rUSYrT4N8cL # QiPeB8JiJUnl73TcCkTwi7S/Az+37okv+Qsr7eh1wdarY8DOYir9dGJU3TGzICSw # cgPImb99rhBc2kEmwciCWGlhXIMD8WNN64EanPPg5VeQYdzrorYwl7jCTMQMBR5H # wtOq3f6FfYJonVwZ6YOmbioD2mFfoGBuiDcYmTTw440vrruKqHagbm5onD1SY9kR # SM0/HXcYaKB6Ae9qNKhyR9h94KZzDUkCvcTLdFGtK90GBs4VxZVHQn6Dpkh5lPtT # t0MbMv1mcO6ODzg9TxO3gUAgoklTy3gM2wISXo5C9NGuxmF2svwkuQl5pg== # =CuIa # -----END PGP SIGNATURE----- # gpg: Signature made Fri 22 Sep 2023 11:40:53 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: vl: recognize audiodev groups in configuration files tests/qtest: Specify audiodev= and -audiodev hw/display/xlnx_dp.c: Add audiodev property hw/audio/lm4549: Add errp error reporting to init function hw/audio: Simplify hda audio init hw/input/tsc210x: Extract common init code into new function qemu/timer: Add host ticks function for RISC-V target/i386: Export GDS_NO bit to guests target/i386: enumerate bit 56 of MSR_IA32_VMX_BASIC Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Philippe Mathieu-Daudé
|
02e8828aa7 |
tests/qtest/netdev-socket: Do not test multicast on Darwin
Do not run this test on Darwin, otherwise we get: qemu-system-arm: -netdev dgram,id=st0,remote.type=inet,remote.host=230.0.0.1,remote.port=1234: can't add socket to multicast group 230.0.0.1: Can't assign requested address Broken pipe ../../tests/qtest/libqtest.c:191: kill_qemu() tried to terminate QEMU process but encountered exit status 1 (expected 0) Abort trap: 6 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230918062549.2363-1-philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Thomas Huth
|
926bef1d82 |
tests/qtest/m48t59-test: Silence compiler warning with -Wshadow
When compiling this file with -Wshadow=local , we get:
../tests/qtest/m48t59-test.c: In function ‘bcd_check_time’:
../tests/qtest/m48t59-test.c:195:17: warning: declaration of ‘s’
shadows a previous local [-Wshadow=local]
195 | long t, s;
| ^
../tests/qtest/m48t59-test.c:158:17: note: shadowed declaration is here
158 | QTestState *s = m48t59_qtest_start();
| ^
Rename the QTestState variable to "qts" which is the common
naming for such a variable in other tests.
Reported-by: Markus Armbruster <armbru@redhat.com>
Message-ID: <20230922163742.149444-1-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
|
|
Stefan Hajnoczi
|
0daaf2761f |
tests/qtest/netdev-socket: Raise connection timeout to 120 seconds
The test still fails intermittently with a 60 second timeout in the
GitLab CI environment. Raise the timeout to 120 seconds.
576/839 ERROR:../tests/qtest/netdev-socket.c:293:test_stream_unix:
assertion failed (resp == expect):
("st0: index=0,type=stream,connection error\r\n" == "st0: index=0,type=stream,unix:/tmp/netdev-socket.UW5IA2/stream_unix\r\n") ERROR
576/839 qemu:qtest+qtest-sh4 / qtest-sh4/netdev-socket
ERROR 62.85s killed by signal 6 SIGABRT
>>> MALLOC_PERTURB_=249 QTEST_QEMU_BINARY=./qemu-system-sh4
QTEST_QEMU_STORAGE_DAEMON_BINARY=./storage-daemon/qemu-storage-daemon
G_TEST_DBUS_DAEMON=/home/gitlab-runner/builds/-LCfcJ2T/0/qemu-project/qemu/tests/dbus-vmstate-daemon.sh
QTEST_QEMU_IMG=./qemu-img /home/gitlab-runner/builds/-LCfcJ2T/0/qemu-project/qemu/build/tests/qtest/netdev-socket --tap -k
――――――――――――――――――――――――――――――――――――― ✀ ―――――――――――――――――――――――――――――――――――――
stderr:
**
ERROR:../tests/qtest/netdev-socket.c:293:test_stream_unix: assertion failed (resp == expect): ("st0: index=0,type=stream,connection error\r\n" == "st0: index=0,type=stream,unix:/tmp/netdev-socket.UW5IA2/stream_unix\r\n")
(test program exited with status code -6)
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/1881
Fixes:
|
|
|
Martin Kletzander
|
50333482e1 |
tests/qtest: Specify audiodev= and -audiodev
This will enable removing deprecated default audiodev support. I did not figure out how to make the audiodev represented as an interface node, so this is a workaround. I am not sure what would be the proper way. Signed-off-by: Martin Kletzander <mkletzan@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <6e7f2808dd40679a415812767b88f2a411fc137f.1650874791.git.mkletzan@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Daniel P. Berrangé
|
49e9f8644b |
qtest: kill orphaned qtest QEMU processes on FreeBSD
On Linux we use PR_SET_PDEATHSIG to kill orphaned QEMU processes if we fail to call qtest_quit(), or the test program aborts/segvs. This prevents meson from hanging forever due to the orphaned process keeping stdout open. On FreeBSD we can achieve the same using PROC_PDEATHSIG_CTL, which gives us the equivalent protection against hangs. Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230912184130.3056054-3-berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230914155422.426639-6-alex.bennee@linaro.org> |
|
|
Daniel P. Berrangé
|
81395b6ec8 |
microbit: add missing qtest_quit() call
Without this call, the QEMU process is being left running which on
FreeBSD 13.2 at least, makes meson think the test is still running,
and thus execution of "make check" continues forever.
This fixes the regression introduced in:
commit
|
|
|
Tomasz Dzieciol
|
17ccd01647 |
igb: RX payload guest writting refactoring
Refactoring is done in preparation for support of multiple advanced descriptors RX modes, especially packet-split modes. Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com> |
|
|
Philippe Mathieu-Daudé
|
82fdcd3e14 |
tests/qtest/pflash: Clean up local variable shadowing
Fix:
tests/qtest/pflash-cfi02-test.c: In function ‘test_geometry’:
tests/qtest/pflash-cfi02-test.c:409:22: warning: declaration of ‘byte_addr’ shadows a previous local [-Wshadow=compatible-local]
409 | uint64_t byte_addr = (uint64_t)i * c->sector_len[region];
| ^~~~~~~~~
tests/qtest/pflash-cfi02-test.c:342:14: note: shadowed declaration is here
342 | uint64_t byte_addr = 0;
| ^~~~~~~~~
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230904162824.85385-4-philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
|
|
Stefan Hajnoczi
|
a7e8e30e7c |
target-arm queue:
* New CPU type: cortex-a710
* Implement new architectural features:
- FEAT_PACQARMA3
- FEAT_EPAC
- FEAT_Pauth2
- FEAT_FPAC
- FEAT_FPACCOMBINE
- FEAT_TIDCP1
* Xilinx Versal: Model the CFU/CFI
* Implement RMR_ELx registers
* Implement handling of HCR_EL2.TIDCP trap bit
* arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
* hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
* target/arm: Do not use gen_mte_checkN in trans_STGP
* arm64: Restore trapless ptimer access
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmT7VEkZHHBldGVyLm1h
eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3v7BEACENUKCxsFHRQSLmQkoBCT9
Lc4SJrGCbVUC6b+4s5ligZSWIoFzp/kY6NPpeRYqFa0DCxozd2T5D81/j7TpSo0C
wUFkZfUq1nGFJ4K5arYcDwhdTtJvvc07YrSbUqufBp6uNGqhR4YmDWPECqBfOlaj
7bgJM6axsg7FkJJh5zp4cQ4WEfp14MHWRPQWpVTI+9cxNmNymokSVRBhVFkM0Wen
WD4C/nYud8bOxpDfR8GkIqJ+UnUMhUNEhp28QmHdwywgg0zLWOE4ysIxo55cM0+0
FL3q45PL2e4S24UUx9dkxDBWnKEZ5qpQpPn9F6EhWzfm3n2dqr4uUnfWAEOg6NAi
vnGS9MlL7nZo69OM3h8g7yKDfTKYm2vl9HVZ0ytFA6PLoSnaQyQwli58qnLtiid3
17MWPoNQlq6G8tHUTPkrJjdA8XLz0iNPXe5G2kwhuM/S0Lv7ORzDc2pq4qBYLvIw
9nV0oUWqzyE7zH6bRKxbbPw2sMI7c8qQr9QRyZeLHL7HdcY5ExvX9FH+qii5JDR/
fZohi1pBoNNwYYTeSRnxgHiQ7OizYq0xQJhrdqcFF9voytZj1yZEZ0mp6Tq0/CIj
YkC/vEyLYBqgrJ2JeUjbV3h1RIzQcVaXxnxwGsyMyceACd6MNMmdbjR7bZk0lNIu
kh+aFEdKajPp56UseJiKBQ==
=5Shq
-----END PGP SIGNATURE-----
Merge tag 'pull-target-arm-20230908' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* New CPU type: cortex-a710
* Implement new architectural features:
- FEAT_PACQARMA3
- FEAT_EPAC
- FEAT_Pauth2
- FEAT_FPAC
- FEAT_FPACCOMBINE
- FEAT_TIDCP1
* Xilinx Versal: Model the CFU/CFI
* Implement RMR_ELx registers
* Implement handling of HCR_EL2.TIDCP trap bit
* arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
* hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
* target/arm: Do not use gen_mte_checkN in trans_STGP
* arm64: Restore trapless ptimer access
# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmT7VEkZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3v7BEACENUKCxsFHRQSLmQkoBCT9
# Lc4SJrGCbVUC6b+4s5ligZSWIoFzp/kY6NPpeRYqFa0DCxozd2T5D81/j7TpSo0C
# wUFkZfUq1nGFJ4K5arYcDwhdTtJvvc07YrSbUqufBp6uNGqhR4YmDWPECqBfOlaj
# 7bgJM6axsg7FkJJh5zp4cQ4WEfp14MHWRPQWpVTI+9cxNmNymokSVRBhVFkM0Wen
# WD4C/nYud8bOxpDfR8GkIqJ+UnUMhUNEhp28QmHdwywgg0zLWOE4ysIxo55cM0+0
# FL3q45PL2e4S24UUx9dkxDBWnKEZ5qpQpPn9F6EhWzfm3n2dqr4uUnfWAEOg6NAi
# vnGS9MlL7nZo69OM3h8g7yKDfTKYm2vl9HVZ0ytFA6PLoSnaQyQwli58qnLtiid3
# 17MWPoNQlq6G8tHUTPkrJjdA8XLz0iNPXe5G2kwhuM/S0Lv7ORzDc2pq4qBYLvIw
# 9nV0oUWqzyE7zH6bRKxbbPw2sMI7c8qQr9QRyZeLHL7HdcY5ExvX9FH+qii5JDR/
# fZohi1pBoNNwYYTeSRnxgHiQ7OizYq0xQJhrdqcFF9voytZj1yZEZ0mp6Tq0/CIj
# YkC/vEyLYBqgrJ2JeUjbV3h1RIzQcVaXxnxwGsyMyceACd6MNMmdbjR7bZk0lNIu
# kh+aFEdKajPp56UseJiKBQ==
# =5Shq
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 08 Sep 2023 13:05:13 EDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20230908' of https://git.linaro.org/people/pmaydell/qemu-arm: (26 commits)
arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
target/arm: Enable SCTLR_EL1.TIDCP for user-only
target/arm: Implement FEAT_TIDCP1
target/arm: Implement HCR_EL2.TIDCP
target/arm: Implement cortex-a710
target/arm: Implement RMR_ELx
arm64: Restore trapless ptimer access
target/arm: Do not use gen_mte_checkN in trans_STGP
hw/arm/versal: Connect the CFRAME_REG and CFRAME_BCAST_REG
hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFR
hw/misc: Introduce a model of Xilinx Versal's CFRAME_BCAST_REG
hw/misc: Introduce a model of Xilinx Versal's CFRAME_REG
hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal's CFU_SFR
hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO
hw/misc: Introduce a model of Xilinx Versal's CFU_APB
hw/misc: Introduce the Xilinx CFI interface
hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
target/arm: Implement FEAT_FPAC and FEAT_FPACCOMBINE
target/arm: Inform helpers whether a PAC instruction is 'combined'
target/arm: Implement FEAT_Pauth2
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
|
|
|
Stefan Hajnoczi
|
c5ea91da44 |
trivial patches for 2023-09-08
-----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmT68tMPHG1qdEB0bHMu bXNrLnJ1AAoJEHAbT2saaT5ZbEwH/2XcX1f4KcEJbgUn0JVhGQ5GH2c2jepZlkTZ 2dhvdEECbOPMg73hty0fyyWlyuLWdJ9cMpONfMtzmHTH8RKEOAbpn/zusyo3H+48 6cunyUpBqbmb7MHPchrN+JmvtvaSPSazsj2Zdkh+Y4WlfEYj+yVysQ4zQlBlRyHv iOTi6OdjxXg1QcbtJxAUhp+tKaRJzagiCpLkoyW2m8DIuV9cLVHMJsE3OMgfKNgK /S+O1fLcaDhuSCrHAbZzArF3Tr4bfLqSwDtGCJfQpqKeIQDJuI+41GLIlm1nYY70 IFJzEWMOrX/rcMG1CQnUFZOOyDSO+NfILwNnU+eyM49MUekmY54= =mmPS -----END PGP SIGNATURE----- Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging trivial patches for 2023-09-08 # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmT68tMPHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5ZbEwH/2XcX1f4KcEJbgUn0JVhGQ5GH2c2jepZlkTZ # 2dhvdEECbOPMg73hty0fyyWlyuLWdJ9cMpONfMtzmHTH8RKEOAbpn/zusyo3H+48 # 6cunyUpBqbmb7MHPchrN+JmvtvaSPSazsj2Zdkh+Y4WlfEYj+yVysQ4zQlBlRyHv # iOTi6OdjxXg1QcbtJxAUhp+tKaRJzagiCpLkoyW2m8DIuV9cLVHMJsE3OMgfKNgK # /S+O1fLcaDhuSCrHAbZzArF3Tr4bfLqSwDtGCJfQpqKeIQDJuI+41GLIlm1nYY70 # IFJzEWMOrX/rcMG1CQnUFZOOyDSO+NfILwNnU+eyM49MUekmY54= # =mmPS # -----END PGP SIGNATURE----- # gpg: Signature made Fri 08 Sep 2023 06:09:23 EDT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (22 commits) qxl: don't assert() if device isn't yet initialized hw/net/vmxnet3: Fix guest-triggerable assert() tests/qtest/usb-hcd: Remove the empty "init" tests target/ppc: use g_free() in test_opcode_table() hw/ppc: use g_free() in spapr_tce_table_post_load() trivial: Simplify the spots that use TARGET_BIG_ENDIAN as a numeric value accel/tcg: Fix typo in translator_io_start() description tests/qtest/test-hmp: Fix migrate_set_parameter xbzrle-cache-size test docs tests: Fix use of migrate_set_parameter qemu-options.hx: Rephrase the descriptions of the -hd* and -cdrom options hw/display/xlnx_dp: update comments block: spelling fixes misc/other: spelling fixes qga/: spelling fixes tests/: spelling fixes scripts/: spelling fixes include/: spelling fixes audio: spelling fixes xen: spelling fix riscv: spelling fixes ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Richard Henderson
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399e5e7125 |
target/arm: Implement FEAT_PACQARMA3
Implement the QARMA3 cryptographic algorithm for PAC calculation. Implement a cpu feature to select the algorithm and document it. Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230829232335.965414-6-richard.henderson@linaro.org Message-Id: <20230609172324.982888-4-aaron@os.amperecomputing.com> [rth: Merge cpu feature addition from another patch.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Thomas Huth
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0084f6834a |
tests/qtest/usb-hcd: Remove the empty "init" tests
These tests do nothing additional compared to the other test, so let's remove the empty functions to avoid wasting some few precious test cycles here. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> |
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Markus Armbruster
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4d841daeb2 |
tests/qtest/test-hmp: Fix migrate_set_parameter xbzrle-cache-size test
The command always fails with "Error: Parameter 'xbzrle_cache_size' expects a power of two no less than the target page size". The test passes anyway. Change the argument from 1 to 64k to make the test a bit more useful. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> |
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Markus Armbruster
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b21a6e31a1 |
docs tests: Fix use of migrate_set_parameter
docs/multi-thread-compression.txt uses parameter names with underscores instead of dashes. Wrong since day one. docs/rdma.txt, tests/qemu-iotests/181, and tests/qtest/test-hmp.c are wrong the same way since commit |
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Michael Tokarev
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96420a30e0 |
tests/: spelling fixes
with some rewording in tests/qemu-iotests/298 tests/qtest/fuzz/generic_fuzz.c tests/unit/test-throttle.c as suggested by Eric. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Eric Blake <eblake@redhat.com> |
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Jeuk Kim
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631c872614 |
tests/qtest: Introduce tests for UFS
This patch includes the following tests Test mmio read Test ufs device initialization and ufs-lu recognition Test I/O (Performs a write followed by a read to verify) Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 9e9207f54505e9ba30931849f949ff6f474ac333.1693980783.git.jeuk20.kim@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Stefan Hajnoczi
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03a3a62fbd |
* only build util/async-teardown.c when system build is requested
* target/i386: fix BQL handling of the legacy FERR interrupts * target/i386: fix memory operand size for CVTPS2PD * target/i386: Add support for AMX-COMPLEX in CPUID enumeration * compile plugins on Darwin * configure and meson cleanups * drop mkvenv support for Python 3.7 and Debian10 * add wrap file for libblkio * tweak KVM stubs -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmT5t6UUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMmjwf+MpvVuq+nn+3PqGUXgnzJx5ccA5ne O9Xy8+1GdlQPzBw/tPovxXDSKn3HQtBfxObn2CCE1tu/4uHWpBA1Vksn++NHdUf2 P0yoHxGskJu5iYYTtIcNw5cH2i+AizdiXuEjhfNjqD5Y234cFoHnUApt9e3zBvVO cwGD7WpPuSb4g38hHkV6nKcx72o7b4ejDToqUVZJ2N+RkddSqB03fSdrOru0hR7x V+lay0DYdFszNDFm05LJzfDbcrHuSryGA91wtty7Fzj6QhR/HBHQCUZJxMB5PI7F Zy4Zdpu60zxtSxUqeKgIi7UhNFgMcax2Hf9QEqdc/B4ARoBbboh4q4u8kQ== =dH7/ -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * only build util/async-teardown.c when system build is requested * target/i386: fix BQL handling of the legacy FERR interrupts * target/i386: fix memory operand size for CVTPS2PD * target/i386: Add support for AMX-COMPLEX in CPUID enumeration * compile plugins on Darwin * configure and meson cleanups * drop mkvenv support for Python 3.7 and Debian10 * add wrap file for libblkio * tweak KVM stubs # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmT5t6UUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroMmjwf+MpvVuq+nn+3PqGUXgnzJx5ccA5ne # O9Xy8+1GdlQPzBw/tPovxXDSKn3HQtBfxObn2CCE1tu/4uHWpBA1Vksn++NHdUf2 # P0yoHxGskJu5iYYTtIcNw5cH2i+AizdiXuEjhfNjqD5Y234cFoHnUApt9e3zBvVO # cwGD7WpPuSb4g38hHkV6nKcx72o7b4ejDToqUVZJ2N+RkddSqB03fSdrOru0hR7x # V+lay0DYdFszNDFm05LJzfDbcrHuSryGA91wtty7Fzj6QhR/HBHQCUZJxMB5PI7F # Zy4Zdpu60zxtSxUqeKgIi7UhNFgMcax2Hf9QEqdc/B4ARoBbboh4q4u8kQ== # =dH7/ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 07 Sep 2023 07:44:37 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (51 commits) docs/system/replay: do not show removed command line option subprojects: add wrap file for libblkio sysemu/kvm: Restrict kvm_pc_setup_irq_routing() to x86 targets sysemu/kvm: Restrict kvm_has_pit_state2() to x86 targets sysemu/kvm: Restrict kvm_get_apic_state() to x86 targets sysemu/kvm: Restrict kvm_arch_get_supported_cpuid/msr() to x86 targets target/i386: Restrict declarations specific to CONFIG_KVM target/i386: Allow elision of kvm_hv_vpindex_settable() target/i386: Allow elision of kvm_enable_x2apic() target/i386: Remove unused KVM stubs target/i386/cpu-sysemu: Inline kvm_apic_in_kernel() target/i386/helper: Restrict KVM declarations to system emulation hw/i386/fw_cfg: Include missing 'cpu.h' header hw/i386/pc: Include missing 'cpu.h' header hw/i386/pc: Include missing 'sysemu/tcg.h' header Revert "mkvenv: work around broken pip installations on Debian 10" mkvenv: assume presence of importlib.metadata Python: Drop support for Python 3.7 configure: remove dead code meson: list leftover CONFIG_* symbols ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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Paolo Bonzini
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1f2146f7ca |
configure, meson: remove target OS symbols from config-host.mak
Stop applying config-host.mak to the sourcesets, since it does not have any more CONFIG_* symbols coming from the command line. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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2564dcbf51 |
meson: do not unnecessarily use cmake for dependencies
Both gvnc and sysprof-capture come with pkg-config files, so specify the method to find them. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Niklas Cassel
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1a16ce64fd |
hw/ide/ahci: PxCI should not get cleared when ERR_STAT is set
For NCQ, PxCI is cleared on command queued successfully. For non-NCQ, PxCI is cleared on command completed successfully. Successfully means ERR_STAT, BUSY and DRQ are all cleared. A command that has ERR_STAT set, does not get to clear PxCI. See AHCI 1.3.1, section 5.3.8, states RegFIS:Entry and RegFIS:ClearCI, and 5.3.16.5 ERR:FatalTaskfile. In the case of non-NCQ commands, not clearing PxCI is needed in order for host software to be able to see which command slot that failed. Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Message-id: 20230609140844.202795-7-nks@flawful.org Signed-off-by: John Snow <jsnow@redhat.com> |
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Paolo Bonzini
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03b8a71e84 |
meson: test for CONFIG_TCG in config_all
CONFIG_TCG is not included in *-config-devices.h, so the test is always failing. Fixes: |
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Thomas Huth
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a864cc54ee |
tests/qtest/bios-tables-test: Check for virtio-iommu device before using it
The virtio-iommu device might be missing in the QEMU binary (e.g. in downstream RHEL builds), so let's better check for its availability first before using it. Message-Id: <20230822164948.65187-1-thuth@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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b2a7d8633f |
tests/qtest/netdev-socket: Avoid variable-length array in inet_get_free_port_multiple()
We use a variable-length array in inet_get_free_port_multiple(). This is only test code called at the start of a test, so switch to a heap allocation instead. The codebase has very few VLAs, and if we can get rid of them all we can make the compiler error on new additions. This is a defensive measure against security bugs where an on-stack dynamic allocation isn't correctly size-checked (e.g. CVE-2021-3527). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20230824164535.2652070-1-peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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0a1e462daf |
tests/qtest/usb-hcd-xhci-test: Check availability of devices before using them
The "usb-uas" and "usb-ccid" might not be compiled into the QEMU binary, so let's better check first whether they are available. Message-Id: <20230822163024.61529-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Chris Laplante
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a9c9bbee85 |
qtest: microbit-test: add tests for nRF51 DETECT
Exercise the DETECT mechanism of the GPIO peripheral. Signed-off-by: Chris Laplante <chris@laplante.io> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230728160324.1159090-7-chris@laplante.io [PMM: fixed coding style nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Chris Laplante
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a8610f8bd7 |
qtest: implement named interception of out-GPIO
Adds qtest_irq_intercept_out_named method, which utilizes a new optional name parameter to the irq_intercept_out qtest command. Signed-off-by: Chris Laplante <chris@laplante.io> Message-id: 20230728160324.1159090-4-chris@laplante.io Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Wei Wang
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06c48d6b37 |
qtest/migration-tests.c: use "-incoming defer" for postcopy tests
The Postcopy preempt capability is expected to be set before incoming starts, so change the postcopy tests to start with deferred incoming and call migrate-incoming after the cap has been set. Why the existing tests (without this patch) didn't fail? There could be two reasons: 1) "backlog" specifies the number of pending connections. As long as the server accepts the connections faster than the clients side connecting, connection will succeed. For the preempt test, it uses only 2 channels, so very likely to not have pending connections. 2) per my tests (on kernel 6.2), the number of pending connections allowed is actually "backlog + 1", which is 2 in this case. That said, the implementation of socket_start_incoming_migration_internal expects "migrate defer" to be used, and for safety, change the test to work with the expected usage. Signed-off-by: Wei Wang <wei.w.wang@intel.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230606101910.20456-3-wei.w.wang@intel.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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bc28a6111d |
migration-test: machine_opts is really arch specific
And it needs to be in both source and target, so put it on arch_opts. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-7-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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832c732c5d |
migration-test: Create arch_opts
This will contain the options needed for both source and target. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20230608224943.3877-6-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Juan Quintela
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42e52a8a77 |
migration-test: Make machine_opts regular with other options
Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-ID: <20230608224943.3877-5-quintela@redhat.com> |
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Juan Quintela
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e3131dc76a |
migration-test: Be consistent for ppc
It makes no sense that we don't have the same configuration on both sides. Reviewed-by: Laurent Vivier <lvivier@redhat.com> Message-ID: <20230608224943.3877-2-quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> |
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Fabiano Rosas
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94aaf6d8a5 |
tests/qtest: Fix typo in multifd cancel test
This wasn't noticed because the test is currently disabled.
Fixes: 02f56e3de ("tests/qtest: massively speed up migration-test")
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20230711212131.2370-1-farosas@suse.de>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Richard Henderson
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2bb9d628a7 |
pc,pci,virtio: cleanups, fixes, features
vhost-user-gpu: edid vhost-user-scmi device vhost-vdpa: _F_CTRL_RX and _F_CTRL_RX_EXTRA support for svq cleanups, fixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmSsjYMPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRp2vYH/20u6TAMssE/UAJoUU0ypbJkbHjDqiqDeuZN qDYazLUWIJTUbDnSfXAiRcdJuukEpEFcoHa9O6vgFE/SNod51IrvsJR9CbZxNmk6 D+Px9dkMckDE/yb8f6hhcHsi7/1v04I0oSXmJTVYxWSKQhD4Km6x8Larqsh0u4yd n6laZ+VK5H8sk6QvI5vMz+lYavACQVryiWV/GAigP21B0eQK79I5/N6y0q8/axD5 cpeTzUF+m33SfLfyd7PPmibCQFYrHDwosynSnr3qnKusPRJt2FzWkzOiZgbtgE2L UQ/S4sYTBy8dZJMc0wTywbs1bSwzNrkQ+uS0v74z9wCUYTgvQTA= =RsOh -----END PGP SIGNATURE----- Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging pc,pci,virtio: cleanups, fixes, features vhost-user-gpu: edid vhost-user-scmi device vhost-vdpa: _F_CTRL_RX and _F_CTRL_RX_EXTRA support for svq cleanups, fixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmSsjYMPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRp2vYH/20u6TAMssE/UAJoUU0ypbJkbHjDqiqDeuZN # qDYazLUWIJTUbDnSfXAiRcdJuukEpEFcoHa9O6vgFE/SNod51IrvsJR9CbZxNmk6 # D+Px9dkMckDE/yb8f6hhcHsi7/1v04I0oSXmJTVYxWSKQhD4Km6x8Larqsh0u4yd # n6laZ+VK5H8sk6QvI5vMz+lYavACQVryiWV/GAigP21B0eQK79I5/N6y0q8/axD5 # cpeTzUF+m33SfLfyd7PPmibCQFYrHDwosynSnr3qnKusPRJt2FzWkzOiZgbtgE2L # UQ/S4sYTBy8dZJMc0wTywbs1bSwzNrkQ+uS0v74z9wCUYTgvQTA= # =RsOh # -----END PGP SIGNATURE----- # gpg: Signature made Tue 11 Jul 2023 12:00:19 AM BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (66 commits) vdpa: Allow VIRTIO_NET_F_CTRL_RX_EXTRA in SVQ vdpa: Restore packet receive filtering state relative with _F_CTRL_RX_EXTRA feature vdpa: Allow VIRTIO_NET_F_CTRL_RX in SVQ vdpa: Avoid forwarding large CVQ command failures vdpa: Accessing CVQ header through its structure vhost: Fix false positive out-of-bounds vdpa: Restore packet receive filtering state relative with _F_CTRL_RX feature vdpa: Restore MAC address filtering state vdpa: Use iovec for vhost_vdpa_net_load_cmd() pcie: Specify 0 for ARI next function numbers pcie: Use common ARI next function number include/hw/virtio: document some more usage of notifiers include/hw/virtio: add kerneldoc for virtio_init include/hw/virtio: document virtio_notify_config hw/virtio: fix typo in VIRTIO_CONFIG_IRQ_IDX comments include/hw: document the device_class_set_parent_* fns include: attempt to document device_class_set_props vdpa: Fix possible use-after-free for VirtQueueElement pcie: Add hotplug detect state register to cmask virtio-iommu: Rework the traces in virtio_iommu_set_page_size_mask() ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Ani Sinha
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579edbd459 |
tests/qtest/hd-geo-test: fix incorrect pcie-root-port usage and simplify test
The test attaches a SCSI controller to a non-zero slot and a pcie-to-pci bridge on slot 0 on the same pcie-root-port. Since a downstream device can be attached to a pcie-root-port only on slot 0, the above test configuration is not allowed. Additionally using pcie.0 as id for pcie-to-pci bridge is incorrect as that id is reserved only for the root bus. In the test scenario, there is no need to attach a pcie-root-port to the root complex. A SCSI controller can be attached to a pcie-to-pci bridge which can then be directly attached to the root bus (pcie.0). Fix the test and simplify it. CC: mst@redhat.com CC: imammedo@redhat.com CC: Michael Labiuk <michael.labiuk@virtuozzo.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20230705115925.5339-5-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Ani Sinha
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bac4711b07 |
tests/acpi/bios-tables-test: update acpi blob q35/DSDT.noacpihp
Some fixes were committed in bios-tables-test in the previous commit. Update
the acpi blob and clear bios-tables-test-allowed-diff.h so that the test
continues to pass with the changes in the bios-tables-test.
Following is the asl diff between the old and the newly updated blob:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20210604 (64-bit version)
* Copyright (c) 2000 - 2021 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.noacpihp, Wed Jun 21 18:26:52 2023
+ * Disassembly of /tmp/aml-O8SU61, Wed Jun 21 18:26:52 2023
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002038 (8248)
+ * Length 0x00002031 (8241)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x4A
+ * Checksum 0x89
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3148,48 +3148,48 @@
{
Name (_ADR, Zero) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x01F5
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
}
Device (S40)
{
Name (_ADR, 0x00080000) // _ADR: Address
- Device (S41)
+ Device (S01)
{
- Name (_ADR, 0x00080001) // _ADR: Address
+ Name (_ADR, One) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
{
0x0259
}
Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
}
}
- Device (S48)
+ Device (S02)
{
- Name (_ADR, 0x00090000) // _ADR: Address
+ Name (_ADR, 0x02) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
}
}
}
Device (SF8)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
Scope (\_SB)
{
Field (PCI0.SF8.PIRQ, ByteAcc, NoLock, Preserve)
{
PRQA, 8,
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230705115925.5339-4-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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