mirror of https://github.com/xemu-project/xemu.git
aspeed/smc: QOMify AspeedSMCFlash
AspeedSMCFlash is a small structure representing the AHB memory window through which the contents of a flash device can be accessed with MMIOs. Introduce an AspeedSMCFlash SysBusDevice model and attach the associated memory region to the newly instantiated objects. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -1101,6 +1101,18 @@ static const MemoryRegionOps aspeed_smc_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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};
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static void aspeed_smc_instance_init(Object *obj)
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{
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AspeedSMCState *s = ASPEED_SMC(obj);
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AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
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int i;
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for (i = 0; i < asc->max_peripherals; i++) {
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object_initialize_child(obj, "flash[*]", &s->flashes[i],
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TYPE_ASPEED_SMC_FLASH);
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}
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}
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/*
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/*
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* Initialize the custom address spaces for DMAs
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* Initialize the custom address spaces for DMAs
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*/
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*/
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@ -1123,7 +1135,6 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
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AspeedSMCState *s = ASPEED_SMC(dev);
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AspeedSMCState *s = ASPEED_SMC(dev);
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AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
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AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
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int i;
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int i;
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char name[32];
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hwaddr offset = 0;
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hwaddr offset = 0;
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/* keep a copy under AspeedSMCState to speed up accesses */
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/* keep a copy under AspeedSMCState to speed up accesses */
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@ -1170,8 +1181,6 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
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&s->mmio_flash, 0, asc->flash_window_size);
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&s->mmio_flash, 0, asc->flash_window_size);
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sysbus_init_mmio(sbd, &s->mmio_flash_alias);
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sysbus_init_mmio(sbd, &s->mmio_flash_alias);
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s->flashes = g_new0(AspeedSMCFlash, asc->max_peripherals);
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/*
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/*
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* Let's create a sub memory region for each possible peripheral. All
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* Let's create a sub memory region for each possible peripheral. All
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* have a configurable memory segment in the overall flash mapping
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* have a configurable memory segment in the overall flash mapping
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@ -1182,12 +1191,17 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
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for (i = 0; i < asc->max_peripherals; ++i) {
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for (i = 0; i < asc->max_peripherals; ++i) {
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AspeedSMCFlash *fl = &s->flashes[i];
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AspeedSMCFlash *fl = &s->flashes[i];
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snprintf(name, sizeof(name), TYPE_ASPEED_SMC ".flash.%d", i);
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if (!object_property_set_link(OBJECT(fl), "controller", OBJECT(s),
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errp)) {
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return;
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}
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if (!object_property_set_uint(OBJECT(fl), "cs", i, errp)) {
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return;
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}
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if (!sysbus_realize(SYS_BUS_DEVICE(fl), errp)) {
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return;
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}
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fl->cs = i;
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fl->controller = s;
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memory_region_init_io(&fl->mmio, OBJECT(s), &aspeed_smc_flash_ops,
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fl, name, asc->segments[i].size);
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memory_region_add_subregion(&s->mmio_flash, offset, &fl->mmio);
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memory_region_add_subregion(&s->mmio_flash, offset, &fl->mmio);
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offset += asc->segments[i].size;
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offset += asc->segments[i].size;
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}
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}
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@ -1231,12 +1245,57 @@ static void aspeed_smc_class_init(ObjectClass *klass, void *data)
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static const TypeInfo aspeed_smc_info = {
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static const TypeInfo aspeed_smc_info = {
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.name = TYPE_ASPEED_SMC,
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.name = TYPE_ASPEED_SMC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_init = aspeed_smc_instance_init,
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.instance_size = sizeof(AspeedSMCState),
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.instance_size = sizeof(AspeedSMCState),
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.class_size = sizeof(AspeedSMCClass),
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.class_size = sizeof(AspeedSMCClass),
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.class_init = aspeed_smc_class_init,
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.class_init = aspeed_smc_class_init,
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.abstract = true,
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.abstract = true,
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};
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};
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static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
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{
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AspeedSMCFlash *s = ASPEED_SMC_FLASH(dev);
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AspeedSMCClass *asc;
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g_autofree char *name = g_strdup_printf(TYPE_ASPEED_SMC_FLASH ".%d", s->cs);
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if (!s->controller) {
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error_setg(errp, TYPE_ASPEED_SMC_FLASH ": 'controller' link not set");
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return;
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}
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asc = ASPEED_SMC_GET_CLASS(s->controller);
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/*
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* Use the default segment value to size the memory region. This
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* can be changed by FW at runtime.
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*/
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memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_flash_ops,
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s, name, asc->segments[s->cs].size);
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
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}
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static Property aspeed_smc_flash_properties[] = {
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DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
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DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC,
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AspeedSMCState *),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void aspeed_smc_flash_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->desc = "Aspeed SMC Flash device region";
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dc->realize = aspeed_smc_flash_realize;
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device_class_set_props(dc, aspeed_smc_flash_properties);
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}
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static const TypeInfo aspeed_smc_flash_info = {
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.name = TYPE_ASPEED_SMC_FLASH,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(AspeedSMCFlash),
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.class_init = aspeed_smc_flash_class_init,
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};
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/*
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/*
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* The Segment Registers of the AST2400 and AST2500 have a 8MB
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* The Segment Registers of the AST2400 and AST2500 have a 8MB
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@ -1625,6 +1684,7 @@ static const TypeInfo aspeed_2600_spi2_info = {
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static void aspeed_smc_register_types(void)
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static void aspeed_smc_register_types(void)
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{
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{
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type_register_static(&aspeed_smc_flash_info);
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type_register_static(&aspeed_smc_info);
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type_register_static(&aspeed_smc_info);
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type_register_static(&aspeed_2400_smc_info);
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type_register_static(&aspeed_2400_smc_info);
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type_register_static(&aspeed_2400_fmc_info);
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type_register_static(&aspeed_2400_fmc_info);
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@ -30,18 +30,23 @@
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#include "qom/object.h"
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#include "qom/object.h"
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struct AspeedSMCState;
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struct AspeedSMCState;
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typedef struct AspeedSMCFlash {
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struct AspeedSMCState *controller;
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#define TYPE_ASPEED_SMC_FLASH "aspeed.smc.flash"
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OBJECT_DECLARE_SIMPLE_TYPE(AspeedSMCFlash, ASPEED_SMC_FLASH)
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struct AspeedSMCFlash {
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SysBusDevice parent_obj;
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struct AspeedSMCState *controller;
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uint8_t cs;
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uint8_t cs;
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MemoryRegion mmio;
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MemoryRegion mmio;
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} AspeedSMCFlash;
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};
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#define TYPE_ASPEED_SMC "aspeed.smc"
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#define TYPE_ASPEED_SMC "aspeed.smc"
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OBJECT_DECLARE_TYPE(AspeedSMCState, AspeedSMCClass, ASPEED_SMC)
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OBJECT_DECLARE_TYPE(AspeedSMCState, AspeedSMCClass, ASPEED_SMC)
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#define ASPEED_SMC_R_MAX (0x100 / 4)
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#define ASPEED_SMC_R_MAX (0x100 / 4)
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#define ASPEED_SMC_CS_MAX 5
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struct AspeedSMCState {
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struct AspeedSMCState {
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SysBusDevice parent_obj;
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SysBusDevice parent_obj;
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@ -72,7 +77,7 @@ struct AspeedSMCState {
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MemoryRegion *dram_mr;
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MemoryRegion *dram_mr;
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AddressSpace dram_as;
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AddressSpace dram_as;
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AspeedSMCFlash *flashes;
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AspeedSMCFlash flashes[ASPEED_SMC_CS_MAX];
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uint8_t snoop_index;
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uint8_t snoop_index;
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uint8_t snoop_dummies;
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uint8_t snoop_dummies;
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