mirror of https://github.com/xemu-project/xemu.git
aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs'
'cs' is a more appropriate name to index SPI flash devices. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -352,20 +352,20 @@ static inline int aspeed_smc_flash_mode(const AspeedSMCFlash *fl)
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{
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const AspeedSMCState *s = fl->controller;
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return s->regs[s->r_ctrl0 + fl->id] & CTRL_CMD_MODE_MASK;
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return s->regs[s->r_ctrl0 + fl->cs] & CTRL_CMD_MODE_MASK;
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}
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static inline bool aspeed_smc_is_writable(const AspeedSMCFlash *fl)
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{
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const AspeedSMCState *s = fl->controller;
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return s->regs[s->r_conf] & (1 << (s->conf_enable_w0 + fl->id));
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return s->regs[s->r_conf] & (1 << (s->conf_enable_w0 + fl->cs));
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}
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static inline int aspeed_smc_flash_cmd(const AspeedSMCFlash *fl)
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{
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const AspeedSMCState *s = fl->controller;
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int cmd = (s->regs[s->r_ctrl0 + fl->id] >> CTRL_CMD_SHIFT) & CTRL_CMD_MASK;
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int cmd = (s->regs[s->r_ctrl0 + fl->cs] >> CTRL_CMD_SHIFT) & CTRL_CMD_MASK;
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/*
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* In read mode, the default SPI command is READ (0x3). In other
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@ -393,7 +393,7 @@ static inline int aspeed_smc_flash_is_4byte(const AspeedSMCFlash *fl)
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if (asc->segments == aspeed_2400_spi1_segments) {
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return s->regs[s->r_ctrl0] & CTRL_AST2400_SPI_4BYTE;
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} else {
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return s->regs[s->r_ce_ctrl] & (1 << (CTRL_EXTENDED0 + fl->id));
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return s->regs[s->r_ce_ctrl] & (1 << (CTRL_EXTENDED0 + fl->cs));
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}
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}
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@ -401,9 +401,9 @@ static void aspeed_smc_flash_do_select(AspeedSMCFlash *fl, bool unselect)
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{
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AspeedSMCState *s = fl->controller;
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trace_aspeed_smc_flash_select(fl->id, unselect ? "un" : "");
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trace_aspeed_smc_flash_select(fl->cs, unselect ? "un" : "");
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qemu_set_irq(s->cs_lines[fl->id], unselect);
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qemu_set_irq(s->cs_lines[fl->cs], unselect);
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}
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static void aspeed_smc_flash_select(AspeedSMCFlash *fl)
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@ -423,11 +423,11 @@ static uint32_t aspeed_smc_check_segment_addr(const AspeedSMCFlash *fl,
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AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
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AspeedSegments seg;
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asc->reg_to_segment(s, s->regs[R_SEG_ADDR0 + fl->id], &seg);
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asc->reg_to_segment(s, s->regs[R_SEG_ADDR0 + fl->cs], &seg);
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if ((addr % seg.size) != addr) {
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aspeed_smc_error("invalid address 0x%08x for CS%d segment : "
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"[ 0x%"HWADDR_PRIx" - 0x%"HWADDR_PRIx" ]",
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addr, fl->id, seg.addr, seg.addr + seg.size);
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addr, fl->cs, seg.addr, seg.addr + seg.size);
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addr %= seg.size;
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}
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@ -437,7 +437,7 @@ static uint32_t aspeed_smc_check_segment_addr(const AspeedSMCFlash *fl,
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static int aspeed_smc_flash_dummies(const AspeedSMCFlash *fl)
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{
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const AspeedSMCState *s = fl->controller;
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uint32_t r_ctrl0 = s->regs[s->r_ctrl0 + fl->id];
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uint32_t r_ctrl0 = s->regs[s->r_ctrl0 + fl->cs];
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uint32_t dummy_high = (r_ctrl0 >> CTRL_DUMMY_HIGH_SHIFT) & 0x1;
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uint32_t dummy_low = (r_ctrl0 >> CTRL_DUMMY_LOW_SHIFT) & 0x3;
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uint32_t dummies = ((dummy_high << 2) | dummy_low) * 8;
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@ -506,7 +506,7 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned size)
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aspeed_smc_error("invalid flash mode %d", aspeed_smc_flash_mode(fl));
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}
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trace_aspeed_smc_flash_read(fl->id, addr, size, ret,
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trace_aspeed_smc_flash_read(fl->cs, addr, size, ret,
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aspeed_smc_flash_mode(fl));
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return ret;
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}
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@ -563,7 +563,7 @@ static bool aspeed_smc_do_snoop(AspeedSMCFlash *fl, uint64_t data,
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AspeedSMCState *s = fl->controller;
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uint8_t addr_width = aspeed_smc_flash_is_4byte(fl) ? 4 : 3;
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trace_aspeed_smc_do_snoop(fl->id, s->snoop_index, s->snoop_dummies,
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trace_aspeed_smc_do_snoop(fl->cs, s->snoop_index, s->snoop_dummies,
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(uint8_t) data & 0xff);
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if (s->snoop_index == SNOOP_OFF) {
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@ -616,7 +616,7 @@ static void aspeed_smc_flash_write(void *opaque, hwaddr addr, uint64_t data,
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AspeedSMCState *s = fl->controller;
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int i;
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trace_aspeed_smc_flash_write(fl->id, addr, size, data,
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trace_aspeed_smc_flash_write(fl->cs, addr, size, data,
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aspeed_smc_flash_mode(fl));
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if (!aspeed_smc_is_writable(fl)) {
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@ -668,12 +668,12 @@ static void aspeed_smc_flash_update_ctrl(AspeedSMCFlash *fl, uint32_t value)
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unselect = (value & CTRL_CMD_MODE_MASK) != CTRL_USERMODE;
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/* A change of CTRL_CE_STOP_ACTIVE from 0 to 1, unselects the CS */
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if (!(s->regs[s->r_ctrl0 + fl->id] & CTRL_CE_STOP_ACTIVE) &&
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if (!(s->regs[s->r_ctrl0 + fl->cs] & CTRL_CE_STOP_ACTIVE) &&
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value & CTRL_CE_STOP_ACTIVE) {
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unselect = true;
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}
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s->regs[s->r_ctrl0 + fl->id] = value;
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s->regs[s->r_ctrl0 + fl->cs] = value;
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s->snoop_index = unselect ? SNOOP_OFF : SNOOP_START;
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@ -1184,7 +1184,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
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snprintf(name, sizeof(name), TYPE_ASPEED_SMC ".flash.%d", i);
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fl->id = i;
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fl->cs = i;
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fl->controller = s;
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memory_region_init_io(&fl->mmio, OBJECT(s), &aspeed_smc_flash_ops,
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fl, name, asc->segments[i].size);
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@ -33,7 +33,7 @@ struct AspeedSMCState;
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typedef struct AspeedSMCFlash {
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struct AspeedSMCState *controller;
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uint8_t id;
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uint8_t cs;
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MemoryRegion mmio;
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} AspeedSMCFlash;
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