mirror of https://github.com/xemu-project/xemu.git
pci: Move HMP command from hw/pci/pcie_aer.c to pci-hmp-cmds.c
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221201121133.3813857-10-armbru@redhat.com>
This commit is contained in:
parent
236aafa61c
commit
d0e6729809
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@ -19,7 +19,9 @@
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#include "monitor/monitor.h"
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#include "monitor/monitor.h"
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#include "pci-internal.h"
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#include "pci-internal.h"
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/qapi-commands-pci.h"
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#include "qapi/qapi-commands-pci.h"
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#include "qemu/cutils.h"
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static void hmp_info_pci_device(Monitor *mon, const PciDeviceInfo *dev)
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static void hmp_info_pci_device(Monitor *mon, const PciDeviceInfo *dev)
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{
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{
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@ -156,3 +158,105 @@ void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
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r->addr, r->addr + r->size - 1);
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r->addr, r->addr + r->size - 1);
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}
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}
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}
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}
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typedef struct PCIEErrorDetails {
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const char *id;
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const char *root_bus;
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int bus;
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int devfn;
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} PCIEErrorDetails;
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/*
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* Inject an error described by @qdict.
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* On success, set @details to show where error was sent.
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* Return negative errno if injection failed and a message was emitted.
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*/
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static int do_pcie_aer_inject_error(Monitor *mon,
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const QDict *qdict,
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PCIEErrorDetails *details)
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{
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const char *id = qdict_get_str(qdict, "id");
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const char *error_name;
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uint32_t error_status;
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unsigned int num;
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bool correctable;
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PCIDevice *dev;
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PCIEAERErr err;
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int ret;
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ret = pci_qdev_find_device(id, &dev);
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if (ret < 0) {
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monitor_printf(mon,
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"id or pci device path is invalid or device not "
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"found. %s\n", id);
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return ret;
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}
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if (!pci_is_express(dev)) {
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monitor_printf(mon, "the device doesn't support pci express. %s\n",
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id);
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return -ENOSYS;
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}
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error_name = qdict_get_str(qdict, "error_status");
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if (pcie_aer_parse_error_string(error_name, &error_status, &correctable)) {
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if (qemu_strtoui(error_name, NULL, 0, &num) < 0) {
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monitor_printf(mon, "invalid error status value. \"%s\"",
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error_name);
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return -EINVAL;
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}
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error_status = num;
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correctable = qdict_get_try_bool(qdict, "correctable", false);
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}
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err.status = error_status;
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err.source_id = pci_requester_id(dev);
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err.flags = 0;
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if (correctable) {
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err.flags |= PCIE_AER_ERR_IS_CORRECTABLE;
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}
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if (qdict_get_try_bool(qdict, "advisory_non_fatal", false)) {
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err.flags |= PCIE_AER_ERR_MAYBE_ADVISORY;
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}
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if (qdict_haskey(qdict, "header0")) {
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err.flags |= PCIE_AER_ERR_HEADER_VALID;
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}
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if (qdict_haskey(qdict, "prefix0")) {
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err.flags |= PCIE_AER_ERR_TLP_PREFIX_PRESENT;
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}
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err.header[0] = qdict_get_try_int(qdict, "header0", 0);
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err.header[1] = qdict_get_try_int(qdict, "header1", 0);
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err.header[2] = qdict_get_try_int(qdict, "header2", 0);
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err.header[3] = qdict_get_try_int(qdict, "header3", 0);
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err.prefix[0] = qdict_get_try_int(qdict, "prefix0", 0);
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err.prefix[1] = qdict_get_try_int(qdict, "prefix1", 0);
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err.prefix[2] = qdict_get_try_int(qdict, "prefix2", 0);
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err.prefix[3] = qdict_get_try_int(qdict, "prefix3", 0);
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ret = pcie_aer_inject_error(dev, &err);
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if (ret < 0) {
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monitor_printf(mon, "failed to inject error: %s\n",
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strerror(-ret));
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return ret;
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}
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details->id = id;
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details->root_bus = pci_root_bus_path(dev);
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details->bus = pci_dev_bus_num(dev);
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details->devfn = dev->devfn;
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return 0;
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}
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void hmp_pcie_aer_inject_error(Monitor *mon, const QDict *qdict)
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{
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PCIEErrorDetails data;
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if (do_pcie_aer_inject_error(mon, qdict, &data) < 0) {
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return;
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}
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monitor_printf(mon, "OK id: %s root bus: %s, bus: %x devfn: %x.%x\n",
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data.id, data.root_bus, data.bus,
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PCI_SLOT(data.devfn), PCI_FUNC(data.devfn));
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}
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@ -18,4 +18,8 @@ const pci_class_desc *get_class_desc(int class);
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PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num);
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PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num);
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void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent);
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void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent);
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int pcie_aer_parse_error_string(const char *error_name,
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uint32_t *status, bool *correctable);
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int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err);
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#endif
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#endif
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@ -19,7 +19,6 @@
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*/
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*/
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#include "qemu/osdep.h"
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#include "qemu/osdep.h"
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#include "sysemu/sysemu.h"
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#include "monitor/monitor.h"
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#include "monitor/monitor.h"
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#include "monitor/hmp.h"
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#include "monitor/hmp.h"
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#include "qapi/qapi-commands-pci.h"
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#include "qapi/qapi-commands-pci.h"
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@ -19,18 +19,14 @@
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*/
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*/
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#include "qemu/osdep.h"
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#include "qemu/osdep.h"
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#include "sysemu/sysemu.h"
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#include "qapi/qmp/qdict.h"
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#include "migration/vmstate.h"
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#include "migration/vmstate.h"
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#include "monitor/monitor.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pcie.h"
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#include "hw/pci/pcie.h"
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#include "hw/pci/msix.h"
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#include "hw/pci/msix.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci_bus.h"
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#include "hw/pci/pci_bus.h"
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#include "hw/pci/pcie_regs.h"
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#include "hw/pci/pcie_regs.h"
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#include "qapi/error.h"
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#include "pci-internal.h"
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#include "qemu/cutils.h"
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//#define DEBUG_PCIE
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//#define DEBUG_PCIE
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#ifdef DEBUG_PCIE
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#ifdef DEBUG_PCIE
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@ -45,13 +41,6 @@
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#define PCI_ERR_SRC_COR_OFFS 0
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#define PCI_ERR_SRC_COR_OFFS 0
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#define PCI_ERR_SRC_UNCOR_OFFS 2
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#define PCI_ERR_SRC_UNCOR_OFFS 2
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typedef struct PCIEErrorDetails {
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const char *id;
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const char *root_bus;
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int bus;
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int devfn;
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} PCIEErrorDetails;
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/* From 6.2.7 Error Listing and Rules. Table 6-2, 6-3 and 6-4 */
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/* From 6.2.7 Error Listing and Rules. Table 6-2, 6-3 and 6-4 */
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static uint32_t pcie_aer_uncor_default_severity(uint32_t status)
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static uint32_t pcie_aer_uncor_default_severity(uint32_t status)
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{
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{
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@ -632,7 +621,7 @@ static bool pcie_aer_inject_uncor_error(PCIEAERInject *inj, bool is_fatal)
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* Figure 6-2: Flowchart Showing Sequence of Device Error Signaling and Logging
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* Figure 6-2: Flowchart Showing Sequence of Device Error Signaling and Logging
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* Operations
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* Operations
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*/
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*/
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static int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err)
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int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err)
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{
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{
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uint8_t *aer_cap = NULL;
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uint8_t *aer_cap = NULL;
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uint16_t devctl = 0;
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uint16_t devctl = 0;
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@ -934,8 +923,8 @@ static const struct PCIEAERErrorName pcie_aer_error_list[] = {
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},
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},
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};
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};
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static int pcie_aer_parse_error_string(const char *error_name,
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int pcie_aer_parse_error_string(const char *error_name,
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uint32_t *status, bool *correctable)
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uint32_t *status, bool *correctable)
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{
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{
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int i;
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int i;
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@ -951,98 +940,3 @@ static int pcie_aer_parse_error_string(const char *error_name,
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}
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}
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return -EINVAL;
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return -EINVAL;
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}
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}
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/*
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* Inject an error described by @qdict.
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* On success, set @details to show where error was sent.
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* Return negative errno if injection failed and a message was emitted.
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*/
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static int do_pcie_aer_inject_error(Monitor *mon,
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const QDict *qdict,
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PCIEErrorDetails *details)
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{
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const char *id = qdict_get_str(qdict, "id");
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const char *error_name;
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uint32_t error_status;
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unsigned int num;
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bool correctable;
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PCIDevice *dev;
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PCIEAERErr err;
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int ret;
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ret = pci_qdev_find_device(id, &dev);
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if (ret < 0) {
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monitor_printf(mon,
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"id or pci device path is invalid or device not "
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"found. %s\n", id);
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return ret;
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}
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if (!pci_is_express(dev)) {
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monitor_printf(mon, "the device doesn't support pci express. %s\n",
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id);
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return -ENOSYS;
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}
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error_name = qdict_get_str(qdict, "error_status");
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if (pcie_aer_parse_error_string(error_name, &error_status, &correctable)) {
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if (qemu_strtoui(error_name, NULL, 0, &num) < 0) {
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monitor_printf(mon, "invalid error status value. \"%s\"",
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error_name);
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return -EINVAL;
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}
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error_status = num;
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correctable = qdict_get_try_bool(qdict, "correctable", false);
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}
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err.status = error_status;
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err.source_id = pci_requester_id(dev);
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err.flags = 0;
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if (correctable) {
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err.flags |= PCIE_AER_ERR_IS_CORRECTABLE;
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}
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if (qdict_get_try_bool(qdict, "advisory_non_fatal", false)) {
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err.flags |= PCIE_AER_ERR_MAYBE_ADVISORY;
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}
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if (qdict_haskey(qdict, "header0")) {
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err.flags |= PCIE_AER_ERR_HEADER_VALID;
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}
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if (qdict_haskey(qdict, "prefix0")) {
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err.flags |= PCIE_AER_ERR_TLP_PREFIX_PRESENT;
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}
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err.header[0] = qdict_get_try_int(qdict, "header0", 0);
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err.header[1] = qdict_get_try_int(qdict, "header1", 0);
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err.header[2] = qdict_get_try_int(qdict, "header2", 0);
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err.header[3] = qdict_get_try_int(qdict, "header3", 0);
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err.prefix[0] = qdict_get_try_int(qdict, "prefix0", 0);
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err.prefix[1] = qdict_get_try_int(qdict, "prefix1", 0);
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err.prefix[2] = qdict_get_try_int(qdict, "prefix2", 0);
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err.prefix[3] = qdict_get_try_int(qdict, "prefix3", 0);
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ret = pcie_aer_inject_error(dev, &err);
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if (ret < 0) {
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monitor_printf(mon, "failed to inject error: %s\n",
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strerror(-ret));
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return ret;
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}
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details->id = id;
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details->root_bus = pci_root_bus_path(dev);
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details->bus = pci_dev_bus_num(dev);
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details->devfn = dev->devfn;
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return 0;
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}
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void hmp_pcie_aer_inject_error(Monitor *mon, const QDict *qdict)
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{
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PCIEErrorDetails data;
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if (do_pcie_aer_inject_error(mon, qdict, &data) < 0) {
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return;
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}
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monitor_printf(mon, "OK id: %s root bus: %s, bus: %x devfn: %x.%x\n",
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data.id, data.root_bus, data.bus,
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PCI_SLOT(data.devfn), PCI_FUNC(data.devfn));
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}
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@ -143,5 +143,6 @@ void hmp_info_vcpu_dirty_limit(Monitor *mon, const QDict *qdict);
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void hmp_human_readable_text_helper(Monitor *mon,
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void hmp_human_readable_text_helper(Monitor *mon,
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HumanReadableText *(*qmp_handler)(Error **));
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HumanReadableText *(*qmp_handler)(Error **));
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void hmp_info_stats(Monitor *mon, const QDict *qdict);
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void hmp_info_stats(Monitor *mon, const QDict *qdict);
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void hmp_pcie_aer_inject_error(Monitor *mon, const QDict *qdict);
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#endif
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#endif
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@ -61,9 +61,6 @@ extern int nb_option_roms;
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extern const char *prom_envs[MAX_PROM_ENVS];
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extern const char *prom_envs[MAX_PROM_ENVS];
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extern unsigned int nb_prom_envs;
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extern unsigned int nb_prom_envs;
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/* pcie aer error injection */
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void hmp_pcie_aer_inject_error(Monitor *mon, const QDict *qdict);
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/* serial ports */
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/* serial ports */
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/* Return the Chardev for serial port i, or NULL if none */
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/* Return the Chardev for serial port i, or NULL if none */
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