mirror of https://github.com/xemu-project/xemu.git
263 lines
8.6 KiB
C
263 lines
8.6 KiB
C
/*
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* HMP commands related to PCI
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*
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* Copyright IBM, Corp. 2011
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/pci/pci.h"
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#include "monitor/hmp.h"
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#include "monitor/monitor.h"
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#include "pci-internal.h"
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#include "qapi/error.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/qapi-commands-pci.h"
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#include "qemu/cutils.h"
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static void hmp_info_pci_device(Monitor *mon, const PciDeviceInfo *dev)
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{
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PciMemoryRegionList *region;
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monitor_printf(mon, " Bus %2" PRId64 ", ", dev->bus);
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monitor_printf(mon, "device %3" PRId64 ", function %" PRId64 ":\n",
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dev->slot, dev->function);
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monitor_printf(mon, " ");
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if (dev->class_info->desc) {
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monitor_puts(mon, dev->class_info->desc);
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} else {
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monitor_printf(mon, "Class %04" PRId64, dev->class_info->q_class);
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}
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monitor_printf(mon, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n",
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dev->id->vendor, dev->id->device);
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if (dev->id->has_subsystem_vendor && dev->id->has_subsystem) {
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monitor_printf(mon, " PCI subsystem %04" PRIx64 ":%04" PRIx64 "\n",
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dev->id->subsystem_vendor, dev->id->subsystem);
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}
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if (dev->has_irq) {
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monitor_printf(mon, " IRQ %" PRId64 ", pin %c\n",
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dev->irq, (char)('A' + dev->irq_pin - 1));
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}
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if (dev->pci_bridge) {
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monitor_printf(mon, " BUS %" PRId64 ".\n",
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dev->pci_bridge->bus->number);
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monitor_printf(mon, " secondary bus %" PRId64 ".\n",
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dev->pci_bridge->bus->secondary);
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monitor_printf(mon, " subordinate bus %" PRId64 ".\n",
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dev->pci_bridge->bus->subordinate);
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monitor_printf(mon, " IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
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dev->pci_bridge->bus->io_range->base,
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dev->pci_bridge->bus->io_range->limit);
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monitor_printf(mon,
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" memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
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dev->pci_bridge->bus->memory_range->base,
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dev->pci_bridge->bus->memory_range->limit);
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monitor_printf(mon, " prefetchable memory range "
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"[0x%08"PRIx64", 0x%08"PRIx64"]\n",
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dev->pci_bridge->bus->prefetchable_range->base,
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dev->pci_bridge->bus->prefetchable_range->limit);
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}
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for (region = dev->regions; region; region = region->next) {
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uint64_t addr, size;
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addr = region->value->address;
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size = region->value->size;
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monitor_printf(mon, " BAR%" PRId64 ": ", region->value->bar);
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if (!strcmp(region->value->type, "io")) {
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monitor_printf(mon, "I/O at 0x%04" PRIx64
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" [0x%04" PRIx64 "].\n",
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addr, addr + size - 1);
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} else {
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monitor_printf(mon, "%d bit%s memory at 0x%08" PRIx64
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" [0x%08" PRIx64 "].\n",
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region->value->mem_type_64 ? 64 : 32,
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region->value->prefetch ? " prefetchable" : "",
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addr, addr + size - 1);
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}
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}
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monitor_printf(mon, " id \"%s\"\n", dev->qdev_id);
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if (dev->pci_bridge) {
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if (dev->pci_bridge->has_devices) {
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PciDeviceInfoList *cdev;
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for (cdev = dev->pci_bridge->devices; cdev; cdev = cdev->next) {
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hmp_info_pci_device(mon, cdev->value);
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}
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}
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}
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}
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void hmp_info_pci(Monitor *mon, const QDict *qdict)
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{
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PciInfoList *info_list, *info;
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info_list = qmp_query_pci(&error_abort);
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for (info = info_list; info; info = info->next) {
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PciDeviceInfoList *dev;
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for (dev = info->value->devices; dev; dev = dev->next) {
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hmp_info_pci_device(mon, dev->value);
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}
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}
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qapi_free_PciInfoList(info_list);
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}
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void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
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{
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PCIDevice *d = (PCIDevice *)dev;
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int class = pci_get_word(d->config + PCI_CLASS_DEVICE);
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const pci_class_desc *desc = get_class_desc(class);
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char ctxt[64];
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PCIIORegion *r;
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int i;
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if (desc->desc) {
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snprintf(ctxt, sizeof(ctxt), "%s", desc->desc);
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} else {
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snprintf(ctxt, sizeof(ctxt), "Class %04x", class);
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}
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monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, "
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"pci id %04x:%04x (sub %04x:%04x)\n",
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indent, "", ctxt, pci_dev_bus_num(d),
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PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),
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pci_get_word(d->config + PCI_VENDOR_ID),
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pci_get_word(d->config + PCI_DEVICE_ID),
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pci_get_word(d->config + PCI_SUBSYSTEM_VENDOR_ID),
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pci_get_word(d->config + PCI_SUBSYSTEM_ID));
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for (i = 0; i < PCI_NUM_REGIONS; i++) {
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r = &d->io_regions[i];
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if (!r->size) {
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continue;
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}
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monitor_printf(mon, "%*sbar %d: %s at 0x%"FMT_PCIBUS
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" [0x%"FMT_PCIBUS"]\n",
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indent, "",
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i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem",
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r->addr, r->addr + r->size - 1);
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}
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}
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typedef struct PCIEErrorDetails {
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const char *id;
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const char *root_bus;
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int bus;
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int devfn;
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} PCIEErrorDetails;
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/*
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* Inject an error described by @qdict.
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* On success, set @details to show where error was sent.
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* Return negative errno if injection failed and a message was emitted.
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*/
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static int do_pcie_aer_inject_error(Monitor *mon,
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const QDict *qdict,
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PCIEErrorDetails *details)
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{
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const char *id = qdict_get_str(qdict, "id");
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const char *error_name;
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uint32_t error_status;
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unsigned int num;
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bool correctable;
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PCIDevice *dev;
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PCIEAERErr err;
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int ret;
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ret = pci_qdev_find_device(id, &dev);
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if (ret < 0) {
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monitor_printf(mon,
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"id or pci device path is invalid or device not "
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"found. %s\n", id);
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return ret;
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}
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if (!pci_is_express(dev)) {
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monitor_printf(mon, "the device doesn't support pci express. %s\n",
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id);
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return -ENOSYS;
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}
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error_name = qdict_get_str(qdict, "error_status");
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if (pcie_aer_parse_error_string(error_name, &error_status, &correctable)) {
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if (qemu_strtoui(error_name, NULL, 0, &num) < 0) {
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monitor_printf(mon, "invalid error status value. \"%s\"",
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error_name);
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return -EINVAL;
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}
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error_status = num;
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correctable = qdict_get_try_bool(qdict, "correctable", false);
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}
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err.status = error_status;
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err.source_id = pci_requester_id(dev);
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err.flags = 0;
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if (correctable) {
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err.flags |= PCIE_AER_ERR_IS_CORRECTABLE;
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}
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if (qdict_get_try_bool(qdict, "advisory_non_fatal", false)) {
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err.flags |= PCIE_AER_ERR_MAYBE_ADVISORY;
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}
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if (qdict_haskey(qdict, "header0")) {
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err.flags |= PCIE_AER_ERR_HEADER_VALID;
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}
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if (qdict_haskey(qdict, "prefix0")) {
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err.flags |= PCIE_AER_ERR_TLP_PREFIX_PRESENT;
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}
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err.header[0] = qdict_get_try_int(qdict, "header0", 0);
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err.header[1] = qdict_get_try_int(qdict, "header1", 0);
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err.header[2] = qdict_get_try_int(qdict, "header2", 0);
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err.header[3] = qdict_get_try_int(qdict, "header3", 0);
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err.prefix[0] = qdict_get_try_int(qdict, "prefix0", 0);
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err.prefix[1] = qdict_get_try_int(qdict, "prefix1", 0);
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err.prefix[2] = qdict_get_try_int(qdict, "prefix2", 0);
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err.prefix[3] = qdict_get_try_int(qdict, "prefix3", 0);
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ret = pcie_aer_inject_error(dev, &err);
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if (ret < 0) {
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monitor_printf(mon, "failed to inject error: %s\n",
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strerror(-ret));
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return ret;
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}
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details->id = id;
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details->root_bus = pci_root_bus_path(dev);
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details->bus = pci_dev_bus_num(dev);
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details->devfn = dev->devfn;
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return 0;
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}
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void hmp_pcie_aer_inject_error(Monitor *mon, const QDict *qdict)
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{
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PCIEErrorDetails data;
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if (do_pcie_aer_inject_error(mon, qdict, &data) < 0) {
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return;
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}
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monitor_printf(mon, "OK id: %s root bus: %s, bus: %x devfn: %x.%x\n",
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data.id, data.root_bus, data.bus,
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PCI_SLOT(data.devfn), PCI_FUNC(data.devfn));
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}
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