ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

nforce chipset seems to allow setting irq0-3 to level triggered

This commit is contained in:
espes 2015-10-19 18:24:45 +11:00
parent 32cba22156
commit ad6aef5a66
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hw/intc/i8259_common.c
View File

@ -87,7 +87,7 @@ ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master)
dev = DEVICE(isadev);
qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0);
qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1);
qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde);
// qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde);
qdev_prop_set_bit(dev, "master", master);
qdev_init_nofail(dev);