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target/arm: Reject copy w/ shifted byte early
Remove the unparsed extractions in trans_CPY_{m,z}_i which are intended to reject an 8-bit shift of an 8-bit constant for 8-bit element. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220527181907.189259-74-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -528,8 +528,14 @@ DUPM 00000101 11 0000 dbm:13 rd:5
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FCPY 00000101 .. 01 .... 110 imm:8 ..... @rdn_pg4
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FCPY 00000101 .. 01 .... 110 imm:8 ..... @rdn_pg4
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# SVE copy integer immediate (predicated)
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# SVE copy integer immediate (predicated)
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CPY_m_i 00000101 .. 01 .... 01 . ........ ..... @rdn_pg4 imm=%sh8_i8s
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{
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CPY_z_i 00000101 .. 01 .... 00 . ........ ..... @rdn_pg4 imm=%sh8_i8s
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INVALID 00000101 00 01 ---- 01 1 -------- -----
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CPY_m_i 00000101 .. 01 .... 01 . ........ ..... @rdn_pg4 imm=%sh8_i8s
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}
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{
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INVALID 00000101 00 01 ---- 00 1 -------- -----
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CPY_z_i 00000101 .. 01 .... 00 . ........ ..... @rdn_pg4 imm=%sh8_i8s
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}
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### SVE Permute - Extract Group
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### SVE Permute - Extract Group
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@ -2024,9 +2024,6 @@ static bool trans_FCPY(DisasContext *s, arg_FCPY *a)
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static bool trans_CPY_m_i(DisasContext *s, arg_rpri_esz *a)
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static bool trans_CPY_m_i(DisasContext *s, arg_rpri_esz *a)
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{
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{
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if (a->esz == 0 && extract32(s->insn, 13, 1)) {
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return false;
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}
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if (sve_access_check(s)) {
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if (sve_access_check(s)) {
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do_cpy_m(s, a->esz, a->rd, a->rn, a->pg, tcg_constant_i64(a->imm));
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do_cpy_m(s, a->esz, a->rd, a->rn, a->pg, tcg_constant_i64(a->imm));
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}
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}
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@ -2040,9 +2037,6 @@ static bool trans_CPY_z_i(DisasContext *s, arg_CPY_z_i *a)
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gen_helper_sve_cpy_z_s, gen_helper_sve_cpy_z_d,
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gen_helper_sve_cpy_z_s, gen_helper_sve_cpy_z_d,
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};
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};
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if (a->esz == 0 && extract32(s->insn, 13, 1)) {
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return false;
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}
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if (sve_access_check(s)) {
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if (sve_access_check(s)) {
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unsigned vsz = vec_full_reg_size(s);
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unsigned vsz = vec_full_reg_size(s);
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tcg_gen_gvec_2i_ool(vec_full_reg_offset(s, a->rd),
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tcg_gen_gvec_2i_ool(vec_full_reg_offset(s, a->rd),
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