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target/i386: Assert MMX and XMM registers in range 

The mmx assert would fire without the fix for #2495.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20240812025844.58956-4-richard.henderson@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Richard Henderson 2024-08-12 12:58:44 +10:00 committed by Paolo Bonzini
parent 45230bca85
commit 7700d2293c
1 changed files with 7 additions and 2 deletions
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9
target/i386/tcg/emit.c.inc
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@ -33,8 +33,13 @@
#define TCG_TARGET_extract_tl_valid TCG_TARGET_extract_i32_valid #define TCG_TARGET_extract_tl_valid TCG_TARGET_extract_i32_valid
#endif #endif
#define MMX_OFFSET(reg) \
({ assert((reg) >= 0 && (reg) <= 7); \
offsetof(CPUX86State, fpregs[reg].mmx); })
#define ZMM_OFFSET(reg) offsetof(CPUX86State, xmm_regs[reg]) #define ZMM_OFFSET(reg) \
({ assert((reg) >= 0 && (reg) <= 15); \
offsetof(CPUX86State, xmm_regs[reg]); })
typedef void (*SSEFunc_i_ep)(TCGv_i32 val, TCGv_ptr env, TCGv_ptr reg); typedef void (*SSEFunc_i_ep)(TCGv_i32 val, TCGv_ptr env, TCGv_ptr reg);
typedef void (*SSEFunc_l_ep)(TCGv_i64 val, TCGv_ptr env, TCGv_ptr reg); typedef void (*SSEFunc_l_ep)(TCGv_i64 val, TCGv_ptr env, TCGv_ptr reg);
@ -168,7 +173,7 @@ static int vector_elem_offset(X86DecodedOp *op, MemOp ot, int n)
static void compute_mmx_offset(X86DecodedOp *op) static void compute_mmx_offset(X86DecodedOp *op)
{ {
if (!op->has_ea) { if (!op->has_ea) {
op->offset = offsetof(CPUX86State, fpregs[op->n].mmx) + mmx_offset(op->ot); op->offset = MMX_OFFSET(op->n) + mmx_offset(op->ot);
} else { } else {
op->offset = offsetof(CPUX86State, mmx_t0) + mmx_offset(op->ot); op->offset = offsetof(CPUX86State, mmx_t0) + mmx_offset(op->ot);
} }