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linux-user/mips: Select Octeon68XX CPU for Octeon binaries 

The Octeon68XX CPU is available since commit 9a6046a655
("target/mips: introduce Cavium Octeon CPU model").

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1722
Reported-by: Johnathan Hữu Trí <nhtri2003@gmail.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240814133928.6746-3-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-08-14 11:14:49 +02:00
parent f7e3d7521b
commit 1e5a7c57a5
1 changed files with 8 additions and 0 deletions
linux-user/mips64
target_elf.h

8
linux-user/mips64/target_elf.h
View File

@ -9,6 +9,14 @@
#define MIPS64_TARGET_ELF_H
static inline const char *cpu_get_model(uint32_t eflags)
{
switch (eflags & EF_MIPS_MACH) {
case EF_MIPS_MACH_OCTEON:
case EF_MIPS_MACH_OCTEON2:
case EF_MIPS_MACH_OCTEON3:
return "Octeon68XX";
default:
break;
}
if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_64R6) {
return "I6400";
}