Revert DMA:Linger last DMA on bus ...
Pulled in from merge of libretro fork, causes a regression in Croket 2.
This reverts commit a9f35645b7
.
This commit is contained in:
parent
c37c472996
commit
173512f65a
|
@ -50,9 +50,8 @@ bool busPrefetchEnable = false;
|
||||||
uint32_t busPrefetchCount = 0;
|
uint32_t busPrefetchCount = 0;
|
||||||
int cpuDmaTicksToUpdate = 0;
|
int cpuDmaTicksToUpdate = 0;
|
||||||
int cpuDmaCount = 0;
|
int cpuDmaCount = 0;
|
||||||
bool cpuDmaRunning = false;
|
bool cpuDmaHack = false;
|
||||||
uint32_t cpuDmaLast = 0;
|
uint32_t cpuDmaLast = 0;
|
||||||
uint32_t cpuDmaPC = 0;
|
|
||||||
int dummyAddress = 0;
|
int dummyAddress = 0;
|
||||||
|
|
||||||
bool cpuBreakLoop = false;
|
bool cpuBreakLoop = false;
|
||||||
|
@ -2344,8 +2343,7 @@ void doDMA(uint32_t& s, uint32_t& d, uint32_t si, uint32_t di, uint32_t c, int t
|
||||||
int dw = 0;
|
int dw = 0;
|
||||||
int sc = c;
|
int sc = c;
|
||||||
|
|
||||||
cpuDmaRunning = true;
|
cpuDmaHack = true;
|
||||||
cpuDmaPC = reg[15].I;
|
|
||||||
cpuDmaCount = c;
|
cpuDmaCount = c;
|
||||||
// This is done to get the correct waitstates.
|
// This is done to get the correct waitstates.
|
||||||
if (sm > 15)
|
if (sm > 15)
|
||||||
|
@ -2410,7 +2408,7 @@ void doDMA(uint32_t& s, uint32_t& d, uint32_t si, uint32_t di, uint32_t c, int t
|
||||||
}
|
}
|
||||||
|
|
||||||
cpuDmaTicksToUpdate += totalTicks;
|
cpuDmaTicksToUpdate += totalTicks;
|
||||||
cpuDmaRunning = false;
|
cpuDmaHack = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CPUCheckDMA(int reason, int dmamask)
|
void CPUCheckDMA(int reason, int dmamask)
|
||||||
|
@ -3662,7 +3660,7 @@ void CPUReset()
|
||||||
|
|
||||||
systemSaveUpdateCounter = SYSTEM_SAVE_NOT_UPDATED;
|
systemSaveUpdateCounter = SYSTEM_SAVE_NOT_UPDATED;
|
||||||
|
|
||||||
cpuDmaRunning = false;
|
cpuDmaHack = false;
|
||||||
|
|
||||||
lastTime = systemGetClock();
|
lastTime = systemGetClock();
|
||||||
|
|
||||||
|
|
|
@ -20,9 +20,8 @@ extern bool cpuSramEnabled;
|
||||||
extern bool cpuFlashEnabled;
|
extern bool cpuFlashEnabled;
|
||||||
extern bool cpuEEPROMEnabled;
|
extern bool cpuEEPROMEnabled;
|
||||||
extern bool cpuEEPROMSensorEnabled;
|
extern bool cpuEEPROMSensorEnabled;
|
||||||
extern bool cpuDmaRunning;
|
extern bool cpuDmaHack;
|
||||||
extern uint32_t cpuDmaLast;
|
extern uint32_t cpuDmaLast;
|
||||||
extern uint32_t cpuDmaPC;
|
|
||||||
extern bool timer0On;
|
extern bool timer0On;
|
||||||
extern int timer0Ticks;
|
extern int timer0Ticks;
|
||||||
extern int timer0ClockReload;
|
extern int timer0ClockReload;
|
||||||
|
@ -141,7 +140,7 @@ static inline uint32_t CPUReadMemory(uint32_t address)
|
||||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
if (cpuDmaRunning || ((reg[15].I - cpuDmaPC) == (armState ? 4 : 2))) {
|
if (cpuDmaHack) {
|
||||||
value = cpuDmaLast;
|
value = cpuDmaLast;
|
||||||
} else {
|
} else {
|
||||||
if (armState) {
|
if (armState) {
|
||||||
|
@ -285,7 +284,7 @@ static inline uint32_t CPUReadHalfWord(uint32_t address)
|
||||||
// default
|
// default
|
||||||
default:
|
default:
|
||||||
unreadable:
|
unreadable:
|
||||||
if (cpuDmaRunning|| ((reg[15].I - cpuDmaPC) == (armState ? 4 : 2))) {
|
if (cpuDmaHack) {
|
||||||
value = cpuDmaLast & 0xFFFF;
|
value = cpuDmaLast & 0xFFFF;
|
||||||
} else {
|
} else {
|
||||||
int param = reg[15].I;
|
int param = reg[15].I;
|
||||||
|
@ -418,7 +417,7 @@ static inline uint8_t CPUReadByte(uint32_t address)
|
||||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
if (cpuDmaRunning || ((reg[15].I - cpuDmaPC) == (armState ? 4 : 2))) {
|
if (cpuDmaHack) {
|
||||||
return cpuDmaLast & 0xFF;
|
return cpuDmaLast & 0xFF;
|
||||||
} else {
|
} else {
|
||||||
if (armState) {
|
if (armState) {
|
||||||
|
|
Loading…
Reference in New Issue