mirror of https://git.suyu.dev/suyu/suyu
shader_decode: Fixup FSET
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@ -47,8 +47,8 @@ u32 ShaderIR::DecodeFloatSet(BasicBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, value);
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SetRegister(bb, instr.gpr0, value);
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if (instr.generates_cc.Value() != 0) {
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if (instr.generates_cc) {
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const Node is_zero = Operation(OperationCode::LogicalFEqual, predicate, Immediate(0.0f));
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const Node is_zero = Operation(OperationCode::LogicalFEqual, value, Immediate(0.0f));
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SetInternalFlag(bb, InternalFlag::Zero, is_zero);
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SetInternalFlag(bb, InternalFlag::Zero, is_zero);
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LOG_WARNING(HW_GPU, "FSET condition code is incomplete");
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LOG_WARNING(HW_GPU, "FSET condition code is incomplete");
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}
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}
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