mirror of https://github.com/stella-emu/stella.git
605 lines
19 KiB
C++
605 lines
19 KiB
C++
//============================================================================
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//
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// SSSS tt lll lll
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// SS SS tt ll ll
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// SS tttttt eeee ll ll aaaa
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// SSSS tt ee ee ll ll aa
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// SS tt eeeeee ll ll aaaaa -- "An Atari 2600 VCS Emulator"
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// SS SS tt ee ll ll aa aa
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// SSSS ttt eeeee llll llll aaaaa
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//
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// Copyright (c) 1995-2017 by Bradford W. Mott, Stephen Anthony
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// and the Stella Team
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//
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// See the file "License.txt" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//============================================================================
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#include "M6502.hxx"
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#include "System.hxx"
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#include "CartAR.hxx"
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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CartridgeAR::CartridgeAR(const BytePtr& image, uInt32 size,
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const Settings& settings)
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: Cartridge(settings),
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mySize(std::max(size, 8448u)),
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myWriteEnabled(false),
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myPower(true),
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myDataHoldRegister(0),
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myNumberOfDistinctAccesses(0),
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myWritePending(false),
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myCurrentBank(0)
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{
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// Create a load image buffer and copy the given image
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myLoadImages = make_unique<uInt8[]>(mySize);
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myNumberOfLoadImages = mySize / 8448;
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memcpy(myLoadImages.get(), image.get(), size);
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// Add header if image doesn't include it
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if(size < 8448)
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memcpy(myLoadImages.get()+8192, ourDefaultHeader, 256);
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// We use System::PageAccess.codeAccessBase, but don't allow its use
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// through a pointer, since the AR scheme doesn't support bankswitching
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// in the normal sense
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//
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// Instead, access will be through the getAccessFlags and setAccessFlags
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// methods below
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createCodeAccessBase(mySize);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeAR::reset()
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{
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// Initialize RAM
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#if 0 // TODO - figure out actual behaviour of the real cart
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initializeRAM(myImage, 6*1024);
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#endif
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memset(myImage, 0, 6 * 1024);
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// Initialize SC BIOS ROM
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initializeROM();
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myWriteEnabled = false;
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myPower = true;
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myDataHoldRegister = 0;
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myNumberOfDistinctAccesses = 0;
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myWritePending = false;
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// Set bank configuration upon reset so ROM is selected and powered up
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bankConfiguration(0);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeAR::install(System& system)
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{
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mySystem = &system;
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// Map all of the accesses to call peek and poke (we don't yet indicate RAM areas)
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System::PageAccess access(this, System::PA_READ);
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for(uInt16 addr = 0x1000; addr < 0x2000; addr += System::PAGE_SIZE)
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mySystem->setPageAccess(addr, access);
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bankConfiguration(0);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeAR::peek(uInt16 addr)
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{
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// In debugger/bank-locked mode, we ignore all hotspots and in general
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// anything that can change the internal state of the cart
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if(bankLocked())
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return myImage[(addr & 0x07FF) + myImageOffset[(addr & 0x0800) ? 1 : 0]];
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// Is the "dummy" SC BIOS hotspot for reading a load being accessed?
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if(((addr & 0x1FFF) == 0x1850) && (myImageOffset[1] == (3 << 11)))
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{
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// Get load that's being accessed (BIOS places load number at 0x80)
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uInt8 load = mySystem->peek(0x0080);
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// Read the specified load into RAM
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loadIntoRAM(load);
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return myImage[(addr & 0x07FF) + myImageOffset[1]];
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}
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// Cancel any pending write if more than 5 distinct accesses have occurred
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// TODO: Modify to handle when the distinct counter wraps around...
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if(myWritePending &&
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(mySystem->m6502().distinctAccesses() > myNumberOfDistinctAccesses + 5))
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{
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myWritePending = false;
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}
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// Is the data hold register being set?
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if(!(addr & 0x0F00) && (!myWriteEnabled || !myWritePending))
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{
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myDataHoldRegister = addr;
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myNumberOfDistinctAccesses = mySystem->m6502().distinctAccesses();
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myWritePending = true;
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}
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// Is the bank configuration hotspot being accessed?
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else if((addr & 0x1FFF) == 0x1FF8)
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{
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// Yes, so handle bank configuration
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myWritePending = false;
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bankConfiguration(myDataHoldRegister);
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}
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// Handle poke if writing enabled
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else if(myWriteEnabled && myWritePending &&
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(mySystem->m6502().distinctAccesses() == (myNumberOfDistinctAccesses + 5)))
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{
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if((addr & 0x0800) == 0)
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{
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myImage[(addr & 0x07FF) + myImageOffset[0]] = myDataHoldRegister;
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mySystem->setDirtyPage(addr);
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}
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else if(myImageOffset[1] != (3 << 11)) // Can't poke to ROM :-)
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{
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myImage[(addr & 0x07FF) + myImageOffset[1]] = myDataHoldRegister;
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mySystem->setDirtyPage(addr);
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}
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myWritePending = false;
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}
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return myImage[(addr & 0x07FF) + myImageOffset[(addr & 0x0800) ? 1 : 0]];
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeAR::poke(uInt16 addr, uInt8)
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{
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bool modified = false;
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// Cancel any pending write if more than 5 distinct accesses have occurred
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// TODO: Modify to handle when the distinct counter wraps around...
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if(myWritePending &&
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(mySystem->m6502().distinctAccesses() > myNumberOfDistinctAccesses + 5))
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{
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myWritePending = false;
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}
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// Is the data hold register being set?
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if(!(addr & 0x0F00) && (!myWriteEnabled || !myWritePending))
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{
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myDataHoldRegister = addr;
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myNumberOfDistinctAccesses = mySystem->m6502().distinctAccesses();
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myWritePending = true;
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}
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// Is the bank configuration hotspot being accessed?
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else if((addr & 0x1FFF) == 0x1FF8)
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{
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// Yes, so handle bank configuration
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myWritePending = false;
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bankConfiguration(myDataHoldRegister);
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}
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// Handle poke if writing enabled
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else if(myWriteEnabled && myWritePending &&
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(mySystem->m6502().distinctAccesses() == (myNumberOfDistinctAccesses + 5)))
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{
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if((addr & 0x0800) == 0)
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{
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myImage[(addr & 0x07FF) + myImageOffset[0]] = myDataHoldRegister;
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modified = true;
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}
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else if(myImageOffset[1] != (3 << 11)) // Can't poke to ROM :-)
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{
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myImage[(addr & 0x07FF) + myImageOffset[1]] = myDataHoldRegister;
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modified = true;
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}
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myWritePending = false;
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}
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return modified;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeAR::getAccessFlags(uInt16 address) const
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{
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return myCodeAccessBase[(address & 0x07FF) +
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myImageOffset[(address & 0x0800) ? 1 : 0]];
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeAR::setAccessFlags(uInt16 address, uInt8 flags)
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{
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myCodeAccessBase[(address & 0x07FF) +
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myImageOffset[(address & 0x0800) ? 1 : 0]] |= flags;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeAR::bankConfiguration(uInt8 configuration)
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{
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// D7-D5 of this byte: Write Pulse Delay (n/a for emulator)
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//
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// D4-D0: RAM/ROM configuration:
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// $F000-F7FF $F800-FFFF Address range that banks map into
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// 000wp 2 ROM
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// 001wp 0 ROM
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// 010wp 2 0 as used in Commie Mutants and many others
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// 011wp 0 2 as used in Suicide Mission
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// 100wp 2 ROM
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// 101wp 1 ROM
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// 110wp 2 1 as used in Killer Satellites
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// 111wp 1 2 as we use for 2k/4k ROM cloning
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//
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// w = Write Enable (1 = enabled; accesses to $F000-$F0FF cause writes
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// to happen. 0 = disabled, and the cart acts like ROM.)
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// p = ROM Power (0 = enabled, 1 = off.) Only power the ROM if you're
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// wanting to access the ROM for multiloads. Otherwise set to 1.
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myCurrentBank = configuration & 0x1F; // remember for the bank() method
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// Handle ROM power configuration
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myPower = !(configuration & 0x01);
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myWriteEnabled = configuration & 0x02;
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switch((configuration >> 2) & 0x07)
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{
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case 0:
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{
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myImageOffset[0] = 2 << 11;
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myImageOffset[1] = 3 << 11;
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break;
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}
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case 1:
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{
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myImageOffset[0] = 0 ;
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myImageOffset[1] = 3 << 11;
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break;
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}
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case 2:
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{
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myImageOffset[0] = 2 << 11;
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myImageOffset[1] = 0 ;
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break;
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}
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case 3:
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{
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myImageOffset[0] = 0 ;
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myImageOffset[1] = 2 << 11;
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break;
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}
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case 4:
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{
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myImageOffset[0] = 2 << 11;
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myImageOffset[1] = 3 << 11;
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break;
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}
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case 5:
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{
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myImageOffset[0] = 1 << 11;
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myImageOffset[1] = 3 << 11;
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break;
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}
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case 6:
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{
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myImageOffset[0] = 2 << 11;
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myImageOffset[1] = 1 << 11;
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break;
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}
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case 7:
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{
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myImageOffset[0] = 1 << 11;
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myImageOffset[1] = 2 << 11;
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break;
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}
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}
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return myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeAR::initializeROM()
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{
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// Note that the following offsets depend on the 'scrom.asm' file
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// in src/emucore/misc. If that file is ever recompiled (and its
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// contents placed in the ourDummyROMCode array), the offsets will
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// almost definitely change
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// The scrom.asm code checks a value at offset 109 as follows:
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// 0xFF -> do a complete jump over the SC BIOS progress bars code
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// 0x00 -> show SC BIOS progress bars as normal
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ourDummyROMCode[109] = mySettings.getBool("fastscbios") ? 0xFF : 0x00;
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// The accumulator should contain a random value after exiting the
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// SC BIOS code - a value placed in offset 281 will be stored in A
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ourDummyROMCode[281] = mySystem->randGenerator().next();
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// Initialize ROM with illegal 6502 opcode that causes a real 6502 to jam
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memset(myImage + (3<<11), 0x02, 2048);
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// Copy the "dummy" Supercharger BIOS code into the ROM area
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memcpy(myImage + (3<<11), ourDummyROMCode, sizeof(ourDummyROMCode));
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// Finally set 6502 vectors to point to initial load code at 0xF80A of BIOS
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myImage[(3<<11) + 2044] = 0x0A;
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myImage[(3<<11) + 2045] = 0xF8;
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myImage[(3<<11) + 2046] = 0x0A;
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myImage[(3<<11) + 2047] = 0xF8;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeAR::checksum(uInt8* s, uInt16 length)
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{
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uInt8 sum = 0;
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for(uInt32 i = 0; i < length; ++i)
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sum += s[i];
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return sum;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeAR::loadIntoRAM(uInt8 load)
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{
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uInt16 image;
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// Scan through all of the loads to see if we find the one we're looking for
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for(image = 0; image < myNumberOfLoadImages; ++image)
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{
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// Is this the correct load?
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if(myLoadImages[(image * 8448) + 8192 + 5] == load)
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{
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// Copy the load's header
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memcpy(myHeader, myLoadImages.get() + (image * 8448) + 8192, 256);
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// Verify the load's header
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if(checksum(myHeader, 8) != 0x55)
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{
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cerr << "WARNING: The Supercharger header checksum is invalid...\n";
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}
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// Load all of the pages from the load
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bool invalidPageChecksumSeen = false;
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for(uInt32 j = 0; j < myHeader[3]; ++j)
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{
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uInt32 bank = myHeader[16 + j] & 0x03;
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uInt32 page = (myHeader[16 + j] >> 2) & 0x07;
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uInt8* src = myLoadImages.get() + (image * 8448) + (j * 256);
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uInt8 sum = checksum(src, 256) + myHeader[16 + j] + myHeader[64 + j];
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if(!invalidPageChecksumSeen && (sum != 0x55))
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{
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cerr << "WARNING: Some Supercharger page checksums are invalid...\n";
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invalidPageChecksumSeen = true;
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}
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// Copy page to Supercharger RAM (don't allow a copy into ROM area)
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if(bank < 3)
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{
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memcpy(myImage + (bank * 2048) + (page * 256), src, 256);
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}
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}
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// Copy the bank switching byte and starting address into the 2600's
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// RAM for the "dummy" SC BIOS to access it
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mySystem->poke(0xfe, myHeader[0]);
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mySystem->poke(0xff, myHeader[1]);
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mySystem->poke(0x80, myHeader[2]);
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myBankChanged = true;
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return;
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}
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}
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// TODO: Should probably switch to an internal ROM routine to display
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// this message to the user...
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cerr << "ERROR: Supercharger load is missing from ROM image...\n";
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeAR::bank(uInt16 bank)
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{
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if(!bankLocked())
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return bankConfiguration(bank);
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else
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return false;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeAR::getBank() const
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{
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return myCurrentBank;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeAR::bankCount() const
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{
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return 32;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeAR::patch(uInt16 address, uInt8 value)
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{
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// TODO - add support for debugger
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return false;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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const uInt8* CartridgeAR::getImage(uInt32& size) const
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{
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size = mySize;
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return myLoadImages.get();
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeAR::save(Serializer& out) const
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{
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try
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{
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out.putString(name());
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// Indicates the offest within the image for the corresponding bank
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out.putIntArray(myImageOffset, 2);
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// The 6K of RAM and 2K of ROM contained in the Supercharger
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out.putByteArray(myImage, 8192);
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// The 256 byte header for the current 8448 byte load
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out.putByteArray(myHeader, 256);
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// All of the 8448 byte loads associated with the game
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// Note that the size of this array is myNumberOfLoadImages * 8448
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out.putByteArray(myLoadImages.get(), myNumberOfLoadImages * 8448);
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// Indicates how many 8448 loads there are
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out.putByte(myNumberOfLoadImages);
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// Indicates if the RAM is write enabled
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out.putBool(myWriteEnabled);
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// Indicates if the ROM's power is on or off
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out.putBool(myPower);
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// Data hold register used for writing
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out.putByte(myDataHoldRegister);
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// Indicates number of distinct accesses when data hold register was set
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out.putInt(myNumberOfDistinctAccesses);
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// Indicates if a write is pending or not
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out.putBool(myWritePending);
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}
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catch(...)
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{
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cerr << "ERROR: CartridgeAR::save" << endl;
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return false;
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}
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return true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeAR::load(Serializer& in)
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{
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try
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{
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if(in.getString() != name())
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return false;
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// Indicates the offest within the image for the corresponding bank
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in.getIntArray(myImageOffset, 2);
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// The 6K of RAM and 2K of ROM contained in the Supercharger
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in.getByteArray(myImage, 8192);
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// The 256 byte header for the current 8448 byte load
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in.getByteArray(myHeader, 256);
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// All of the 8448 byte loads associated with the game
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// Note that the size of this array is myNumberOfLoadImages * 8448
|
|
in.getByteArray(myLoadImages.get(), myNumberOfLoadImages * 8448);
|
|
|
|
// Indicates how many 8448 loads there are
|
|
myNumberOfLoadImages = in.getByte();
|
|
|
|
// Indicates if the RAM is write enabled
|
|
myWriteEnabled = in.getBool();
|
|
|
|
// Indicates if the ROM's power is on or off
|
|
myPower = in.getBool();
|
|
|
|
// Data hold register used for writing
|
|
myDataHoldRegister = in.getByte();
|
|
|
|
// Indicates number of distinct accesses when data hold register was set
|
|
myNumberOfDistinctAccesses = in.getInt();
|
|
|
|
// Indicates if a write is pending or not
|
|
myWritePending = in.getBool();
|
|
}
|
|
catch(...)
|
|
{
|
|
cerr << "ERROR: CartridgeAR::load" << endl;
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
|
uInt8 CartridgeAR::ourDummyROMCode[] = {
|
|
0xa5, 0xfa, 0x85, 0x80, 0x4c, 0x18, 0xf8, 0xff,
|
|
0xff, 0xff, 0x78, 0xd8, 0xa0, 0x00, 0xa2, 0x00,
|
|
0x94, 0x00, 0xe8, 0xd0, 0xfb, 0x4c, 0x50, 0xf8,
|
|
0xa2, 0x00, 0xbd, 0x06, 0xf0, 0xad, 0xf8, 0xff,
|
|
0xa2, 0x00, 0xad, 0x00, 0xf0, 0xea, 0xbd, 0x00,
|
|
0xf7, 0xca, 0xd0, 0xf6, 0x4c, 0x50, 0xf8, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xa2, 0x03, 0xbc, 0x22, 0xf9, 0x94, 0xfa, 0xca,
|
|
0x10, 0xf8, 0xa0, 0x00, 0xa2, 0x28, 0x94, 0x04,
|
|
0xca, 0x10, 0xfb, 0xa2, 0x1c, 0x94, 0x81, 0xca,
|
|
0x10, 0xfb, 0xa9, 0xff, 0xc9, 0x00, 0xd0, 0x03,
|
|
0x4c, 0x13, 0xf9, 0xa9, 0x00, 0x85, 0x1b, 0x85,
|
|
0x1c, 0x85, 0x1d, 0x85, 0x1e, 0x85, 0x1f, 0x85,
|
|
0x19, 0x85, 0x1a, 0x85, 0x08, 0x85, 0x01, 0xa9,
|
|
0x10, 0x85, 0x21, 0x85, 0x02, 0xa2, 0x07, 0xca,
|
|
0xca, 0xd0, 0xfd, 0xa9, 0x00, 0x85, 0x20, 0x85,
|
|
0x10, 0x85, 0x11, 0x85, 0x02, 0x85, 0x2a, 0xa9,
|
|
0x05, 0x85, 0x0a, 0xa9, 0xff, 0x85, 0x0d, 0x85,
|
|
0x0e, 0x85, 0x0f, 0x85, 0x84, 0x85, 0x85, 0xa9,
|
|
0xf0, 0x85, 0x83, 0xa9, 0x74, 0x85, 0x09, 0xa9,
|
|
0x0c, 0x85, 0x15, 0xa9, 0x1f, 0x85, 0x17, 0x85,
|
|
0x82, 0xa9, 0x07, 0x85, 0x19, 0xa2, 0x08, 0xa0,
|
|
0x00, 0x85, 0x02, 0x88, 0xd0, 0xfb, 0x85, 0x02,
|
|
0x85, 0x02, 0xa9, 0x02, 0x85, 0x02, 0x85, 0x00,
|
|
0x85, 0x02, 0x85, 0x02, 0x85, 0x02, 0xa9, 0x00,
|
|
0x85, 0x00, 0xca, 0x10, 0xe4, 0x06, 0x83, 0x66,
|
|
0x84, 0x26, 0x85, 0xa5, 0x83, 0x85, 0x0d, 0xa5,
|
|
0x84, 0x85, 0x0e, 0xa5, 0x85, 0x85, 0x0f, 0xa6,
|
|
0x82, 0xca, 0x86, 0x82, 0x86, 0x17, 0xe0, 0x0a,
|
|
0xd0, 0xc3, 0xa9, 0x02, 0x85, 0x01, 0xa2, 0x1c,
|
|
0xa0, 0x00, 0x84, 0x19, 0x84, 0x09, 0x94, 0x81,
|
|
0xca, 0x10, 0xfb, 0xa6, 0x80, 0xdd, 0x00, 0xf0,
|
|
0xa9, 0x9a, 0xa2, 0xff, 0xa0, 0x00, 0x9a, 0x4c,
|
|
0xfa, 0x00, 0xcd, 0xf8, 0xff, 0x4c
|
|
};
|
|
|
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
|
const uInt8 CartridgeAR::ourDefaultHeader[256] = {
|
|
0xac, 0xfa, 0x0f, 0x18, 0x62, 0x00, 0x24, 0x02,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
|
|
0x01, 0x05, 0x09, 0x0d, 0x11, 0x15, 0x19, 0x1d,
|
|
0x02, 0x06, 0x0a, 0x0e, 0x12, 0x16, 0x1a, 0x1e,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
|
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
|
|
};
|