mirror of https://github.com/stella-emu/stella.git
Refactor code and comments for TIA and RIOT 'page access' stuff.
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@ -150,10 +150,15 @@ void M6532::installDelegate(System& system, Device& device)
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// All accesses are to the given device
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System::PageAccess access(&device, System::PA_READWRITE);
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// We're installing in a 2600 system
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for(int address = 0; address < 8192; address += (1 << System::PAGE_SHIFT))
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if((address & 0x1080) == 0x0080)
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mySystem->setPageAccess(address >> System::PAGE_SHIFT, access);
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// Map all peek/poke to mirrors of RIOT address space to this class
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// That is, all mirrors of ZP RAM ($80 - $FF) and IO ($280 - $29F) in the
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// lower 4K of the 2600 address space are mapped here
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// The two types of addresses are differentiated in peek/poke as follows:
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// (addr & 0x0200) == 0x0000 is ZP RAM (A9 is 0)
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// (addr & 0x0200) != 0x0000 is IO (A9 is 1)
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for(uInt16 addr = 0; addr < 0x1000; addr += (1 << System::PAGE_SHIFT))
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if((addr & 0x0080) == 0x0080)
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mySystem->setPageAccess(addr >> System::PAGE_SHIFT, access);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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@ -161,11 +166,10 @@ uInt8 M6532::peek(uInt16 addr)
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{
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updateEmulation();
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// Access RAM directly. Originally, accesses to RAM could bypass
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// this method and its pages could be installed directly into the
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// system. However, certain cartridges (notably 4A50) can mirror
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// the RAM address space, making it necessary to chain accesses.
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if((addr & 0x1080) == 0x0080 && (addr & 0x0200) == 0x0000)
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// A9 distinguishes I/O registers from ZP RAM
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// A9 = 1 is read from I/O
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// A9 = 0 is read from RAM
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if((addr & 0x0200) == 0x0000)
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return myRAM[addr & 0x007f];
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switch(addr & 0x07)
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@ -230,11 +234,10 @@ bool M6532::poke(uInt16 addr, uInt8 value)
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{
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updateEmulation();
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// Access RAM directly. Originally, accesses to RAM could bypass
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// this method and its pages could be installed directly into the
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// system. However, certain cartridges (notably 4A50) can mirror
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// the RAM address space, making it necessary to chain accesses.
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if((addr & 0x1080) == 0x0080 && (addr & 0x0200) == 0x0000)
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// A9 distinguishes I/O registers from ZP RAM
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// A9 = 1 is write to I/O
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// A9 = 0 is write to RAM
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if((addr & 0x0200) == 0x0000)
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{
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myRAM[addr & 0x007f] = value;
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return true;
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@ -177,10 +177,12 @@ void TIA::installDelegate(System& system, Device& device)
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// All accesses are to the given device
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System::PageAccess access(&device, System::PA_READWRITE);
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// We're installing in a 2600 system
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for(uInt32 i = 0; i < 8192; i += (1 << System::PAGE_SHIFT))
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if((i & 0x1080) == 0x0000)
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mySystem->setPageAccess(i >> System::PAGE_SHIFT, access);
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// Map all peek/poke to mirrors of TIA address space to this class
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// That is, all mirrors of ($00 - $3F) in the lower 4K of the 2600
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// address space are mapped here
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for(uInt16 addr = 0; addr < 0x1000; addr += (1 << System::PAGE_SHIFT))
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if((addr & 0x0080) == 0x0000)
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mySystem->setPageAccess(addr >> System::PAGE_SHIFT, access);
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mySystem->m6502().setOnHaltCallback(
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[this] () {
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