mirror of https://github.com/stella-emu/stella.git
2nd part of Distella updates
This commit is contained in:
thrust26
parent
78d73976dc
commit
5f68b0565d
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@ -82,8 +82,9 @@ CartDebug::CartDebug(Debugger& dbg, Console& console, const OSystem& osystem)
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myBankInfo.push_back(info);
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// We know the address for the startup bank right now
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myBankInfo[myConsole.cartridge().startBank()].addressList.push_back(myDebugger.dpeek(0xfffc));
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addLabel("START", myDebugger.dpeek(0xfffc));
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myBankInfo[myConsole.cartridge().startBank()].addressList.push_front(myDebugger.dpeek(0xfffc));
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addLabel("Start", myDebugger.dpeek(0xfffc, DATA));
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addLabel("Break", myDebugger.dpeek(0xfffe));
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// Add system equates
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for(uInt16 addr = 0x00; addr <= 0x0F; ++addr)
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@ -114,16 +115,17 @@ CartDebug::CartDebug(Debugger& dbg, Console& console, const OSystem& osystem)
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myDisassembly.list.reserve(2048);
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// Add settings for Distella
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DiStella::settings.gfx_format =
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DiStella::settings.gfxFormat =
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myOSystem.settings().getInt("dis.gfxformat") == 16 ? Base::F_16 : Base::F_2;
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DiStella::settings.resolve_code =
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DiStella::settings.resolveCode =
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myOSystem.settings().getBool("dis.resolve");
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DiStella::settings.show_addresses =
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DiStella::settings.showAddresses =
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myOSystem.settings().getBool("dis.showaddr");
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DiStella::settings.aflag = false; // Not currently configurable
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DiStella::settings.fflag = true; // Not currently configurable
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DiStella::settings.rflag = myOSystem.settings().getBool("dis.relocate");
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DiStella::settings.bwidth = 9; // TODO - configure based on window size
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DiStella::settings.aFlag = false; // Not currently configurable
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DiStella::settings.fFlag = true; // Not currently configurable
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DiStella::settings.rFlag = myOSystem.settings().getBool("dis.relocate");
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DiStella::settings.bFlag = true; // Not currently configurable
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DiStella::settings.bytesWidth = 8+1; // TODO - configure based on window size
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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@ -263,34 +265,28 @@ bool CartDebug::disassemble(bool force)
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// Only add addresses when absolutely necessary, to cut down on the
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// work that Distella has to do
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// Distella expects the addresses to be unique and in sorted order
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if(bankChanged || !pcfound)
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{
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AddressList::const_iterator i;
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for(i = addresses.cbegin(); i != addresses.cend(); ++i)
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{
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if(PC < *i)
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{
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addresses.insert(i, PC);
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break;
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}
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else if(PC == *i) // already present
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if (PC == *i) // already present
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break;
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}
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// Otherwise, add the item at the end
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if(i == addresses.end())
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addresses.push_back(PC);
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if (i == addresses.end())
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addresses.push_back(PC);
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}
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// Always attempt to resolve code sections unless it's been
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// specifically disabled
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bool found = fillDisassemblyList(info, PC);
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if(!found && DiStella::settings.resolve_code)
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if(!found && DiStella::settings.resolveCode)
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{
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// Temporarily turn off code resolution
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DiStella::settings.resolve_code = false;
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DiStella::settings.resolveCode = false;
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fillDisassemblyList(info, PC);
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DiStella::settings.resolve_code = true;
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DiStella::settings.resolveCode = true;
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}
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}
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@ -973,20 +969,21 @@ string CartDebug::saveDisassembly()
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// We can't print the header to the disassembly until it's actually
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// been processed; therefore buffer output to a string first
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ostringstream buf;
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buf << "\n;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n;\n"
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<< "; MAIN PROGRAM\n"
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<< ";\n;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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buf << "\n\n;***********************************************************\n"
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<< "; Program Code + Data\n"
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<< ";***********************************************************\n\n";
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// Use specific settings for disassembly output
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// This will most likely differ from what you see in the debugger
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DiStella::Settings settings;
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settings.gfx_format = DiStella::settings.gfx_format;
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settings.resolve_code = true;
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settings.show_addresses = false;
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settings.aflag = false; // Otherwise DASM gets confused
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settings.fflag = DiStella::settings.fflag;
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settings.rflag = DiStella::settings.rflag;
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settings.bwidth = 8+1; // same as Stella debugger
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settings.gfxFormat = DiStella::settings.gfxFormat;
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settings.resolveCode = true;
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settings.showAddresses = false;
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settings.aFlag = false; // Otherwise DASM gets confused
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settings.fFlag = DiStella::settings.fFlag;
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settings.rFlag = DiStella::settings.rFlag;
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settings.bytesWidth = 8+1; // same as Stella debugger
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settings.bFlag = DiStella::settings.bFlag;; // process break routine (TODO)
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Disassembly disasm;
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disasm.list.reserve(2048);
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@ -1001,6 +998,9 @@ string CartDebug::saveDisassembly()
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disasm.list.clear();
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DiStella distella(*this, disasm.list, info, settings,
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myDisLabels, myDisDirectives, myReserved);
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//if (myReserved.breakFound)
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// addLabel("BREAK", myDebugger.dpeek(0xfffe));
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buf << " SEG CODE\n"
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<< " ORG $" << Base::HEX4 << info.offset << "\n\n";
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@ -1031,7 +1031,7 @@ string CartDebug::saveDisassembly()
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}
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case CartDebug::GFX:
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{
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buf << ".byte " << (settings.gfx_format == Base::F_2 ? "%" : "$")
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buf << ".byte " << (settings.gfxFormat == Base::F_2 ? "%" : "$")
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<< tag.bytes << " ; |";
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for(int c = 12; c < 20; ++c)
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buf << ((tag.disasm[c] == '\x1e') ? "#" : " ");
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@ -1040,7 +1040,7 @@ string CartDebug::saveDisassembly()
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}
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case CartDebug::PGFX:
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{
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buf << ".byte " << (settings.gfx_format == Base::F_2 ? "%" : "$")
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buf << ".byte " << (settings.gfxFormat == Base::F_2 ? "%" : "$")
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<< tag.bytes << " ; |";
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for(int c = 12; c < 20; ++c)
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buf << ((tag.disasm[c] == '\x1f') ? "*" : " ");
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@ -1087,9 +1087,9 @@ string CartDebug::saveDisassembly()
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addrUsed = addrUsed || myReserved.IOReadWrite[addr];
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if(addrUsed)
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{
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out << ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n"
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<< "; TIA AND IO CONSTANTS\n"
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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out << "\n;-----------------------------------------------------------\n"
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<< "; TIA and IO constants accessed\n"
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<< ";-----------------------------------------------------------\n\n";
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for(uInt16 addr = 0x00; addr <= 0x0F; ++addr)
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if(myReserved.TIARead[addr] && ourTIAMnemonicR[addr])
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out << ALIGN(16) << ourTIAMnemonicR[addr] << "= $"
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@ -1109,9 +1109,9 @@ string CartDebug::saveDisassembly()
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addrUsed = addrUsed || myReserved.ZPRAM[addr-0x80];
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if(addrUsed)
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{
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out << "\n;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n"
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<< "; RIOT RAM (zero-page)\n"
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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out << "\n\n;-----------------------------------------------------------\n"
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<< "; RIOT RAM (zero-page) labels\n"
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<< ";-----------------------------------------------------------\n\n";
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for(uInt16 addr = 0x80; addr <= 0xFF; ++addr)
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{
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if(myReserved.ZPRAM[addr-0x80] &&
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@ -1125,18 +1125,18 @@ string CartDebug::saveDisassembly()
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if(myReserved.Label.size() > 0)
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{
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out << "\n;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n"
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<< "; NON LOCATABLE\n"
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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out << "\n\n;-----------------------------------------------------------\n"
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<< "; Non Locatable Labels\n"
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<< ";-----------------------------------------------------------\n\n";
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for(const auto& iter: myReserved.Label)
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out << ALIGN(16) << iter.second << "= $" << iter.first << "\n";
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}
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if(myUserLabels.size() > 0)
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{
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out << "\n;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n"
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<< "; USER DEFINED\n"
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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out << "\n\n;-----------------------------------------------------------\n"
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<< "; User Defined Labels\n"
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<< ";-----------------------------------------------------------\n\n";
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int max_len = 16;
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for(const auto& iter: myUserLabels)
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max_len = std::max(max_len, int(iter.second.size()));
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@ -52,9 +52,9 @@ class CartDebug : public DebuggerSystem
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public:
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enum DisasmType {
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NONE = 0,
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REFERENCED = 1 << 0, /* code somewhere in the program references it,
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REFERENCED = 1 << 0, /* 0x01, code somewhere in the program references it,
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i.e. LDA $F372 referenced $F372 */
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VALID_ENTRY = 1 << 1, /* addresses that can have a label placed in front of it.
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VALID_ENTRY = 1 << 1, /* 0x02, addresses that can have a label placed in front of it.
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A good counterexample would be "FF00: LDA $FE00"; $FF01
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would be in the middle of a multi-byte instruction, and
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therefore cannot be labelled. */
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@ -63,12 +63,12 @@ class CartDebug : public DebuggerSystem
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// debugger, or specified in a Distella cfg file, and are listed in order
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// of decreasing hierarchy
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//
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CODE = 1 << 7, // disassemble-able code segments
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TCODE = 1 << 6, // (tentative) disassemble-able code segments
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GFX = 1 << 5, // addresses loaded into GRPx registers
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PGFX = 1 << 4, // addresses loaded into PFx registers
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DATA = 1 << 3, // addresses loaded into registers other than GRPx / PFx
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ROW = 1 << 2 // all other addresses
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CODE = 1 << 7, // 0x80, disassemble-able code segments
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TCODE = 1 << 6, // 0x40, (tentative) disassemble-able code segments
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GFX = 1 << 5, // 0x20, addresses loaded into GRPx registers
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PGFX = 1 << 4, // 0x10, addresses loaded into PFx registers
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DATA = 1 << 3, // 0x08, addresses loaded into registers other than GRPx / PFx
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ROW = 1 << 2 // 0x04, all other addresses
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};
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struct DisassemblyTag {
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DisasmType type;
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@ -317,6 +317,7 @@ class CartDebug : public DebuggerSystem
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bool IOReadWrite[24];
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bool ZPRAM[128];
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AddrToLabel Label;
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bool breakFound;
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};
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ReservedEquates myReserved;
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@ -206,8 +206,8 @@ class Debugger : public DialogContainer
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static Debugger& debugger() { return *myStaticDebugger; }
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/* These are now exposed so Expressions can use them. */
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int peek(int addr) { return mySystem.peek(addr); }
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int dpeek(int addr) { return mySystem.peek(addr) | (mySystem.peek(addr+1) << 8); }
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int peek(int addr, uInt8 flags = 0) { return mySystem.peek(addr, flags); }
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int dpeek(int addr, uInt8 flags = 0) { return mySystem.peek(addr, flags) | (mySystem.peek(addr+1, flags) << 8); }
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int getAccessFlags(uInt16 addr) const
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{ return mySystem.getAccessFlags(addr); }
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void setAccessFlags(uInt16 addr, uInt8 flags)
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File diff suppressed because it is too large
Load Diff
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@ -42,13 +42,14 @@ class DiStella
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// This will eventually grow to include all options supported by
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// standalone Distella
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struct Settings {
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Common::Base::Format gfx_format;
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bool resolve_code; // Attempt to detect code vs. data sections
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bool show_addresses; // Show PC addresses (always off for external output)
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bool aflag; // Turns 'A' off in accumulator instructions (-a in Distella)
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bool fflag; // Forces correct address length (-f in Distella)
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bool rflag; // Relocate calls out of address range (-r in Distella)
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int bwidth; // Number of bytes to use per line (with .byte xxx)
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Common::Base::Format gfxFormat;
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bool resolveCode; // Attempt to detect code vs. data sections
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bool showAddresses; // Show PC addresses (always off for external output)
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bool aFlag; // Turns 'A' off in accumulator instructions (-a in Distella)
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bool fFlag; // Forces correct address length (-f in Distella)
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bool rFlag; // Relocate calls out of address range (-r in Distella)
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bool bFlag; // Process break routine (-b in Distella)
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int bytesWidth; // Number of bytes to use per line (with .byte xxx)
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};
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static Settings settings; // Default settings
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@ -81,11 +82,13 @@ class DiStella
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// These functions are part of the original Distella code
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void disasm(uInt32 distart, int pass);
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void disasmPass1(uInt32 distart);
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bool check_range(uInt16 start, uInt16 end) const;
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int mark(uInt32 address, uInt8 mask, bool directive = false);
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bool checkBit(uInt16 address, uInt8 mask) const;
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bool checkBit(uInt16 address, uInt8 mask, bool useDebugger = true) const;
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bool DiStella::checkBits(uInt16 address, uInt8 mask, uInt8 notMask) const;
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bool checkBits(uInt16 address, uInt8 mask, uInt8 notMask, bool useDebugger = true) const;
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void outputGraphics();
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void outputBytes(CartDebug::DisasmType type);
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@ -118,7 +121,7 @@ class DiStella
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CartDebug::ReservedEquates& myReserved;
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stringstream myDisasmBuf;
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std::queue<uInt16> myAddressQueue;
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uInt16 myOffset, myPC, myPCEnd, myPass;
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uInt16 myOffset, myPC, myPCEnd;
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uInt16 mySegType;
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struct resource {
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@ -184,6 +187,7 @@ class DiStella
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AccessMode source;
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ReadWriteMode rw_mode;
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uInt8 cycles;
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uInt8 bytes;
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};
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static const Instruction_tag ourLookup[256];
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@ -582,7 +582,7 @@ void RomListWidget::startEditMode()
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{
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case CartDebug::GFX:
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case CartDebug::PGFX:
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_base = DiStella::settings.gfx_format;
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_base = DiStella::settings.gfxFormat;
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break;
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default:
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_base = Common::Base::format();
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@ -122,18 +122,18 @@ void RomWidget::handleCommand(CommandSender* sender, int cmd, int data, int id)
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case RomListWidget::kTentativeCodeCmd:
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{
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// 'data' is the boolean value
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DiStella::settings.resolve_code = data;
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DiStella::settings.resolveCode = data;
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instance().settings().setValue("dis.resolve",
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DiStella::settings.resolve_code);
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DiStella::settings.resolveCode);
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invalidate();
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break;
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}
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case RomListWidget::kPCAddressesCmd:
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// 'data' is the boolean value
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DiStella::settings.show_addresses = data;
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DiStella::settings.showAddresses = data;
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instance().settings().setValue("dis.showaddr",
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DiStella::settings.show_addresses);
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DiStella::settings.showAddresses);
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invalidate();
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break;
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@ -141,12 +141,12 @@ void RomWidget::handleCommand(CommandSender* sender, int cmd, int data, int id)
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// 'data' is the boolean value
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if(data)
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{
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DiStella::settings.gfx_format = Common::Base::F_2;
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DiStella::settings.gfxFormat = Common::Base::F_2;
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instance().settings().setValue("dis.gfxformat", "2");
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}
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else
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{
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DiStella::settings.gfx_format = Common::Base::F_16;
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DiStella::settings.gfxFormat = Common::Base::F_16;
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instance().settings().setValue("dis.gfxformat", "16");
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}
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invalidate();
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@ -154,9 +154,9 @@ void RomWidget::handleCommand(CommandSender* sender, int cmd, int data, int id)
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case RomListWidget::kAddrRelocationCmd:
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// 'data' is the boolean value
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DiStella::settings.rflag = data;
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DiStella::settings.rFlag = data;
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instance().settings().setValue("dis.relocate",
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DiStella::settings.rflag);
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DiStella::settings.rFlag);
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invalidate();
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break;
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}
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File diff suppressed because it is too large
Load Diff
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@ -38,7 +38,7 @@
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#ifndef CLEAR_LAST_PEEK
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#ifdef DEBUGGER_SUPPORT
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#define CLEAR_LAST_PEEK(_addr) _addr = -1;
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#define CLEAR_LAST_PEEK(_addr) _addr = 0;
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#else
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#define CLEAR_LAST_PEEK(_addr)
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#endif
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@ -83,25 +83,29 @@ define(M6502_ABSOLUTEX_READ, `{
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uInt16 low = peek(PC++, DISASM_CODE);
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uInt16 high = (uInt16(peek(PC++, DISASM_CODE)) << 8);
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intermediateAddress = high | uInt8(low + X);
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operand = peek(intermediateAddress, DISASM_DATA);
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if((low + X) > 0xFF)
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{
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operand = peek(intermediateAddress, DISASM_NONE);
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intermediateAddress = (high | low) + X;
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operand = peek(intermediateAddress, DISASM_DATA);
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}
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else
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{
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operand = peek(intermediateAddress, DISASM_DATA);
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}
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}')
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define(M6502_ABSOLUTEX_WRITE, `{
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uInt16 low = peek(PC++, DISASM_CODE);
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uInt16 high = (uInt16(peek(PC++, DISASM_CODE)) << 8);
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peek(high | uInt8(low + X), DISASM_DATA);
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peek(high | uInt8(low + X), DISASM_NONE);
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operandAddress = (high | low) + X;
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}')
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define(M6502_ABSOLUTEX_READMODIFYWRITE, `{
|
||||
uInt16 low = peek(PC++, DISASM_CODE);
|
||||
uInt16 high = (uInt16(peek(PC++, DISASM_CODE)) << 8);
|
||||
peek(high | uInt8(low + X), DISASM_DATA);
|
||||
peek(high | uInt8(low + X), DISASM_NONE);
|
||||
operandAddress = (high | low) + X;
|
||||
operand = peek(operandAddress, DISASM_DATA);
|
||||
poke(operandAddress, operand);
|
||||
|
|
@ -111,25 +115,29 @@ define(M6502_ABSOLUTEY_READ, `{
|
|||
uInt16 low = peek(PC++, DISASM_CODE);
|
||||
uInt16 high = (uInt16(peek(PC++, DISASM_CODE)) << 8);
|
||||
intermediateAddress = high | uInt8(low + Y);
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
if((low + Y) > 0xFF)
|
||||
{
|
||||
operand = peek(intermediateAddress, DISASM_NONE);
|
||||
intermediateAddress = (high | low) + Y;
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
}
|
||||
else
|
||||
{
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
}
|
||||
}')
|
||||
|
||||
define(M6502_ABSOLUTEY_WRITE, `{
|
||||
uInt16 low = peek(PC++, DISASM_CODE);
|
||||
uInt16 high = (uInt16(peek(PC++, DISASM_CODE)) << 8);
|
||||
peek(high | uInt8(low + Y), DISASM_DATA);
|
||||
peek(high | uInt8(low + Y), DISASM_NONE);
|
||||
operandAddress = (high | low) + Y;
|
||||
}')
|
||||
|
||||
define(M6502_ABSOLUTEY_READMODIFYWRITE, `{
|
||||
uInt16 low = peek(PC++, DISASM_CODE);
|
||||
uInt16 high = (uInt16(peek(PC++, DISASM_CODE)) << 8);
|
||||
peek(high | uInt8(low + Y), DISASM_DATA);
|
||||
peek(high | uInt8(low + Y), DISASM_NONE);
|
||||
operandAddress = (high | low) + Y;
|
||||
operand = peek(operandAddress, DISASM_DATA);
|
||||
poke(operandAddress, operand);
|
||||
|
|
@ -152,20 +160,20 @@ define(M6502_ZERO_READMODIFYWRITE, `{
|
|||
|
||||
define(M6502_ZEROX_READ, `{
|
||||
intermediateAddress = peek(PC++, DISASM_CODE);
|
||||
peek(intermediateAddress, DISASM_DATA);
|
||||
peek(intermediateAddress, DISASM_NONE);
|
||||
intermediateAddress += X;
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
}')
|
||||
|
||||
define(M6502_ZEROX_WRITE, `{
|
||||
operandAddress = peek(PC++, DISASM_CODE);
|
||||
peek(operandAddress, DISASM_DATA);
|
||||
peek(operandAddress, DISASM_NONE);
|
||||
operandAddress = (operandAddress + X) & 0xFF;
|
||||
}')
|
||||
|
||||
define(M6502_ZEROX_READMODIFYWRITE, `{
|
||||
operandAddress = peek(PC++, DISASM_CODE);
|
||||
peek(operandAddress, DISASM_DATA);
|
||||
peek(operandAddress, DISASM_NONE);
|
||||
operandAddress = (operandAddress + X) & 0xFF;
|
||||
operand = peek(operandAddress, DISASM_DATA);
|
||||
poke(operandAddress, operand);
|
||||
|
|
@ -173,20 +181,20 @@ define(M6502_ZEROX_READMODIFYWRITE, `{
|
|||
|
||||
define(M6502_ZEROY_READ, `{
|
||||
intermediateAddress = peek(PC++, DISASM_CODE);
|
||||
peek(intermediateAddress, DISASM_DATA);
|
||||
peek(intermediateAddress, DISASM_NONE);
|
||||
intermediateAddress += Y;
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
}')
|
||||
|
||||
define(M6502_ZEROY_WRITE, `{
|
||||
operandAddress = peek(PC++, DISASM_CODE);
|
||||
peek(operandAddress, DISASM_DATA);
|
||||
peek(operandAddress, DISASM_NONE);
|
||||
operandAddress = (operandAddress + Y) & 0xFF;
|
||||
}')
|
||||
|
||||
define(M6502_ZEROY_READMODIFYWRITE, `{
|
||||
operandAddress = peek(PC++, DISASM_CODE);
|
||||
peek(operandAddress, DISASM_DATA);
|
||||
peek(operandAddress, DISASM_NONE);
|
||||
operandAddress = (operandAddress + Y) & 0xFF;
|
||||
operand = peek(operandAddress, DISASM_DATA);
|
||||
poke(operandAddress, operand);
|
||||
|
|
@ -205,7 +213,7 @@ define(M6502_INDIRECT, `{
|
|||
|
||||
define(M6502_INDIRECTX_READ, `{
|
||||
uInt8 pointer = peek(PC++, DISASM_CODE);
|
||||
peek(pointer, DISASM_DATA);
|
||||
peek(pointer, DISASM_NONE);
|
||||
pointer += X;
|
||||
intermediateAddress = peek(pointer++, DISASM_DATA);
|
||||
intermediateAddress |= (uInt16(peek(pointer, DISASM_DATA)) << 8);
|
||||
|
|
@ -214,7 +222,7 @@ define(M6502_INDIRECTX_READ, `{
|
|||
|
||||
define(M6502_INDIRECTX_WRITE, `{
|
||||
uInt8 pointer = peek(PC++, DISASM_CODE);
|
||||
peek(pointer, DISASM_DATA);
|
||||
peek(pointer, DISASM_NONE);
|
||||
pointer += X;
|
||||
operandAddress = peek(pointer++, DISASM_DATA);
|
||||
operandAddress |= (uInt16(peek(pointer, DISASM_DATA)) << 8);
|
||||
|
|
@ -222,7 +230,7 @@ define(M6502_INDIRECTX_WRITE, `{
|
|||
|
||||
define(M6502_INDIRECTX_READMODIFYWRITE, `{
|
||||
uInt8 pointer = peek(PC++, DISASM_CODE);
|
||||
peek(pointer, DISASM_DATA);
|
||||
peek(pointer, DISASM_NONE);
|
||||
pointer += X;
|
||||
operandAddress = peek(pointer++, DISASM_DATA);
|
||||
operandAddress |= (uInt16(peek(pointer, DISASM_DATA)) << 8);
|
||||
|
|
@ -235,19 +243,23 @@ define(M6502_INDIRECTY_READ, `{
|
|||
uInt16 low = peek(pointer++, DISASM_DATA);
|
||||
uInt16 high = (uInt16(peek(pointer, DISASM_DATA)) << 8);
|
||||
intermediateAddress = high | uInt8(low + Y);
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
if((low + Y) > 0xFF)
|
||||
{
|
||||
operand = peek(intermediateAddress, DISASM_NONE);
|
||||
intermediateAddress = (high | low) + Y;
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
}
|
||||
else
|
||||
{
|
||||
operand = peek(intermediateAddress, DISASM_DATA);
|
||||
}
|
||||
}')
|
||||
|
||||
define(M6502_INDIRECTY_WRITE, `{
|
||||
uInt8 pointer = peek(PC++, DISASM_CODE);
|
||||
uInt16 low = peek(pointer++, DISASM_DATA);
|
||||
uInt16 high = (uInt16(peek(pointer, DISASM_DATA)) << 8);
|
||||
peek(high | uInt8(low + Y), DISASM_DATA);
|
||||
peek(high | uInt8(low + Y), DISASM_NONE);
|
||||
operandAddress = (high | low) + Y;
|
||||
}')
|
||||
|
||||
|
|
@ -255,13 +267,12 @@ define(M6502_INDIRECTY_READMODIFYWRITE, `{
|
|||
uInt8 pointer = peek(PC++, DISASM_CODE);
|
||||
uInt16 low = peek(pointer++, DISASM_DATA);
|
||||
uInt16 high = (uInt16(peek(pointer, DISASM_DATA)) << 8);
|
||||
peek(high | uInt8(low + Y), DISASM_DATA);
|
||||
peek(high | uInt8(low + Y), DISASM_NONE);
|
||||
operandAddress = (high | low) + Y;
|
||||
operand = peek(operandAddress, DISASM_DATA);
|
||||
poke(operandAddress, operand);
|
||||
}')
|
||||
|
||||
|
||||
define(M6502_BCC, `{
|
||||
if(!C)
|
||||
{
|
||||
|
|
@ -484,7 +495,7 @@ define(M6502_BIT, `{
|
|||
}')
|
||||
|
||||
define(M6502_BRK, `{
|
||||
peek(PC++, DISASM_CODE);
|
||||
peek(PC++, DISASM_NONE);
|
||||
|
||||
B = true;
|
||||
|
||||
|
|
@ -494,8 +505,8 @@ define(M6502_BRK, `{
|
|||
|
||||
I = true;
|
||||
|
||||
PC = peek(0xfffe, DISASM_NONE);
|
||||
PC |= (uInt16(peek(0xffff, DISASM_NONE)) << 8);
|
||||
PC = peek(0xfffe, DISASM_DATA);
|
||||
PC |= (uInt16(peek(0xffff, DISASM_DATA)) << 8);
|
||||
}')
|
||||
|
||||
define(M6502_CLC, `{
|
||||
|
|
@ -996,7 +1007,8 @@ define(M6502_TYA, `{
|
|||
N = A & 0x80;
|
||||
}')
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ADC
|
||||
case 0x69:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_ADC
|
||||
|
|
@ -1037,20 +1049,23 @@ M6502_INDIRECTY_READ
|
|||
M6502_ADC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ASR
|
||||
case 0x4b:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_ASR
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ANC
|
||||
case 0x0b:
|
||||
case 0x2b:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_ANC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// AND
|
||||
case 0x29:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_AND
|
||||
|
|
@ -1091,19 +1106,22 @@ M6502_INDIRECTY_READ
|
|||
M6502_AND
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ANE
|
||||
case 0x8b:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_ANE
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ARR
|
||||
case 0x6b:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_ARR
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ASL
|
||||
case 0x0a:
|
||||
M6502_IMPLIED
|
||||
M6502_ASLA
|
||||
|
|
@ -1129,7 +1147,20 @@ M6502_ABSOLUTEX_READMODIFYWRITE
|
|||
M6502_ASL
|
||||
break;
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// BIT
|
||||
case 0x24:
|
||||
M6502_ZERO_READ
|
||||
M6502_BIT
|
||||
break;
|
||||
|
||||
case 0x2C:
|
||||
M6502_ABSOLUTE_READ
|
||||
M6502_BIT
|
||||
break;
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// Branches
|
||||
case 0x90:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_BCC
|
||||
|
|
@ -1148,17 +1179,6 @@ M6502_BEQ
|
|||
break;
|
||||
|
||||
|
||||
case 0x24:
|
||||
M6502_ZERO_READ
|
||||
M6502_BIT
|
||||
break;
|
||||
|
||||
case 0x2C:
|
||||
M6502_ABSOLUTE_READ
|
||||
M6502_BIT
|
||||
break;
|
||||
|
||||
|
||||
case 0x30:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_BMI
|
||||
|
|
@ -1177,11 +1197,6 @@ M6502_BPL
|
|||
break;
|
||||
|
||||
|
||||
case 0x00:
|
||||
M6502_BRK
|
||||
break;
|
||||
|
||||
|
||||
case 0x50:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_BVC
|
||||
|
|
@ -1193,31 +1208,42 @@ M6502_IMMEDIATE_READ
|
|||
M6502_BVS
|
||||
break;
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// BRK
|
||||
case 0x00:
|
||||
M6502_BRK
|
||||
break;
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CLC
|
||||
case 0x18:
|
||||
M6502_IMPLIED
|
||||
M6502_CLC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CLD
|
||||
case 0xd8:
|
||||
M6502_IMPLIED
|
||||
M6502_CLD
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CLI
|
||||
case 0x58:
|
||||
M6502_IMPLIED
|
||||
M6502_CLI
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CLV
|
||||
case 0xb8:
|
||||
M6502_IMPLIED
|
||||
M6502_CLV
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CMP
|
||||
case 0xc9:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_CMP
|
||||
|
|
@ -1258,7 +1284,8 @@ M6502_INDIRECTY_READ
|
|||
M6502_CMP
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CPX
|
||||
case 0xe0:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_CPX
|
||||
|
|
@ -1274,7 +1301,8 @@ M6502_ABSOLUTE_READ
|
|||
M6502_CPX
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// CPY
|
||||
case 0xc0:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_CPY
|
||||
|
|
@ -1290,7 +1318,8 @@ M6502_ABSOLUTE_READ
|
|||
M6502_CPY
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// DCP
|
||||
case 0xcf:
|
||||
M6502_ABSOLUTE_READMODIFYWRITE
|
||||
M6502_DCP
|
||||
|
|
@ -1326,7 +1355,8 @@ M6502_INDIRECTY_READMODIFYWRITE
|
|||
M6502_DCP
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// DEC
|
||||
case 0xc6:
|
||||
M6502_ZERO_READMODIFYWRITE
|
||||
M6502_DEC
|
||||
|
|
@ -1347,19 +1377,22 @@ M6502_ABSOLUTEX_READMODIFYWRITE
|
|||
M6502_DEC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// DEX
|
||||
case 0xca:
|
||||
M6502_IMPLIED
|
||||
M6502_DEX
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// DEY
|
||||
case 0x88:
|
||||
M6502_IMPLIED
|
||||
M6502_DEY
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// EOR
|
||||
case 0x49:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_EOR
|
||||
|
|
@ -1400,7 +1433,8 @@ M6502_INDIRECTY_READ
|
|||
M6502_EOR
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// INC
|
||||
case 0xe6:
|
||||
M6502_ZERO_READMODIFYWRITE
|
||||
M6502_INC
|
||||
|
|
@ -1421,19 +1455,22 @@ M6502_ABSOLUTEX_READMODIFYWRITE
|
|||
M6502_INC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// INX
|
||||
case 0xe8:
|
||||
M6502_IMPLIED
|
||||
M6502_INX
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// INY
|
||||
case 0xc8:
|
||||
M6502_IMPLIED
|
||||
M6502_INY
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ISB
|
||||
case 0xef:
|
||||
M6502_ABSOLUTE_READMODIFYWRITE
|
||||
M6502_ISB
|
||||
|
|
@ -1469,7 +1506,8 @@ M6502_INDIRECTY_READMODIFYWRITE
|
|||
M6502_ISB
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// JMP
|
||||
case 0x4c:
|
||||
M6502_ABSOLUTE_WRITE
|
||||
M6502_JMP
|
||||
|
|
@ -1480,12 +1518,14 @@ M6502_INDIRECT
|
|||
M6502_JMP
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// JSR
|
||||
case 0x20:
|
||||
M6502_JSR
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// LAS
|
||||
case 0xbb:
|
||||
M6502_ABSOLUTEY_READ
|
||||
M6502_LAS
|
||||
|
|
@ -1657,7 +1697,8 @@ M6502_LDY
|
|||
break;
|
||||
//////////////////////////////////////////////////
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// LSR
|
||||
case 0x4a:
|
||||
M6502_IMPLIED
|
||||
M6502_LSRA
|
||||
|
|
@ -1684,13 +1725,15 @@ M6502_ABSOLUTEX_READMODIFYWRITE
|
|||
M6502_LSR
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// LXA
|
||||
case 0xab:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_LXA
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// NOP
|
||||
case 0x1a:
|
||||
case 0x3a:
|
||||
case 0x5a:
|
||||
|
|
@ -1795,35 +1838,40 @@ M6502_ORA
|
|||
break;
|
||||
//////////////////////////////////////////////////
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// PHA
|
||||
case 0x48:
|
||||
M6502_IMPLIED
|
||||
// TODO - add tracking for this opcode
|
||||
M6502_PHA
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// PHP
|
||||
case 0x08:
|
||||
M6502_IMPLIED
|
||||
// TODO - add tracking for this opcode
|
||||
M6502_PHP
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// PLA
|
||||
case 0x68:
|
||||
M6502_IMPLIED
|
||||
// TODO - add tracking for this opcode
|
||||
M6502_PLA
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// PLP
|
||||
case 0x28:
|
||||
M6502_IMPLIED
|
||||
// TODO - add tracking for this opcode
|
||||
M6502_PLP
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// RLA
|
||||
case 0x2f:
|
||||
M6502_ABSOLUTE_READMODIFYWRITE
|
||||
M6502_RLA
|
||||
|
|
@ -1859,13 +1907,13 @@ M6502_INDIRECTY_READMODIFYWRITE
|
|||
M6502_RLA
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ROL
|
||||
case 0x2a:
|
||||
M6502_IMPLIED
|
||||
M6502_ROLA
|
||||
break;
|
||||
|
||||
|
||||
case 0x26:
|
||||
M6502_ZERO_READMODIFYWRITE
|
||||
M6502_ROL
|
||||
|
|
@ -1886,7 +1934,8 @@ M6502_ABSOLUTEX_READMODIFYWRITE
|
|||
M6502_ROL
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// ROR
|
||||
case 0x6a:
|
||||
M6502_IMPLIED
|
||||
M6502_RORA
|
||||
|
|
@ -1912,7 +1961,8 @@ M6502_ABSOLUTEX_READMODIFYWRITE
|
|||
M6502_ROR
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// RRA
|
||||
case 0x6f:
|
||||
M6502_ABSOLUTE_READMODIFYWRITE
|
||||
M6502_RRA
|
||||
|
|
@ -1948,19 +1998,22 @@ M6502_INDIRECTY_READMODIFYWRITE
|
|||
M6502_RRA
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// RTI
|
||||
case 0x40:
|
||||
M6502_IMPLIED
|
||||
M6502_RTI
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// RTS
|
||||
case 0x60:
|
||||
M6502_IMPLIED
|
||||
M6502_RTS
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SAX
|
||||
case 0x8f:
|
||||
M6502_ABSOLUTE_WRITE
|
||||
M6502_SAX
|
||||
|
|
@ -1981,7 +2034,8 @@ M6502_INDIRECTX_WRITE
|
|||
M6502_SAX
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SBC
|
||||
case 0xe9:
|
||||
case 0xeb:
|
||||
M6502_IMMEDIATE_READ
|
||||
|
|
@ -2023,31 +2077,36 @@ M6502_INDIRECTY_READ
|
|||
M6502_SBC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SBX
|
||||
case 0xcb:
|
||||
M6502_IMMEDIATE_READ
|
||||
M6502_SBX
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SEC
|
||||
case 0x38:
|
||||
M6502_IMPLIED
|
||||
M6502_SEC
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SED
|
||||
case 0xf8:
|
||||
M6502_IMPLIED
|
||||
M6502_SED
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SEI
|
||||
case 0x78:
|
||||
M6502_IMPLIED
|
||||
M6502_SEI
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SHA
|
||||
case 0x9f:
|
||||
M6502_ABSOLUTEY_WRITE
|
||||
M6502_SHA
|
||||
|
|
@ -2058,25 +2117,29 @@ M6502_INDIRECTY_WRITE
|
|||
M6502_SHA
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SHS
|
||||
case 0x9b:
|
||||
M6502_ABSOLUTEY_WRITE
|
||||
M6502_SHS
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SHX
|
||||
case 0x9e:
|
||||
M6502_ABSOLUTEY_WRITE
|
||||
M6502_SHX
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SHY
|
||||
case 0x9c:
|
||||
M6502_ABSOLUTEX_WRITE
|
||||
M6502_SHY
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SLO
|
||||
case 0x0f:
|
||||
M6502_ABSOLUTE_READMODIFYWRITE
|
||||
M6502_SLO
|
||||
|
|
@ -2112,7 +2175,8 @@ M6502_INDIRECTY_READMODIFYWRITE
|
|||
M6502_SLO
|
||||
break;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////
|
||||
// SRE
|
||||
case 0x4f:
|
||||
M6502_ABSOLUTE_READMODIFYWRITE
|
||||
M6502_SRE
|
||||
|
|
|
|||
|
|
@ -113,6 +113,9 @@ uInt8 System::peek(uInt16 addr, uInt8 flags)
|
|||
{
|
||||
PageAccess& access = myPageAccessTable[(addr & ADDRESS_MASK) >> PAGE_SHIFT];
|
||||
|
||||
if (addr == 0xf52c /*0xf505*/)
|
||||
addr = addr;
|
||||
|
||||
#ifdef DEBUGGER_SUPPORT
|
||||
// Set access type
|
||||
if(access.codeAccessBase)
|
||||
|
|
@ -142,6 +145,9 @@ void System::poke(uInt16 addr, uInt8 value)
|
|||
uInt16 page = (addr & ADDRESS_MASK) >> PAGE_SHIFT;
|
||||
PageAccess& access = myPageAccessTable[page];
|
||||
|
||||
if (addr == 0xf52c /*0xf505*/)
|
||||
addr = addr;
|
||||
|
||||
// See if this page uses direct accessing or not
|
||||
if(access.directPokeBase)
|
||||
{
|
||||
|
|
@ -181,6 +187,8 @@ void System::setAccessFlags(uInt16 addr, uInt8 flags)
|
|||
{
|
||||
#ifdef DEBUGGER_SUPPORT
|
||||
PageAccess& access = myPageAccessTable[(addr & ADDRESS_MASK) >> PAGE_SHIFT];
|
||||
if (addr == 0xf52c /*0xf505*/)
|
||||
addr = addr;
|
||||
|
||||
if(access.codeAccessBase)
|
||||
*(access.codeAccessBase + (addr & PAGE_MASK)) |= flags;
|
||||
|
|
|
|||
Loading…
Reference in New Issue