2012-01-02 20:31:42 +00:00
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//============================================================================
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//
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2016-12-30 00:00:30 +00:00
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// SSSS tt lll lll
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// SS SS tt ll ll
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// SS tttttt eeee ll ll aaaa
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2012-01-02 20:31:42 +00:00
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// SSSS tt ee ee ll ll aa
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// SS tt eeeeee ll ll aaaaa -- "An Atari 2600 VCS Emulator"
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// SS SS tt ee ll ll aa aa
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// SSSS ttt eeeee llll llll aaaaa
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//
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2016-12-30 00:00:30 +00:00
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// Copyright (c) 1995-2017 by Bradford W. Mott, Stephen Anthony
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2012-01-02 20:31:42 +00:00
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// and the Stella Team
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//
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// See the file "License.txt" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//============================================================================
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2014-11-04 00:34:56 +00:00
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#include "CompuMate.hxx"
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2012-01-02 20:31:42 +00:00
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#include "System.hxx"
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2012-03-11 23:26:12 +00:00
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#include "M6532.hxx"
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2012-01-02 20:31:42 +00:00
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#include "CartCM.hxx"
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2017-07-02 21:57:27 +00:00
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CartridgeCM::CartridgeCM(const BytePtr& image, uInt32 size,
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const Settings& settings)
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2015-12-05 01:30:17 +00:00
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: Cartridge(settings),
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mySWCHA(0xFF), // portA is all 1's
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myCurrentBank(0)
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2012-01-02 20:31:42 +00:00
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{
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// Copy the ROM image into my buffer
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2017-07-02 21:57:27 +00:00
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memcpy(myImage, image.get(), std::min(16384u, size));
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2012-01-02 20:31:42 +00:00
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createCodeAccessBase(16384);
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2012-03-11 23:26:12 +00:00
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2015-12-05 01:30:17 +00:00
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// On powerup, the last bank of ROM is enabled and RAM is disabled
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2013-04-22 16:41:05 +00:00
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myStartBank = mySWCHA & 0x3;
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeCM::reset()
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{
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2016-08-24 23:57:07 +00:00
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initializeRAM(myRAM, 2048);
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2012-03-11 23:26:12 +00:00
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// Upon reset we switch to the startup bank
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bank(myStartBank);
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeCM::install(System& system)
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{
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2012-03-11 23:26:12 +00:00
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mySystem = &system;
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// Mirror all access in RIOT; by doing so we're taking responsibility
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// for that address space in peek and poke below.
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2016-10-29 22:31:55 +00:00
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mySystem->m6532().installDelegate(system, *this);
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2012-03-11 23:26:12 +00:00
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// Install pages for the startup bank
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bank(myStartBank);
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeCM::peek(uInt16 address)
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{
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2012-03-11 23:26:12 +00:00
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// NOTE: This does not handle accessing cart ROM/RAM, however, this function
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// should never be called for ROM/RAM because of the way page accessing
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2012-03-15 15:22:57 +00:00
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// has been setup (it will only ever be called for RIOT reads)
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2012-03-11 23:26:12 +00:00
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return mySystem->m6532().peek(address);
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2012-03-11 23:26:12 +00:00
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bool CartridgeCM::poke(uInt16 address, uInt8 value)
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2012-01-02 20:31:42 +00:00
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{
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2012-03-11 23:26:12 +00:00
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// NOTE: This could be called for RIOT writes or cart ROM writes
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// In the latter case, the write is ignored
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if(!(address & 0x1000))
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{
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// RIOT mirroring, check bankswitch
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if(address == 0x280)
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{
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2013-04-22 16:41:05 +00:00
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mySWCHA = value;
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bank(mySWCHA & 0x3);
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2016-12-13 23:33:12 +00:00
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if(myCompuMate)
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{
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uInt8& column = myCompuMate->myColumn;
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if(value & 0x20)
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column = 0;
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if(value & 0x40)
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column = (column + 1) % 10;
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}
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2012-03-11 23:26:12 +00:00
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}
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mySystem->m6532().poke(address, value);
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}
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return myBankChanged;
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2012-01-02 20:31:42 +00:00
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}
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2014-11-04 00:34:56 +00:00
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeCM::column() const
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{
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return myCompuMate->myColumn;
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}
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2012-01-02 20:31:42 +00:00
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::bank(uInt16 bank)
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2012-03-11 23:26:12 +00:00
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{
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if(bankLocked()) return false;
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// Remember what bank we're in
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myCurrentBank = bank;
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uInt16 offset = myCurrentBank << 12;
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2012-03-15 15:22:57 +00:00
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// Although this scheme contains four 4K ROM banks and one 2K RAM bank,
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// it's easier to think of things in terms of 2K slices, as follows:
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2012-03-11 23:26:12 +00:00
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//
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// The lower 2K of cart address space always points to the lower 2K of the
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// current ROM bank
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// The upper 2K of cart address space can point to either the 2K of RAM or
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// the upper 2K of the current ROM bank
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2014-07-24 16:24:27 +00:00
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System::PageAccess access(this, System::PA_READ);
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2012-03-11 23:26:12 +00:00
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// Lower 2K (always ROM)
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2014-10-26 00:40:27 +00:00
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for(uInt32 address = 0x1000; address < 0x1800;
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address += (1 << System::PAGE_SHIFT))
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2012-03-11 23:26:12 +00:00
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{
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access.directPeekBase = &myImage[offset + (address & 0x0FFF)];
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access.codeAccessBase = &myCodeAccessBase[offset + (address & 0x0FFF)];
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2014-10-26 00:40:27 +00:00
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mySystem->setPageAccess(address >> System::PAGE_SHIFT, access);
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2012-03-11 23:26:12 +00:00
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}
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// Upper 2K (RAM or ROM)
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2014-10-26 00:40:27 +00:00
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for(uInt32 address = 0x1800; address < 0x2000;
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address += (1 << System::PAGE_SHIFT))
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2012-03-11 23:26:12 +00:00
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{
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access.type = System::PA_READWRITE;
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2013-04-22 16:41:05 +00:00
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if(mySWCHA & 0x10)
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2012-03-11 23:26:12 +00:00
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{
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access.directPeekBase = &myImage[offset + (address & 0x0FFF)];
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access.codeAccessBase = &myCodeAccessBase[offset + (address & 0x0FFF)];
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}
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else
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{
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access.directPeekBase = &myRAM[address & 0x7FF];
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access.codeAccessBase = &myCodeAccessBase[offset + (address & 0x07FF)];
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}
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2013-04-22 16:41:05 +00:00
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if((mySWCHA & 0x30) == 0x20)
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2012-03-11 23:26:12 +00:00
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access.directPokeBase = &myRAM[address & 0x7FF];
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else
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access.directPokeBase = 0;
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2014-10-26 00:40:27 +00:00
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mySystem->setPageAccess(address >> System::PAGE_SHIFT, access);
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2012-03-11 23:26:12 +00:00
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}
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return myBankChanged = true;
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2014-07-28 13:40:37 +00:00
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uInt16 CartridgeCM::getBank() const
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2012-01-02 20:31:42 +00:00
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{
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2012-03-11 23:26:12 +00:00
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return myCurrentBank;
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeCM::bankCount() const
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{
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2012-03-11 23:26:12 +00:00
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// We report 4 banks (of ROM), even though RAM can overlap the upper 2K
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// of cart address space at some times
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// However, this RAM isn't enabled in the normal way that bankswitching
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// works, so it is ignored here
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2012-01-02 20:31:42 +00:00
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return 4;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::patch(uInt16 address, uInt8 value)
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{
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2013-04-22 16:41:05 +00:00
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if((mySWCHA & 0x30) == 0x20)
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2012-03-11 23:26:12 +00:00
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myRAM[address & 0x7FF] = value;
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else
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myImage[(myCurrentBank << 12) + address] = value;
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return myBankChanged = true;
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2016-01-23 18:16:09 +00:00
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}
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2012-01-02 20:31:42 +00:00
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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const uInt8* CartridgeCM::getImage(int& size) const
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{
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size = 16384;
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return myImage;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::save(Serializer& out) const
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{
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2012-03-11 23:26:12 +00:00
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try
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{
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out.putString(name());
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2012-05-20 14:23:48 +00:00
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out.putShort(myCurrentBank);
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2013-04-22 16:41:05 +00:00
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out.putByte(mySWCHA);
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2014-11-04 00:34:56 +00:00
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out.putByte(myCompuMate->myColumn);
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2012-05-20 14:23:48 +00:00
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out.putByteArray(myRAM, 2048);
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2012-03-11 23:26:12 +00:00
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}
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2012-05-25 12:41:19 +00:00
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catch(...)
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2012-03-11 23:26:12 +00:00
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{
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2012-05-25 12:41:19 +00:00
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cerr << "ERROR: CartridgeCM::save" << endl;
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2012-03-11 23:26:12 +00:00
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return false;
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}
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return true;
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2012-01-02 20:31:42 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::load(Serializer& in)
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{
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2012-03-11 23:26:12 +00:00
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try
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{
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if(in.getString() != name())
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return false;
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2012-05-20 14:23:48 +00:00
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myCurrentBank = in.getShort();
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2013-04-22 16:41:05 +00:00
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mySWCHA = in.getByte();
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2014-11-04 00:34:56 +00:00
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myCompuMate->myColumn = in.getByte();
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2012-05-20 14:23:48 +00:00
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in.getByteArray(myRAM, 2048);
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2012-03-11 23:26:12 +00:00
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}
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2012-05-25 12:41:19 +00:00
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catch(...)
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2012-03-11 23:26:12 +00:00
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{
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2012-05-25 12:41:19 +00:00
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cerr << "ERROR: CartridgeCM::load" << endl;
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2012-03-11 23:26:12 +00:00
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return false;
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}
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// Remember what bank we were in
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bank(myCurrentBank);
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return true;
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2012-01-02 20:31:42 +00:00
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}
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