mirror of https://github.com/stella-emu/stella.git
Updated CompuMate emulation. This bankswitching side of things seems to be
working fine. Still TODO is the controller side, so you can actually input some data. git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2408 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
This commit is contained in:
stephena
parent
d0b8bd57e5
commit
b80a0ecdc9
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@ -21,6 +21,7 @@
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#include <cstring>
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#include "System.hxx"
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#include "M6532.hxx"
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#include "CartCM.hxx"
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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@ -30,6 +31,15 @@ CartridgeCM::CartridgeCM(const uInt8* image, uInt32 size, const Settings& settin
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// Copy the ROM image into my buffer
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memcpy(myImage, image, BSPF_min(16384u, size));
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createCodeAccessBase(16384);
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// This cart contains 2048 bytes extended RAM @ 0x1800
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// This RAM scheme is unique in that it doesn't require separate read/write ports
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registerRamArea(0x1800, 2048, 0x00, 0x00);
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// On powerup, portA is all 1's, so the last bank of ROM is enabled and
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// RAM is disabled
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myStartBank = 3;
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myRamState = 0x10;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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@ -40,47 +50,144 @@ CartridgeCM::~CartridgeCM()
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeCM::reset()
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{
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// Initialize RAM
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if(mySettings.getBool("ramrandom"))
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for(uInt32 i = 0; i < 2048; ++i)
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myRAM[i] = mySystem->randGenerator().next();
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else
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memset(myRAM, 0, 2048);
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// Upon reset we switch to the startup bank
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bank(myStartBank);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeCM::install(System& system)
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{
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mySystem = &system;
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uInt16 mask = mySystem->pageMask();
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// Make sure the system we're being installed in has a page size that'll work
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assert((0x1000 & mask) == 0);
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// Mirror all access in RIOT; by doing so we're taking responsibility
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// for that address space in peek and poke below.
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mySystem->m6532().install(system, *this);
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// Install pages for the startup bank
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bank(myStartBank);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeCM::peek(uInt16 address)
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{
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return 0;
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// NOTE: This does not handle accessing cart ROM/RAM, however, this function
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// should never be called for ROM/RAM because of the way page accessing
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// has been setup
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// It will only ever be called for RIOT reads
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return mySystem->m6532().peek(address);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::poke(uInt16 address, uInt8)
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bool CartridgeCM::poke(uInt16 address, uInt8 value)
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{
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return false;
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// NOTE: This could be called for RIOT writes or cart ROM writes
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// In the latter case, the write is ignored
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if(!(address & 0x1000))
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{
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// RIOT mirroring, check bankswitch
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if(address == 0x280)
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{
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myRamState = value;
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bank(myRamState & 0x3);
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if(value & 0x20) myColumn = 0;
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if(value & 0x40) myColumn = (myColumn + 1) % 10;
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}
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mySystem->m6532().poke(address, value);
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}
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return myBankChanged;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::bank(uInt16 bank)
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{
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return false;
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{
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if(bankLocked()) return false;
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// Remember what bank we're in
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myCurrentBank = bank;
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uInt16 offset = myCurrentBank << 12;
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uInt16 shift = mySystem->pageShift();
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// Although this scheme contains four 4K banks and one 2K bank, it's easier
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// to think of things in terms of 2K slices, as follows:
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//
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// The lower 2K of cart address space always points to the lower 2K of the
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// current ROM bank
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// The upper 2K of cart address space can point to either the 2K of RAM or
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// the upper 2K of the current ROM bank
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System::PageAccess access(0, 0, 0, this, System::PA_READ);
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// Lower 2K (always ROM)
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for(uInt32 address = 0x1000; address < 0x1800; address += (1 << shift))
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{
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access.directPeekBase = &myImage[offset + (address & 0x0FFF)];
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access.codeAccessBase = &myCodeAccessBase[offset + (address & 0x0FFF)];
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mySystem->setPageAccess(address >> shift, access);
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}
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// Upper 2K (RAM or ROM)
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for(uInt32 address = 0x1800; address < 0x2000; address += (1 << shift))
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{
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access.type = System::PA_READWRITE;
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if(myRamState & 0x10)
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{
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access.directPeekBase = &myImage[offset + (address & 0x0FFF)];
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access.codeAccessBase = &myCodeAccessBase[offset + (address & 0x0FFF)];
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}
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else
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{
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access.directPeekBase = &myRAM[address & 0x7FF];
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access.codeAccessBase = &myCodeAccessBase[offset + (address & 0x07FF)];
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}
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if((myRamState & 0x30) == 0x20)
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access.directPokeBase = &myRAM[address & 0x7FF];
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else
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access.directPokeBase = 0;
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mySystem->setPageAccess(address >> shift, access);
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}
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return myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeCM::bank() const
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{
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return 0;
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return myCurrentBank;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeCM::bankCount() const
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{
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// We report 4 banks (of ROM), even though RAM can overlap the upper 2K
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// of cart address space at some times
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// However, this RAM isn't enabled in the normal way that bankswitching
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// works, so it is ignored here
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return 4;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::patch(uInt16 address, uInt8 value)
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{
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return false;
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if((myRamState & 0x30) == 0x20)
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myRAM[address & 0x7FF] = value;
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else
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myImage[(myCurrentBank << 12) + address] = value;
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return myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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@ -93,11 +200,54 @@ const uInt8* CartridgeCM::getImage(int& size) const
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::save(Serializer& out) const
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{
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return false;
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try
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{
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out.putString(name());
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out.putInt(myCurrentBank);
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out.putByte(myRamState);
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out.putByte(myColumn);
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// The 2048 bytes of RAM
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out.putInt(2048);
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for(uInt32 i = 0; i < 2048; ++i)
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out.putByte((char)myRAM[i]);
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}
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catch(const char* msg)
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{
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cerr << "ERROR: CartridgeCM::save" << endl << " " << msg << endl;
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return false;
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}
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return true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeCM::load(Serializer& in)
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{
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return false;
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try
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{
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if(in.getString() != name())
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return false;
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myCurrentBank = (uInt16) in.getInt();
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myRamState = (uInt8) in.getByte();
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myColumn = (uInt8) in.getByte();
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// The 2048 bytes of RAM
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uInt32 limit = (uInt32) in.getInt();
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for(uInt32 i = 0; i < limit; ++i)
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myRAM[i] = (uInt8) in.getByte();
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}
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catch(const char* msg)
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{
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cerr << "ERROR: CartridgeCM::load" << endl << " " << msg << endl;
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return false;
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}
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// Remember what bank we were in
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myRamState = (uInt8) in.getByte();
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bank(myCurrentBank);
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return true;
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}
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@ -27,36 +27,76 @@ class System;
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/**
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Cartridge class used for SpectraVideo CompuMate bankswitched games.
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There are 4 4K banks selectable at $1000 - $1FFFF.
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This is more than just a cartridge mapper - it's also a "computer" add-on.
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There's two 8K EPROMs soldered on top of each other. There's two short
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wires with DB-9's on them which you plug into the two controller ports.
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A 42 or so key membrane keyboard with audio in and audio out, and 2K of RAM.
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There are 4 4K banks selectable at $1000 - $1FFF, and 2K RAM at
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$1800 - $1FFF (R/W 'line' is available at SWCHA D5, so there's no separate
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read and write ports).
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Bankswitching is done though the controller ports
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INPT0: D7 = CTRL key input (0 on startup / 1 = key pressed)
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INPT1: D7 = always HIGH input (tested at startup)
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INPT2: D7 = always HIGH input (tested at startup)
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INPT3: D7 = SHIFT key input (0 on startup / 1 = key pressed)
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INPT4: D7 = keyboard row 1 input (0 = key pressed)
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INPT5: D7 = keyboard row 3 input (0 = key pressed)
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SWCHA: D7 = tape recorder I/O ?
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D6 = 1 -> increase key collumn (0 to 9)
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D5 = 1 -> reset key collumn to 0 (if D4 = 0)
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D5 = 0 -> enable RAM writing (if D4 = 1)
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D4 = 1 -> map 2K of RAM at $1800 - $1fff
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D3 = keyboard row 4 input (0 = key pressed)
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D2 = keyboard row 2 input (0 = key pressed)
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SWCHA: D7 = Audio input from tape player
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D6 = Audio out to tape player and 4017 CLK
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1 -> increase key column (0 to 9)
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D5 = 4017 RST, and RAM direction. (high = write, low = read)
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1 -> reset key column to 0 (if D4 = 0)
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0 -> enable RAM writing (if D4 = 1)
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D4 = RAM enable: 1 = disable RAM, 0 = enable RAM
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D3 = keyboard row 1 input (0 = key pressed)
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D2 = keyboard row 1 input (0 = key pressed)
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D1 = bank select high bit
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D0 = bank select low bit
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Keyboard column numbering:
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column 0 = 7 U J M
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column 1 = 6 Y H N
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column 2 = 8 I K ,
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column 3 = 2 W S X
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column 4 = 3 E D C
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column 5 = 0 P ENTER SPACE
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column 6 = 9 O L .
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column 7 = 5 T G B
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column 8 = 1 Q A Z
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column 9 = 4 R F V
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INPT0: D7 = CTRL key input (0 on startup / 1 = key pressed)
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INPT1: D7 = always HIGH input (pulled high thru 20K resistor)
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INPT2: D7 = always HIGH input (pulled high thru 20K resistor)
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INPT3: D7 = SHIFT key input (0 on startup / 1 = key pressed)
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INPT4: D7 = keyboard row 0 input (0 = key pressed)
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INPT5: D7 = keyboard row 2 input (0 = key pressed)
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The keyboard's composed of a 4017 1 of 10 counter, driving the 10 columns of
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the keyboard. It has 4 rows. The 4 row outputs are buffered by inverters.
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Bit 5 of portA controls the reset line on the 4017. Pulling it high will reset
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scanning to column 0. Pulling it low will allow the counter to be clocked.
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Bit 6 of portA clocks the 4017. Each rising edge advances the column one
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count.
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There's 10 columns labelled 0-9, and 4 rows, labelled 0-3.
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Column
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0 1 2 3 4 5 6 7 8 9
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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| 7 | | 6 | | 8 | | 2 | | 3 | | 0 | | 9 | | 5 | | 1 | | 4 | 0
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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| U | | Y | | I | | W | | E | | P | | O | | T | | Q | | R | 1
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ Row
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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| J | | H | | K | | S | | D | |ent| | L | | G | | A | | F | 2
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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| M | | N | | < | | X | | C | |spc| | > | | B | | Z | | V | 3
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+---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+ +---+
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Function and Shift are separate keys that are read by 2 of the paddle inputs.
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These two buttons pull the specific paddle input low when pressed.
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Because the inputs are inverted, a low indicates a pressed button, and a high
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is an unpressed one.
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The audio input/output are designed to drive a tape player. The audio output is
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buffered through an inverter and 2 resistors and a capacitor to reduce the level
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to feed it into the tape player.
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The audio input is passed through a .1uf capacitor and is pulled to 1/2 supply
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by two 20K resistors, then it goes through a hex inverting schmitt trigger to
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square it up. This then runs into bit 7 of portA.
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@author Stephen Anthony & z26 team
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@version $Id$
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@ -172,6 +212,15 @@ class CartridgeCM : public Cartridge
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// The 16K ROM image of the cartridge
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uInt8 myImage[16384];
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// The 2K of RAM
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uInt8 myRAM[2048];
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// RAM read/write state
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uInt8 myRamState;
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// Column currently active
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uInt8 myColumn;
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};
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#endif
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