mirror of https://github.com/snes9xgit/snes9x.git
APU: Seemingly obvious optimization.
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@ -49,14 +49,33 @@ void SMP::op_write(uint16 addr, uint8 data) {
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apuram[addr] = data; //all writes go to RAM, even MMIO writes
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apuram[addr] = data; //all writes go to RAM, even MMIO writes
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}
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}
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uint8 SMP::op_readpc() {
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#if defined(CYCLE_ACCURATE)
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tick();
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#endif
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if (regs.pc >= 0xffc0 && status.iplrom_enable) return iplrom[regs.pc++ & 0x3f];
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return apuram[regs.pc++];
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}
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uint8 SMP::op_readstack() {
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#if defined(CYCLE_ACCURATE)
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tick();
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#endif
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return apuram[0x0100 | ++regs.sp];
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}
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void SMP::op_writestack(uint8 data) {
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#if defined(CYCLE_ACCURATE)
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tick();
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#endif
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apuram[0x0100 | regs.sp--] = data;
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}
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void SMP::op_step() {
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void SMP::op_step() {
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#define op_readpc() op_read(regs.pc++)
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#define op_readdp(addr) op_read((regs.p.p << 8) + ((addr) & 0xff))
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#define op_readdp(addr) op_read((regs.p.p << 8) + ((addr) & 0xff))
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#define op_writedp(addr, data) op_write((regs.p.p << 8) + ((addr) & 0xff), data)
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#define op_writedp(addr, data) op_write((regs.p.p << 8) + ((addr) & 0xff), data)
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#define op_readaddr(addr) op_read(addr)
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#define op_readaddr(addr) op_read(addr)
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#define op_writeaddr(addr, data) op_write(addr, data)
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#define op_writeaddr(addr, data) op_write(addr, data)
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#define op_readstack() op_read(0x0100 | ++regs.sp)
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#define op_writestack(data) op_write(0x0100 | regs.sp--, data)
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#if defined(CYCLE_ACCURATE)
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#if defined(CYCLE_ACCURATE)
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#if defined(PSEUDO_CYCLE)
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#if defined(PSEUDO_CYCLE)
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@ -102,6 +102,9 @@ public:
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debugvirtual alwaysinline uint8 op_read(uint16 addr);
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debugvirtual alwaysinline uint8 op_read(uint16 addr);
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debugvirtual alwaysinline void op_write(uint16 addr, uint8 data);
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debugvirtual alwaysinline void op_write(uint16 addr, uint8 data);
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debugvirtual alwaysinline void op_step();
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debugvirtual alwaysinline void op_step();
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alwaysinline uint8 op_readpc();
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alwaysinline uint8 op_readstack();
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alwaysinline void op_writestack(uint8 data);
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static const unsigned cycle_count_table[256];
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static const unsigned cycle_count_table[256];
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uint64 cycle_table_cpu[256];
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uint64 cycle_table_cpu[256];
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unsigned cycle_table_dsp[256];
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unsigned cycle_table_dsp[256];
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