diff --git a/apu/bapu/smp/core.cpp b/apu/bapu/smp/core.cpp
index 3ad4e140..b1b68694 100644
--- a/apu/bapu/smp/core.cpp
+++ b/apu/bapu/smp/core.cpp
@@ -49,14 +49,33 @@ void SMP::op_write(uint16 addr, uint8 data) {
   apuram[addr] = data;  //all writes go to RAM, even MMIO writes
 }
 
+uint8 SMP::op_readpc() {
+  #if defined(CYCLE_ACCURATE)
+  tick();
+  #endif
+  if (regs.pc >= 0xffc0 && status.iplrom_enable) return iplrom[regs.pc++ & 0x3f];
+  return apuram[regs.pc++];
+}
+
+uint8 SMP::op_readstack() {
+  #if defined(CYCLE_ACCURATE)
+  tick();
+  #endif
+  return apuram[0x0100 | ++regs.sp];
+}
+
+void SMP::op_writestack(uint8 data) {
+  #if defined(CYCLE_ACCURATE)
+  tick();
+  #endif
+  apuram[0x0100 | regs.sp--] = data;
+}
+
 void SMP::op_step() {
-  #define op_readpc() op_read(regs.pc++)
   #define op_readdp(addr) op_read((regs.p.p << 8) + ((addr) & 0xff))
   #define op_writedp(addr, data) op_write((regs.p.p << 8) + ((addr) & 0xff), data)
   #define op_readaddr(addr) op_read(addr)
   #define op_writeaddr(addr, data) op_write(addr, data)
-  #define op_readstack() op_read(0x0100 | ++regs.sp)
-  #define op_writestack(data) op_write(0x0100 | regs.sp--, data)
 
   #if defined(CYCLE_ACCURATE)
   #if defined(PSEUDO_CYCLE)
diff --git a/apu/bapu/smp/smp.hpp b/apu/bapu/smp/smp.hpp
index e8c77a9a..9a42aef8 100644
--- a/apu/bapu/smp/smp.hpp
+++ b/apu/bapu/smp/smp.hpp
@@ -102,6 +102,9 @@ public:
   debugvirtual alwaysinline uint8 op_read(uint16 addr);
   debugvirtual alwaysinline void op_write(uint16 addr, uint8 data);
   debugvirtual alwaysinline void op_step();
+  alwaysinline uint8 op_readpc();
+  alwaysinline uint8 op_readstack();
+  alwaysinline void op_writestack(uint8 data);
   static const unsigned cycle_count_table[256];
   uint64 cycle_table_cpu[256];
   unsigned cycle_table_dsp[256];