mirror of https://github.com/snes9xgit/snes9x.git
Merge pull request #712 from Yoshimaster96/master
Add proper support for SuperFX 8MB ROM emulation
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commit
82d2ceb183
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@ -196,7 +196,7 @@ static void FxReset (struct FxInfo_s *psFxInfo)
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else
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{
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b %= GSU.nRomBanks * 2;
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GSU.apvRomBank[i] = &GSU.pvRom[(b << 16) + 0x200000];
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GSU.apvRomBank[i] = &GSU.pvRom[(b << 16) + 0x800000];
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}
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}
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60
memmap.cpp
60
memmap.cpp
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@ -1375,6 +1375,10 @@ bool8 CMemory::LoadROMInt (int32 ROMfillSize)
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CalculatedSize = ((ROMfillSize + 0x1fff) / 0x2000) * 0x2000;
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if (CalculatedSize > 0x400000 &&
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1320 && // exclude SuperFX
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1420 &&
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1520 &&
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1A20 &&
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x3423 && // exclude SA-1
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x3523 &&
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(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x4332 && // exclude S-DD1
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@ -2858,24 +2862,58 @@ void CMemory::Map_SuperFXLoROMMap (void)
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printf("Map_SuperFXLoROMMap\n");
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map_System();
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// Replicate the first 2Mb of the ROM at ROM + 2MB such that each 32K
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// Replicate the first 2Mb of the ROM at ROM + 8MB such that each 32K
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// block is repeated twice in each 64K block.
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for (int c = 0; c < 64; c++)
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{
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memmove(&ROM[0x200000 + c * 0x10000], &ROM[c * 0x8000], 0x8000);
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memmove(&ROM[0x208000 + c * 0x10000], &ROM[c * 0x8000], 0x8000);
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memmove(&ROM[0x800000 + c * 0x10000], &ROM[c * 0x8000], 0x8000);
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memmove(&ROM[0x808000 + c * 0x10000], &ROM[c * 0x8000], 0x8000);
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}
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map_lorom(0x00, 0x3f, 0x8000, 0xffff, CalculatedSize);
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map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize);
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// Check GSU revision (not 100% accurate but it works)
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// GSU2
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if (CalculatedSize > 0x400000)
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{
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map_lorom(0x00, 0x3f, 0x8000, 0xffff, 0x200000);
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map_lorom_offset(0x80, 0xbf, 0x8000, 0xffff, 0x200000, 0x200000);
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map_hirom_offset(0x40, 0x7f, 0x0000, 0xffff, CalculatedSize, 0);
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map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize, 0);
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map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, 0x200000, 0);
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map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize - 0x400000, 0x400000);
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map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
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map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
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}
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else if (CalculatedSize > 0x200000)
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{
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map_lorom(0x00, 0x3f, 0x8000, 0xffff, 0x200000);
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map_lorom_offset(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize - 0x200000, 0x200000);
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map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, 0x200000, 0);
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map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize - 0x200000, 0x200000);
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map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
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}
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// GSU1
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else
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{
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map_lorom(0x00, 0x3f, 0x8000, 0xffff, CalculatedSize);
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map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize);
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map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, CalculatedSize, 0);
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map_hirom_offset(0xc0, 0xdf, 0x0000, 0xffff, CalculatedSize, 0);
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map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
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map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
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map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
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map_space(0xf0, 0xf0, 0x0000, 0xffff, SRAM);
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map_space(0xf1, 0xf1, 0x0000, 0xffff, SRAM + 0x10000);
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}
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map_WRAM();
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