New SMP is tentatively "running" now.

apu/apu.cpp

@@ -538,7 +538,7 @@ uint8 S9xAPUReadPort (int port)
 void S9xAPUWritePort (int port, uint8 byte)
 {
 	S9xAPUExecute ();
-	SNES::smp.port_write (port & 3, byte);
+	SNES::cpu.port_write (port & 3, byte);
 }
 
 void S9xAPUSetReferenceTime (int32 cpucycles)
@@ -591,6 +591,7 @@ void S9xResetAPU (void)
 	spc::reference_time = 0;
 	spc::remainder = 0;
 
+	SNES::cpu.reset ();
 	SNES::cpu.frequency = Settings.PAL ? PAL_MASTER_CLOCK : NTSC_MASTER_CLOCK;
 	SNES::smp.power ();
 	SNES::dsp.power ();
@@ -603,6 +604,7 @@ void S9xSoftResetAPU (void)
 {
 	spc::reference_time = 0;
 	spc::remainder = 0;
+	SNES::cpu.reset ();
 	SNES::smp.reset ();
 	SNES::dsp.reset ();
 	SNES::dsp.spc_dsp.set_output ((SNES::SPC_DSP::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);

apu/bapu/smp/core.cpp

@@ -3,7 +3,11 @@ void SMP::tick() {
   timer1.tick();
   timer2.tick();
 
+#ifdef BSNES
   clock += cycle_step_cpu;
+#else
+  clock++;
+#endif
   dsp.clock -= 24;
   synchronize_dsp();
 }
@@ -71,7 +75,11 @@ void SMP::op_step() {
   timer1.tick(cycle_count_table[opcode]);
   timer2.tick(cycle_count_table[opcode]);
 
+#ifdef BSNES
   clock += cycle_table_cpu[opcode];
+#else
+  clock += cycle_count_table[opcode];
+#endif
   dsp.clock -= cycle_table_dsp[opcode];
   synchronize_dsp();
 

apu/bapu/smp/smp.cpp

@@ -20,11 +20,13 @@ namespace SNES {
 #include "timing.cpp"
 
 void SMP::synchronize_cpu() {
+#ifdef BSNES
   if(CPU::Threaded == true) {
   //if(clock >= 0 && scheduler.sync != Scheduler::SynchronizeMode::All) co_switch(cpu.thread);
   } else {
     while(clock >= 0) cpu.enter();
   }
+#endif
 }
 
 void SMP::synchronize_dsp() {

apu/bapu/snes/snes.hpp

@@ -1,6 +1,8 @@
 #ifndef __SNES_HPP
 #define __SNES_HPP
 
+#define CYCLE_ACCURATE
+
 #include "snes9x.h"
 
 #define alwaysinline inline
@@ -12,36 +14,43 @@ namespace SNES
 struct Processor
 {
     unsigned frequency;
-    int64 clock;
+    int clock;
 };
 
+#include "smp/smp.hpp"
+#include "dsp/dsp.hpp"
+
 class CPU
 {
 public:
     enum { Threaded = false };
     int frequency;
+    uint8 registers[4];
 
-    void enter ()
+    inline void enter ()
     {
         return;
     }
 
-    void port_write (uint8 port, uint8 data)
+    inline void reset ()
     {
-
+        registers[0] = registers[1] = registers[2] = registers[3] = 0;
     }
 
-    uint8 port_read (uint8 port)
+    inline void port_write (uint8 port, uint8 data)
     {
-        return 0;
+        registers[port & 3] = data;
+    }
+
+    inline uint8 port_read (uint8 port)
+    {
+       // printf ("APU Read %2x from port %d\n", registers[port & 3], port & 3);
+        return registers[port & 3];
     }
 };
 
 extern CPU cpu;
 
-#include "smp/smp.hpp"
-#include "dsp/dsp.hpp"
-
 } /* namespace SNES */
 
 #endif