byuu APU now being used. Nothing works yet.

Sync is broken, but the new SMP will handle ratios now.
Save states need to be redone without serializer.
No SPC dumping.
This commit is contained in:
Brandon Wright 2011-06-18 05:31:44 -05:00
parent c9c49095ee
commit 10a521e39c
23 changed files with 46 additions and 5819 deletions

View File

@ -1,564 +0,0 @@
// Core SPC emulation: CPU, timers, SMP registers, memory
// snes_spc 0.9.0. http://www.slack.net/~ant/
#include "SNES_SPC.h"
#include <string.h>
/* Copyright (C) 2004-2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include "blargg_source.h"
#define RAM (m.ram.ram)
#define REGS (m.smp_regs [0])
#define REGS_IN (m.smp_regs [1])
// (n ? n : 256)
#define IF_0_THEN_256( n ) ((uint8_t) ((n) - 1) + 1)
// Note: SPC_MORE_ACCURACY exists mainly so I can run my validation tests, which
// do crazy echo buffer accesses.
#ifndef SPC_MORE_ACCURACY
#define SPC_MORE_ACCURACY 0
#endif
#ifdef BLARGG_ENABLE_OPTIMIZER
#include BLARGG_ENABLE_OPTIMIZER
#endif
//// Timers
#if SPC_DISABLE_TEMPO
#define TIMER_DIV( t, n ) ((n) >> t->prescaler)
#define TIMER_MUL( t, n ) ((n) << t->prescaler)
#else
#define TIMER_DIV( t, n ) ((n) / t->prescaler)
#define TIMER_MUL( t, n ) ((n) * t->prescaler)
#endif
SNES_SPC::Timer* SNES_SPC::run_timer_( Timer* t, rel_time_t time )
{
int elapsed = TIMER_DIV( t, time - t->next_time ) + 1;
t->next_time += TIMER_MUL( t, elapsed );
if ( t->enabled )
{
int remain = IF_0_THEN_256( t->period - t->divider );
int divider = t->divider + elapsed;
int over = elapsed - remain;
if ( over >= 0 )
{
int n = over / t->period;
t->counter = (t->counter + 1 + n) & 0x0F;
divider = over - n * t->period;
}
t->divider = (uint8_t) divider;
}
return t;
}
inline SNES_SPC::Timer* SNES_SPC::run_timer( Timer* t, rel_time_t time )
{
if ( time >= t->next_time )
t = run_timer_( t, time );
return t;
}
//// ROM
void SNES_SPC::enable_rom( int enable )
{
if ( m.rom_enabled != enable )
{
m.rom_enabled = dsp.rom_enabled = enable;
if ( enable )
memcpy( m.hi_ram, &RAM [rom_addr], sizeof m.hi_ram );
memcpy( &RAM [rom_addr], (enable ? m.rom : m.hi_ram), rom_size );
// TODO: ROM can still get overwritten when DSP writes to echo buffer
}
}
//// DSP
#if SPC_LESS_ACCURATE
int const max_reg_time = 29;
signed char const SNES_SPC::reg_times_ [256] =
{
-1, 0,-11,-10,-15,-11, -2, -2, 4, 3, 14, 14, 26, 26, 14, 22,
2, 3, 0, 1,-12, 0, 1, 1, 7, 6, 14, 14, 27, 14, 14, 23,
5, 6, 3, 4, -1, 3, 4, 4, 10, 9, 14, 14, 26, -5, 14, 23,
8, 9, 6, 7, 2, 6, 7, 7, 13, 12, 14, 14, 27, -4, 14, 24,
11, 12, 9, 10, 5, 9, 10, 10, 16, 15, 14, 14, -2, -4, 14, 24,
14, 15, 12, 13, 8, 12, 13, 13, 19, 18, 14, 14, -2,-36, 14, 24,
17, 18, 15, 16, 11, 15, 16, 16, 22, 21, 14, 14, 28, -3, 14, 25,
20, 21, 18, 19, 14, 18, 19, 19, 25, 24, 14, 14, 14, 29, 14, 25,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
};
#define RUN_DSP( time, offset ) \
int count = (time) - (offset) - m.dsp_time;\
if ( count >= 0 )\
{\
int clock_count = (count & ~(clocks_per_sample - 1)) + clocks_per_sample;\
m.dsp_time += clock_count;\
dsp.run( clock_count );\
}
#else
#define RUN_DSP( time, offset ) \
{\
int count = (time) - m.dsp_time;\
if ( !SPC_MORE_ACCURACY || count )\
{\
assert( count > 0 );\
m.dsp_time = (time);\
dsp.run( count );\
}\
}
#endif
int SNES_SPC::dsp_read( rel_time_t time )
{
RUN_DSP( time, reg_times [REGS [r_dspaddr] & 0x7F] );
int result = dsp.read( REGS [r_dspaddr] & 0x7F );
#ifdef SPC_DSP_READ_HOOK
SPC_DSP_READ_HOOK( spc_time + time, (REGS [r_dspaddr] & 0x7F), result );
#endif
return result;
}
inline void SNES_SPC::dsp_write( int data, rel_time_t time )
{
RUN_DSP( time, reg_times [REGS [r_dspaddr]] )
#if SPC_LESS_ACCURATE
else if ( m.dsp_time == skipping_time )
{
int r = REGS [r_dspaddr];
if ( r == SPC_DSP::r_kon )
m.skipped_kon |= data & ~dsp.read( SPC_DSP::r_koff );
if ( r == SPC_DSP::r_koff )
{
m.skipped_koff |= data;
m.skipped_kon &= ~data;
}
}
#endif
#ifdef SPC_DSP_WRITE_HOOK
SPC_DSP_WRITE_HOOK( m.spc_time + time, REGS [r_dspaddr], (uint8_t) data );
#endif
if ( REGS [r_dspaddr] <= 0x7F )
dsp.write( REGS [r_dspaddr], data );
else if ( !SPC_MORE_ACCURACY )
dprintf( "SPC wrote to DSP register > $7F\n" );
}
//// Memory access extras
#if SPC_MORE_ACCURACY
#define MEM_ACCESS( time, addr ) \
{\
if ( time >= m.dsp_time )\
{\
RUN_DSP( time, max_reg_time );\
}\
}
#elif !defined (NDEBUG)
// Debug-only check for read/write within echo buffer, since this might result in
// inaccurate emulation due to the DSP not being caught up to the present.
bool SNES_SPC::check_echo_access( int addr )
{
if ( !(dsp.read( SPC_DSP::r_flg ) & 0x20) )
{
int start = 0x100 * dsp.read( SPC_DSP::r_esa );
int size = 0x800 * (dsp.read( SPC_DSP::r_edl ) & 0x0F);
int end = start + (size ? size : 4);
if ( start <= addr && addr < end )
{
if ( !m.echo_accessed )
{
m.echo_accessed = 1;
return true;
}
}
}
return false;
}
#define MEM_ACCESS( time, addr ) check( !check_echo_access( (uint16_t) addr ) );
#else
#define MEM_ACCESS( time, addr )
#endif
//// CPU write
#if SPC_MORE_ACCURACY
static unsigned char const glitch_probs [3] [256] =
{
0xC3,0x92,0x5B,0x1C,0xD1,0x92,0x5B,0x1C,0xDB,0x9C,0x72,0x18,0xCD,0x5C,0x38,0x0B,
0xE1,0x9C,0x74,0x17,0xCF,0x75,0x45,0x0C,0xCF,0x6E,0x4A,0x0D,0xA3,0x3A,0x1D,0x08,
0xDB,0xA0,0x82,0x19,0xD9,0x73,0x3C,0x0E,0xCB,0x76,0x52,0x0B,0xA5,0x46,0x1D,0x09,
0xDA,0x74,0x55,0x0F,0xA2,0x3F,0x21,0x05,0x9A,0x40,0x20,0x07,0x63,0x1E,0x10,0x01,
0xDF,0xA9,0x85,0x1D,0xD3,0x84,0x4B,0x0E,0xCF,0x6F,0x49,0x0F,0xB3,0x48,0x1E,0x05,
0xD8,0x77,0x52,0x12,0xB7,0x49,0x23,0x06,0xAA,0x45,0x28,0x07,0x7D,0x28,0x0F,0x07,
0xCC,0x7B,0x4A,0x0E,0xB2,0x4F,0x24,0x07,0xAD,0x43,0x2C,0x06,0x86,0x29,0x11,0x07,
0xAE,0x48,0x1F,0x0A,0x76,0x21,0x19,0x05,0x76,0x21,0x14,0x05,0x44,0x11,0x0B,0x01,
0xE7,0xAD,0x96,0x23,0xDC,0x86,0x59,0x0E,0xDC,0x7C,0x5F,0x15,0xBB,0x53,0x2E,0x09,
0xD6,0x7C,0x4A,0x16,0xBB,0x4A,0x25,0x08,0xB3,0x4F,0x28,0x0B,0x8E,0x23,0x15,0x08,
0xCF,0x7F,0x57,0x11,0xB5,0x4A,0x23,0x0A,0xAA,0x42,0x28,0x05,0x7D,0x22,0x12,0x03,
0xA6,0x49,0x28,0x09,0x82,0x2B,0x0D,0x04,0x7A,0x20,0x0F,0x04,0x3D,0x0F,0x09,0x03,
0xD1,0x7C,0x4C,0x0F,0xAF,0x4E,0x21,0x09,0xA8,0x46,0x2A,0x07,0x85,0x1F,0x0E,0x07,
0xA6,0x3F,0x26,0x07,0x7C,0x24,0x14,0x07,0x78,0x22,0x16,0x04,0x46,0x12,0x0A,0x02,
0xA6,0x41,0x2C,0x0A,0x7E,0x28,0x11,0x05,0x73,0x1B,0x14,0x05,0x3D,0x11,0x0A,0x02,
0x70,0x22,0x17,0x05,0x48,0x13,0x08,0x03,0x3C,0x07,0x0D,0x07,0x26,0x07,0x06,0x01,
0xE0,0x9F,0xDA,0x7C,0x4F,0x18,0x28,0x0D,0xE9,0x9F,0xDA,0x7C,0x4F,0x18,0x1F,0x07,
0xE6,0x97,0xD8,0x72,0x64,0x13,0x26,0x09,0xDC,0x67,0xA9,0x38,0x21,0x07,0x15,0x06,
0xE9,0x91,0xD2,0x6B,0x63,0x14,0x2B,0x0E,0xD6,0x61,0xB7,0x41,0x2B,0x0E,0x10,0x09,
0xCF,0x59,0xB0,0x2F,0x35,0x08,0x0F,0x07,0xB6,0x30,0x7A,0x21,0x17,0x07,0x09,0x03,
0xE7,0xA3,0xE5,0x6B,0x65,0x1F,0x34,0x09,0xD8,0x6B,0xBE,0x45,0x27,0x07,0x10,0x07,
0xDA,0x54,0xB1,0x39,0x2E,0x0E,0x17,0x08,0xA9,0x3C,0x86,0x22,0x16,0x06,0x07,0x03,
0xD4,0x51,0xBC,0x3D,0x38,0x0A,0x13,0x06,0xB2,0x37,0x79,0x1C,0x17,0x05,0x0E,0x06,
0xA7,0x31,0x74,0x1C,0x11,0x06,0x0C,0x02,0x6D,0x1A,0x38,0x10,0x0B,0x05,0x06,0x03,
0xEB,0x9A,0xE1,0x7A,0x6F,0x13,0x34,0x0E,0xE6,0x75,0xC5,0x45,0x3E,0x0B,0x1A,0x05,
0xD8,0x63,0xC1,0x40,0x3C,0x1B,0x19,0x06,0xB3,0x42,0x83,0x29,0x18,0x0A,0x08,0x04,
0xD4,0x58,0xBA,0x43,0x3F,0x0A,0x1F,0x09,0xB1,0x33,0x8A,0x1F,0x1F,0x06,0x0D,0x05,
0xAF,0x3C,0x7A,0x1F,0x16,0x08,0x0A,0x01,0x72,0x1B,0x52,0x0D,0x0B,0x09,0x06,0x01,
0xCF,0x63,0xB7,0x47,0x40,0x10,0x14,0x06,0xC0,0x41,0x96,0x20,0x1C,0x09,0x10,0x05,
0xA6,0x35,0x82,0x1A,0x20,0x0C,0x0E,0x04,0x80,0x1F,0x53,0x0F,0x0B,0x02,0x06,0x01,
0xA6,0x31,0x81,0x1B,0x1D,0x01,0x08,0x08,0x7B,0x20,0x4D,0x19,0x0E,0x05,0x07,0x03,
0x6B,0x17,0x49,0x07,0x0E,0x03,0x0A,0x05,0x37,0x0B,0x1F,0x06,0x04,0x02,0x07,0x01,
0xF0,0xD6,0xED,0xAD,0xEC,0xB1,0xEB,0x79,0xAC,0x22,0x47,0x1E,0x6E,0x1B,0x32,0x0A,
0xF0,0xD6,0xEA,0xA4,0xED,0xC4,0xDE,0x82,0x98,0x1F,0x50,0x13,0x52,0x15,0x2A,0x0A,
0xF1,0xD1,0xEB,0xA2,0xEB,0xB7,0xD8,0x69,0xA2,0x1F,0x5B,0x18,0x55,0x18,0x2C,0x0A,
0xED,0xB5,0xDE,0x7E,0xE6,0x85,0xD3,0x59,0x59,0x0F,0x2C,0x09,0x24,0x07,0x15,0x09,
0xF1,0xD6,0xEA,0xA0,0xEC,0xBB,0xDA,0x77,0xA9,0x23,0x58,0x14,0x5D,0x12,0x2F,0x09,
0xF1,0xC1,0xE3,0x86,0xE4,0x87,0xD2,0x4E,0x68,0x15,0x26,0x0B,0x27,0x09,0x15,0x02,
0xEE,0xA6,0xE0,0x5C,0xE0,0x77,0xC3,0x41,0x67,0x1B,0x3C,0x07,0x2A,0x06,0x19,0x07,
0xE4,0x75,0xC6,0x43,0xCC,0x50,0x95,0x23,0x35,0x09,0x14,0x04,0x15,0x05,0x0B,0x04,
0xEE,0xD6,0xED,0xAD,0xEC,0xB1,0xEB,0x79,0xAC,0x22,0x56,0x14,0x5A,0x12,0x26,0x0A,
0xEE,0xBB,0xE7,0x7E,0xE9,0x8D,0xCB,0x49,0x67,0x11,0x34,0x07,0x2B,0x0B,0x14,0x07,
0xED,0xA7,0xE5,0x76,0xE3,0x7E,0xC4,0x4B,0x77,0x14,0x34,0x08,0x27,0x07,0x14,0x04,
0xE7,0x8B,0xD2,0x4C,0xCA,0x56,0x9E,0x31,0x36,0x0C,0x11,0x07,0x14,0x04,0x0A,0x02,
0xF0,0x9B,0xEA,0x6F,0xE5,0x81,0xC4,0x43,0x74,0x10,0x30,0x0B,0x2D,0x08,0x1B,0x06,
0xE6,0x83,0xCA,0x48,0xD9,0x56,0xA7,0x23,0x3B,0x09,0x12,0x09,0x15,0x07,0x0A,0x03,
0xE5,0x5F,0xCB,0x3C,0xCF,0x48,0x91,0x22,0x31,0x0A,0x17,0x08,0x15,0x04,0x0D,0x02,
0xD1,0x43,0x91,0x20,0xA9,0x2D,0x54,0x12,0x17,0x07,0x09,0x02,0x0C,0x04,0x05,0x03,
};
#endif
// divided into multiple functions to keep rarely-used functionality separate
// so often-used functionality can be optimized better by compiler
// If write isn't preceded by read, data has this added to it
int const no_read_before_write = 0x2000;
void SNES_SPC::cpu_write_smp_reg_( int data, rel_time_t time, int addr )
{
switch ( addr )
{
case r_t0target:
case r_t1target:
case r_t2target: {
Timer* t = &m.timers [addr - r_t0target];
int period = IF_0_THEN_256( data );
if ( t->period != period )
{
t = run_timer( t, time );
#if SPC_MORE_ACCURACY
// Insane behavior when target is written just after counter is
// clocked and counter matches new period and new period isn't 1, 2, 4, or 8
if ( t->divider == (period & 0xFF) &&
t->next_time == time + TIMER_MUL( t, 1 ) &&
((period - 1) | ~0x0F) & period )
{
//dprintf( "SPC pathological timer target write\n" );
// If the period is 3, 5, or 9, there's a probability this behavior won't occur,
// based on the previous period
int prob = 0xFF;
int old_period = t->period & 0xFF;
if ( period == 3 ) prob = glitch_probs [0] [old_period];
if ( period == 5 ) prob = glitch_probs [1] [old_period];
if ( period == 9 ) prob = glitch_probs [2] [old_period];
// The glitch suppresses incrementing of one of the counter bits, based on
// the lowest set bit in the new period
int b = 1;
while ( !(period & b) )
b <<= 1;
if ( (rand() >> 4 & 0xFF) <= prob )
t->divider = (t->divider - b) & 0xFF;
}
#endif
t->period = period;
}
break;
}
case r_t0out:
case r_t1out:
case r_t2out:
if ( !SPC_MORE_ACCURACY )
dprintf( "SPC wrote to counter %d\n", (int) addr - r_t0out );
if ( data < no_read_before_write / 2 )
run_timer( &m.timers [addr - r_t0out], time - 1 )->counter = 0;
break;
// Registers that act like RAM
case 0x8:
case 0x9:
REGS_IN [addr] = (uint8_t) data;
break;
case r_test:
if ( (uint8_t) data != 0x0A )
dprintf( "SPC wrote to test register\n" );
break;
case r_control:
// port clears
if ( data & 0x10 )
{
REGS_IN [r_cpuio0] = 0;
REGS_IN [r_cpuio1] = 0;
}
if ( data & 0x20 )
{
REGS_IN [r_cpuio2] = 0;
REGS_IN [r_cpuio3] = 0;
}
// timers
{
for ( int i = 0; i < timer_count; i++ )
{
Timer* t = &m.timers [i];
int enabled = data >> i & 1;
if ( t->enabled != enabled )
{
t = run_timer( t, time );
t->enabled = enabled;
if ( enabled )
{
t->divider = 0;
t->counter = 0;
}
}
}
}
enable_rom( data & 0x80 );
break;
}
}
void SNES_SPC::cpu_write_smp_reg( int data, rel_time_t time, int addr )
{
if ( addr == r_dspdata ) // 99%
dsp_write( data, time );
else
cpu_write_smp_reg_( data, time, addr );
}
void SNES_SPC::cpu_write_high( int data, int i, rel_time_t time )
{
if ( i < rom_size )
{
m.hi_ram [i] = (uint8_t) data;
if ( m.rom_enabled )
RAM [i + rom_addr] = m.rom [i]; // restore overwritten ROM
}
else
{
assert( *(&(RAM [0]) + i + rom_addr) == (uint8_t) data );
*(&(RAM [0]) + i + rom_addr) = cpu_pad_fill; // restore overwritten padding
cpu_write( data, i + rom_addr - 0x10000, time );
}
}
int const bits_in_int = CHAR_BIT * sizeof (int);
void SNES_SPC::cpu_write( int data, int addr, rel_time_t time )
{
MEM_ACCESS( time, addr )
// RAM
RAM [addr] = (uint8_t) data;
int reg = addr - 0xF0;
if ( reg >= 0 ) // 64%
{
// $F0-$FF
if ( reg < reg_count ) // 87%
{
REGS [reg] = (uint8_t) data;
// Ports
#ifdef SPC_PORT_WRITE_HOOK
if ( (unsigned) (reg - r_cpuio0) < port_count )
SPC_PORT_WRITE_HOOK( m.spc_time + time, (reg - r_cpuio0),
(uint8_t) data, &REGS [r_cpuio0] );
#endif
// Registers other than $F2 and $F4-$F7
//if ( reg != 2 && reg != 4 && reg != 5 && reg != 6 && reg != 7 )
// TODO: this is a bit on the fragile side
if ( ((~0x2F00 << (bits_in_int - 16)) << reg) < 0 ) // 36%
cpu_write_smp_reg( data, time, reg );
}
// High mem/address wrap-around
else
{
reg -= rom_addr - 0xF0;
if ( reg >= 0 ) // 1% in IPL ROM area or address wrapped around
cpu_write_high( data, reg, time );
}
}
}
//// CPU read
inline int SNES_SPC::cpu_read_smp_reg( int reg, rel_time_t time )
{
int result = REGS_IN [reg];
reg -= r_dspaddr;
// DSP addr and data
if ( (unsigned) reg <= 1 ) // 4% 0xF2 and 0xF3
{
result = REGS [r_dspaddr];
if ( (unsigned) reg == 1 )
result = dsp_read( time ); // 0xF3
}
return result;
}
int SNES_SPC::cpu_read( int addr, rel_time_t time )
{
MEM_ACCESS( time, addr )
// RAM
int result = RAM [addr];
int reg = addr - 0xF0;
if ( reg >= 0 ) // 40%
{
reg -= 0x10;
if ( (unsigned) reg >= 0xFF00 ) // 21%
{
reg += 0x10 - r_t0out;
// Timers
if ( (unsigned) reg < timer_count ) // 90%
{
Timer* t = &m.timers [reg];
if ( time >= t->next_time )
t = run_timer_( t, time );
result = t->counter;
t->counter = 0;
}
// Other registers
else if ( reg < 0 ) // 10%
{
result = cpu_read_smp_reg( reg + r_t0out, time );
}
else // 1%
{
assert( reg + (r_t0out + 0xF0 - 0x10000) < 0x100 );
result = cpu_read( reg + (r_t0out + 0xF0 - 0x10000), time );
}
}
}
return result;
}
//// Run
// Prefix and suffix for CPU emulator function
#define SPC_CPU_RUN_FUNC \
BOOST::uint8_t* SNES_SPC::run_until_( time_t end_time )\
{\
rel_time_t rel_time = m.spc_time - end_time;\
/*assert( rel_time <= 0 );*/\
m.spc_time = end_time;\
m.dsp_time += rel_time;\
m.timers [0].next_time += rel_time;\
m.timers [1].next_time += rel_time;\
m.timers [2].next_time += rel_time;
#define SPC_CPU_RUN_FUNC_END \
m.spc_time += rel_time;\
m.dsp_time -= rel_time;\
m.timers [0].next_time -= rel_time;\
m.timers [1].next_time -= rel_time;\
m.timers [2].next_time -= rel_time;\
/*assert( m.spc_time >= end_time );*/\
return &REGS [r_cpuio0];\
}
int const cpu_lag_max = 12 - 1; // DIV YA,X takes 12 clocks
void SNES_SPC::end_frame( time_t end_time )
{
// Catch CPU up to as close to end as possible. If final instruction
// would exceed end, does NOT execute it and leaves m.spc_time < end.
if ( end_time > m.spc_time )
run_until_( end_time );
m.spc_time -= end_time;
m.extra_clocks += end_time;
// Greatest number of clocks early that emulation can stop early due to
// not being able to execute current instruction without going over
// allowed time.
assert( -cpu_lag_max <= m.spc_time && m.spc_time <= cpu_lag_max );
// Catch timers up to CPU
for ( int i = 0; i < timer_count; i++ )
run_timer( &m.timers [i], 0 );
// Catch DSP up to CPU
if ( m.dsp_time < 0 )
{
RUN_DSP( 0, max_reg_time );
}
// Save any extra samples beyond what should be generated
if ( m.buf_begin )
save_extra();
}
// Inclusion here allows static memory access functions and better optimization
#include "SPC_CPU.h"

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// SNES SPC-700 APU emulator
// snes_spc 0.9.0
#ifndef SNES_SPC_H
#define SNES_SPC_H
#include "SPC_DSP.h"
#include "blargg_endian.h"
#ifdef DEBUGGER
#include "snes9x.h"
#include "display.h"
#include "debug.h"
#endif
struct SNES_SPC {
public:
typedef BOOST::uint8_t uint8_t;
// Must be called once before using
blargg_err_t init();
// Sample pairs generated per second
enum { sample_rate = 32000 };
// Emulator use
// Sets IPL ROM data. Library does not include ROM data. Most SPC music files
// don't need ROM, but a full emulator must provide this.
enum { rom_size = 0x40 };
void init_rom( uint8_t const rom [rom_size] );
// Sets destination for output samples
typedef short sample_t;
void set_output( sample_t* out, int out_size );
// Number of samples written to output since last set
int sample_count() const;
// Resets SPC to power-on state. This resets your output buffer, so you must
// call set_output() after this.
void reset();
// Emulates pressing reset switch on SNES. This resets your output buffer, so
// you must call set_output() after this.
void soft_reset();
// 1024000 SPC clocks per second, sample pair every 32 clocks
typedef int time_t;
enum { clock_rate = 1024000 };
enum { clocks_per_sample = 32 };
// Emulated port read/write at specified time
enum { port_count = 4 };
int read_port ( time_t, int port );
void write_port( time_t, int port, int data );
// Runs SPC to end_time and starts a new time frame at 0
void end_frame( time_t end_time );
// Sound control
// Mutes voices corresponding to non-zero bits in mask (issues repeated KOFF events).
// Reduces emulation accuracy.
enum { voice_count = 8 };
void mute_voices( int mask );
// If true, prevents channels and global volumes from being phase-negated.
// Only supported by fast DSP.
void disable_surround( bool disable = true );
// Sets tempo, where tempo_unit = normal, tempo_unit / 2 = half speed, etc.
enum { tempo_unit = 0x100 };
void set_tempo( int );
// SPC music files
// Loads SPC data into emulator
enum { spc_min_file_size = 0x10180 };
enum { spc_file_size = 0x10200 };
blargg_err_t load_spc( void const* in, long size );
// Clears echo region. Useful after loading an SPC as many have garbage in echo.
void clear_echo();
// Plays for count samples and write samples to out. Discards samples if out
// is NULL. Count must be a multiple of 2 since output is stereo.
blargg_err_t play( int count, sample_t* out );
// Skips count samples. Several times faster than play() when using fast DSP.
blargg_err_t skip( int count );
// State save/load (only available with accurate DSP)
#if !SPC_NO_COPY_STATE_FUNCS
// Saves/loads state
enum { state_size = 68 * 1024L }; // maximum space needed when saving
typedef SPC_DSP::copy_func_t copy_func_t;
void copy_state( unsigned char** io, copy_func_t );
// Writes minimal header to spc_out
static void init_header( void* spc_out );
// Saves emulator state as SPC file data. Writes spc_file_size bytes to spc_out.
// Does not set up SPC header; use init_header() for that.
void save_spc( void* spc_out );
// Returns true if new key-on events occurred since last check. Useful for
// trimming silence while saving an SPC.
bool check_kon();
#endif
//// Snes9x Accessor
void spc_allow_time_overflow( bool );
void dsp_set_spc_snapshot_callback( void (*callback) (void) );
void dsp_dump_spc_snapshot( void );
void dsp_set_stereo_switch( int );
uint8_t dsp_reg_value( int, int );
int dsp_envx_value( int );
//// Snes9x Debugger
#ifdef DEBUGGER
void debug_toggle_trace( void );
bool debug_is_enabled( void );
void debug_do_trace( int, int, int, uint8_t const *, uint8_t *, int, int, int, int );
void debug_op_print( char *, int, int, int, uint8_t const *, uint8_t *, int, int, int, int );
void debug_io_print( char * );
#endif
public:
BLARGG_DISABLE_NOTHROW
typedef BOOST::uint16_t uint16_t;
// Time relative to m_spc_time. Speeds up code a bit by eliminating need to
// constantly add m_spc_time to time from CPU. CPU uses time that ends at
// 0 to eliminate reloading end time every instruction. It pays off.
typedef int rel_time_t;
struct Timer
{
rel_time_t next_time; // time of next event
int prescaler;
int period;
int divider;
int enabled;
int counter;
};
enum { reg_count = 0x10 };
enum { timer_count = 3 };
enum { extra_size = SPC_DSP::extra_size };
enum { signature_size = 35 };
private:
SPC_DSP dsp;
#if SPC_LESS_ACCURATE
static signed char const reg_times_ [256];
signed char reg_times [256];
#endif
struct state_t
{
Timer timers [timer_count];
uint8_t smp_regs [2] [reg_count];
struct
{
int pc;
int a;
int x;
int y;
int psw;
int sp;
} cpu_regs;
rel_time_t dsp_time;
time_t spc_time;
bool echo_accessed;
int tempo;
int skipped_kon;
int skipped_koff;
const char* cpu_error;
int extra_clocks;
sample_t* buf_begin;
sample_t const* buf_end;
sample_t* extra_pos;
sample_t extra_buf [extra_size];
int rom_enabled;
uint8_t rom [rom_size];
uint8_t hi_ram [rom_size];
unsigned char cycle_table [256];
struct
{
// padding to neutralize address overflow
union {
uint8_t padding1 [0x100];
uint16_t align; // makes compiler align data for 16-bit access
} padding1 [1];
uint8_t ram [0x10000];
uint8_t padding2 [0x100];
} ram;
};
state_t m;
enum { rom_addr = 0xFFC0 };
enum { skipping_time = 127 };
// Value that padding should be filled with
enum { cpu_pad_fill = 0xFF };
enum {
r_test = 0x0, r_control = 0x1,
r_dspaddr = 0x2, r_dspdata = 0x3,
r_cpuio0 = 0x4, r_cpuio1 = 0x5,
r_cpuio2 = 0x6, r_cpuio3 = 0x7,
r_f8 = 0x8, r_f9 = 0x9,
r_t0target = 0xA, r_t1target = 0xB, r_t2target = 0xC,
r_t0out = 0xD, r_t1out = 0xE, r_t2out = 0xF
};
void timers_loaded();
void enable_rom( int enable );
void reset_buf();
void save_extra();
void load_regs( uint8_t const in [reg_count] );
void ram_loaded();
void regs_loaded();
void reset_time_regs();
void reset_common( int timer_counter_init );
Timer* run_timer_ ( Timer* t, rel_time_t );
Timer* run_timer ( Timer* t, rel_time_t );
int dsp_read ( rel_time_t );
void dsp_write ( int data, rel_time_t );
void cpu_write_smp_reg_( int data, rel_time_t, int addr );
void cpu_write_smp_reg ( int data, rel_time_t, int addr );
void cpu_write_high ( int data, int i, rel_time_t );
void cpu_write ( int data, int addr, rel_time_t );
int cpu_read_smp_reg ( int i, rel_time_t );
int cpu_read ( int addr, rel_time_t );
unsigned CPU_mem_bit ( uint8_t const* pc, rel_time_t );
bool check_echo_access ( int addr );
uint8_t* run_until_( time_t end_time );
struct spc_file_t
{
char signature [signature_size];
uint8_t has_id666;
uint8_t version;
uint8_t pcl, pch;
uint8_t a;
uint8_t x;
uint8_t y;
uint8_t psw;
uint8_t sp;
char text [212];
uint8_t ram [0x10000];
uint8_t dsp [128];
uint8_t unused [0x40];
uint8_t ipl_rom [0x40];
};
static char const signature [signature_size + 1];
void save_regs( uint8_t out [reg_count] );
// Snes9x timing hack
bool allow_time_overflow;
// Snes9x debugger
#ifdef DEBUGGER
FILE *apu_trace;
bool debug_trace;
#endif
};
#include <assert.h>
inline int SNES_SPC::sample_count() const { return (m.extra_clocks >> 5) * 2; }
inline int SNES_SPC::read_port( time_t t, int port )
{
assert( (unsigned) port < port_count );
return run_until_( t ) [port];
}
inline void SNES_SPC::write_port( time_t t, int port, int data )
{
assert( (unsigned) port < port_count );
run_until_( t ) [0x10 + port] = data;
m.ram.ram [0xF4 + port] = data;
}
inline void SNES_SPC::mute_voices( int mask ) { dsp.mute_voices( mask ); }
inline void SNES_SPC::disable_surround( bool disable ) { dsp.disable_surround( disable ); }
#if !SPC_NO_COPY_STATE_FUNCS
inline bool SNES_SPC::check_kon() { return dsp.check_kon(); }
#endif
inline void SNES_SPC::spc_allow_time_overflow( bool allow ) { allow_time_overflow = allow; }
#endif

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// SPC emulation support: init, sample buffering, reset, SPC loading
// snes_spc 0.9.0. http://www.slack.net/~ant/
#include "SNES_SPC.h"
#include <string.h>
/* Copyright (C) 2004-2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include "blargg_source.h"
#define RAM (m.ram.ram)
#define REGS (m.smp_regs [0])
#define REGS_IN (m.smp_regs [1])
// (n ? n : 256)
#define IF_0_THEN_256( n ) ((uint8_t) ((n) - 1) + 1)
//// Init
blargg_err_t SNES_SPC::init()
{
memset( &m, 0, sizeof m );
dsp.init( RAM );
m.tempo = tempo_unit;
// Most SPC music doesn't need ROM, and almost all the rest only rely
// on these two bytes
m.rom [0x3E] = 0xFF;
m.rom [0x3F] = 0xC0;
static unsigned char const cycle_table [128] =
{// 01 23 45 67 89 AB CD EF
0x28,0x47,0x34,0x36,0x26,0x54,0x54,0x68, // 0
0x48,0x47,0x45,0x56,0x55,0x65,0x22,0x46, // 1
0x28,0x47,0x34,0x36,0x26,0x54,0x54,0x74, // 2
0x48,0x47,0x45,0x56,0x55,0x65,0x22,0x38, // 3
0x28,0x47,0x34,0x36,0x26,0x44,0x54,0x66, // 4
0x48,0x47,0x45,0x56,0x55,0x45,0x22,0x43, // 5
0x28,0x47,0x34,0x36,0x26,0x44,0x54,0x75, // 6
0x48,0x47,0x45,0x56,0x55,0x55,0x22,0x36, // 7
0x28,0x47,0x34,0x36,0x26,0x54,0x52,0x45, // 8
0x48,0x47,0x45,0x56,0x55,0x55,0x22,0xC5, // 9
0x38,0x47,0x34,0x36,0x26,0x44,0x52,0x44, // A
0x48,0x47,0x45,0x56,0x55,0x55,0x22,0x34, // B
0x38,0x47,0x45,0x47,0x25,0x64,0x52,0x49, // C
0x48,0x47,0x56,0x67,0x45,0x55,0x22,0x83, // D
0x28,0x47,0x34,0x36,0x24,0x53,0x43,0x40, // E
0x48,0x47,0x45,0x56,0x34,0x54,0x22,0x60, // F
};
// unpack cycle table
for ( int i = 0; i < 128; i++ )
{
int n = cycle_table [i];
m.cycle_table [i * 2 + 0] = n >> 4;
m.cycle_table [i * 2 + 1] = n & 0x0F;
}
allow_time_overflow = false;
dsp.rom = m.rom;
dsp.hi_ram = m.hi_ram;
#ifdef DEBUGGER
apu_trace = NULL;
debug_trace = false;
#endif
#if SPC_LESS_ACCURATE
memcpy( reg_times, reg_times_, sizeof reg_times );
#endif
reset();
return 0;
}
void SNES_SPC::init_rom( uint8_t const in [rom_size] )
{
memcpy( m.rom, in, sizeof m.rom );
}
void SNES_SPC::set_tempo( int t )
{
m.tempo = t;
int const timer2_shift = 4; // 64 kHz
int const other_shift = 3; // 8 kHz
#if SPC_DISABLE_TEMPO
m.timers [2].prescaler = timer2_shift;
m.timers [1].prescaler = timer2_shift + other_shift;
m.timers [0].prescaler = timer2_shift + other_shift;
#else
if ( !t )
t = 1;
int const timer2_rate = 1 << timer2_shift;
int rate = (timer2_rate * tempo_unit + (t >> 1)) / t;
if ( rate < timer2_rate / 4 )
rate = timer2_rate / 4; // max 4x tempo
m.timers [2].prescaler = rate;
m.timers [1].prescaler = rate << other_shift;
m.timers [0].prescaler = rate << other_shift;
#endif
}
// Timer registers have been loaded. Applies these to the timers. Does not
// reset timer prescalers or dividers.
void SNES_SPC::timers_loaded()
{
int i;
for ( i = 0; i < timer_count; i++ )
{
Timer* t = &m.timers [i];
t->period = IF_0_THEN_256( REGS [r_t0target + i] );
t->enabled = REGS [r_control] >> i & 1;
t->counter = REGS_IN [r_t0out + i] & 0x0F;
}
set_tempo( m.tempo );
}
// Loads registers from unified 16-byte format
void SNES_SPC::load_regs( uint8_t const in [reg_count] )
{
memcpy( REGS, in, reg_count );
memcpy( REGS_IN, REGS, reg_count );
// These always read back as 0
REGS_IN [r_test ] = 0;
REGS_IN [r_control ] = 0;
REGS_IN [r_t0target] = 0;
REGS_IN [r_t1target] = 0;
REGS_IN [r_t2target] = 0;
}
// RAM was just loaded from SPC, with $F0-$FF containing SMP registers
// and timer counts. Copies these to proper registers.
void SNES_SPC::ram_loaded()
{
m.rom_enabled = dsp.rom_enabled = 0;
load_regs( &RAM [0xF0] );
// Put STOP instruction around memory to catch PC underflow/overflow
memset( m.ram.padding1, cpu_pad_fill, sizeof m.ram.padding1 );
memset( m.ram.padding2, cpu_pad_fill, sizeof m.ram.padding2 );
}
// Registers were just loaded. Applies these new values.
void SNES_SPC::regs_loaded()
{
enable_rom( REGS [r_control] & 0x80 );
timers_loaded();
}
void SNES_SPC::reset_time_regs()
{
m.cpu_error = 0;
m.echo_accessed = 0;
m.spc_time = 0;
m.dsp_time = 0;
#if SPC_LESS_ACCURATE
m.dsp_time = clocks_per_sample + 1;
#endif
for ( int i = 0; i < timer_count; i++ )
{
Timer* t = &m.timers [i];
t->next_time = 1;
t->divider = 0;
}
regs_loaded();
m.extra_clocks = 0;
reset_buf();
}
void SNES_SPC::reset_common( int timer_counter_init )
{
int i;
for ( i = 0; i < timer_count; i++ )
REGS_IN [r_t0out + i] = timer_counter_init;
// Run IPL ROM
memset( &m.cpu_regs, 0, sizeof m.cpu_regs );
m.cpu_regs.pc = rom_addr;
REGS [r_test ] = 0x0A;
REGS [r_control] = 0xB0; // ROM enabled, clear ports
for ( i = 0; i < port_count; i++ )
REGS_IN [r_cpuio0 + i] = 0;
reset_time_regs();
}
void SNES_SPC::soft_reset()
{
reset_common( 0 );
dsp.soft_reset();
}
void SNES_SPC::reset()
{
m.cpu_regs.pc = 0xFFC0;
m.cpu_regs.a = 0x00;
m.cpu_regs.x = 0x00;
m.cpu_regs.y = 0x00;
m.cpu_regs.psw = 0x02;
m.cpu_regs.sp = 0xEF;
memset( RAM, 0x00, 0x10000 );
ram_loaded();
reset_common( 0x0F );
dsp.reset();
}
char const SNES_SPC::signature [signature_size + 1] =
"SNES-SPC700 Sound File Data v0.30\x1A\x1A";
blargg_err_t SNES_SPC::load_spc( void const* data, long size )
{
spc_file_t const* const spc = (spc_file_t const*) data;
// be sure compiler didn't insert any padding into fle_t
assert( sizeof (spc_file_t) == spc_min_file_size + 0x80 );
// Check signature and file size
if ( size < signature_size || memcmp( spc, signature, 27 ) )
return "Not an SPC file";
if ( size < spc_min_file_size )
return "Corrupt SPC file";
// CPU registers
m.cpu_regs.pc = spc->pch * 0x100 + spc->pcl;
m.cpu_regs.a = spc->a;
m.cpu_regs.x = spc->x;
m.cpu_regs.y = spc->y;
m.cpu_regs.psw = spc->psw;
m.cpu_regs.sp = spc->sp;
// RAM and registers
memcpy( RAM, spc->ram, 0x10000 );
ram_loaded();
// DSP registers
dsp.load( spc->dsp );
reset_time_regs();
return 0;
}
void SNES_SPC::clear_echo()
{
if ( !(dsp.read( SPC_DSP::r_flg ) & 0x20) )
{
int addr = 0x100 * dsp.read( SPC_DSP::r_esa );
int end = addr + 0x800 * (dsp.read( SPC_DSP::r_edl ) & 0x0F);
if ( end > 0x10000 )
end = 0x10000;
memset( &RAM [addr], 0xFF, end - addr );
}
}
//// Sample output
void SNES_SPC::reset_buf()
{
// Start with half extra buffer of silence
sample_t* out = m.extra_buf;
while ( out < &m.extra_buf [extra_size / 2] )
*out++ = 0;
m.extra_pos = out;
m.buf_begin = 0;
dsp.set_output( 0, 0 );
}
void SNES_SPC::set_output( sample_t* out, int size )
{
require( (size & 1) == 0 ); // size must be even
m.extra_clocks &= clocks_per_sample - 1;
if ( out )
{
sample_t const* out_end = out + size;
m.buf_begin = out;
m.buf_end = out_end;
// Copy extra to output
sample_t const* in = m.extra_buf;
while ( in < m.extra_pos && out < out_end )
*out++ = *in++;
// Handle output being full already
if ( out >= out_end )
{
// Have DSP write to remaining extra space
out = dsp.extra();
out_end = &dsp.extra() [extra_size];
// Copy any remaining extra samples as if DSP wrote them
while ( in < m.extra_pos )
*out++ = *in++;
assert( out <= out_end );
}
dsp.set_output( out, out_end - out );
}
else
{
reset_buf();
}
}
void SNES_SPC::save_extra()
{
// Get end pointers
sample_t const* main_end = m.buf_end; // end of data written to buf
sample_t const* dsp_end = dsp.out_pos(); // end of data written to dsp.extra()
if ( m.buf_begin <= dsp_end && dsp_end <= main_end )
{
main_end = dsp_end;
dsp_end = dsp.extra(); // nothing in DSP's extra
}
// Copy any extra samples at these ends into extra_buf
sample_t* out = m.extra_buf;
sample_t const* in;
for ( in = m.buf_begin + sample_count(); in < main_end; in++ )
*out++ = *in;
for ( in = dsp.extra(); in < dsp_end ; in++ )
*out++ = *in;
m.extra_pos = out;
assert( out <= &m.extra_buf [extra_size] );
}
blargg_err_t SNES_SPC::play( int count, sample_t* out )
{
require( (count & 1) == 0 ); // must be even
if ( count )
{
set_output( out, count );
end_frame( count * (clocks_per_sample / 2) );
}
const char* err = m.cpu_error;
m.cpu_error = 0;
return err;
}
blargg_err_t SNES_SPC::skip( int count )
{
#if SPC_LESS_ACCURATE
if ( count > 2 * sample_rate * 2 )
{
set_output( 0, 0 );
// Skip a multiple of 4 samples
time_t end = count;
count = (count & 3) + 1 * sample_rate * 2;
end = (end - count) * (clocks_per_sample / 2);
m.skipped_kon = 0;
m.skipped_koff = 0;
// Preserve DSP and timer synchronization
// TODO: verify that this really preserves it
int old_dsp_time = m.dsp_time + m.spc_time;
m.dsp_time = end - m.spc_time + skipping_time;
end_frame( end );
m.dsp_time = m.dsp_time - skipping_time + old_dsp_time;
dsp.write( SPC_DSP::r_koff, m.skipped_koff & ~m.skipped_kon );
dsp.write( SPC_DSP::r_kon , m.skipped_kon );
clear_echo();
}
#endif
return play( count, 0 );
}
//// Snes9x Accessor
void SNES_SPC::dsp_set_spc_snapshot_callback( void (*callback) (void) )
{
dsp.set_spc_snapshot_callback( callback );
}
void SNES_SPC::dsp_dump_spc_snapshot( void )
{
dsp.dump_spc_snapshot();
}
void SNES_SPC::dsp_set_stereo_switch( int value )
{
dsp.set_stereo_switch( value );
}
SNES_SPC::uint8_t SNES_SPC::dsp_reg_value( int ch, int addr )
{
return dsp.reg_value( ch, addr );
}
int SNES_SPC::dsp_envx_value( int ch )
{
return dsp.envx_value( ch );
}
//// Snes9x debugger
#ifdef DEBUGGER
void SNES_SPC::debug_toggle_trace( void )
{
debug_trace = !debug_trace;
if (debug_trace)
{
printf("APU tracing enabled.\n");
ENSURE_TRACE_OPEN(apu_trace, "apu_trace.log", "wb")
}
else
{
printf("APU tracing disabled.\n");
fclose(apu_trace);
apu_trace = NULL;
}
}
bool SNES_SPC::debug_is_enabled( void ) { return debug_trace; }
void SNES_SPC::debug_do_trace( int a, int x, int y, uint8_t const *pc, uint8_t *sp, int psw, int c, int nz, int dp )
{
char msg[512];
ENSURE_TRACE_OPEN(apu_trace, "apu_trace.log", "a")
debug_op_print(msg, a, x, y, pc, sp, psw, c, nz, dp);
fprintf(apu_trace, "%s ", msg);
debug_io_print(msg);
fprintf(apu_trace, "%s ", msg);
S9xPrintHVPosition(msg);
fprintf(apu_trace, "%s\n", msg);
}
void SNES_SPC::debug_op_print( char *buffer, int a, int x, int y, uint8_t const *pc, uint8_t *sp, int psw, int c, int nz, int dp )
{
static char mnemonics[256][20] =
{
"NOP",
"TCALL 0",
"SET1 $%02X.0",
"BBS $%02X.0,$%04X",
"OR A,$%02X",
"OR A,!$%04X",
"OR A,(X)",
"OR A,[$%02X+X]",
"OR A,#$%02X",
"OR $%02X,$%02X",
"OR1 C,$%04X.%d",
"ASL $%02X",
"MOV !$%04X,Y",
"PUSH PSW",
"TSET1 !$%04X",
"BRK",
"BPL $%04X",
"TCALL 1",
"CLR1 $%02X.0",
"BBC $%02X.0,$%04X",
"OR A,$%02X+X",
"OR A,!$%04X+X",
"OR A,!$%04X+Y",
"OR A,[$%02X]+Y",
"OR $%02X,#$%02X",
"OR (X),(Y)",
"DECW $%02X",
"ASL $%02X+X",
"ASL A",
"DEC X",
"CMP X,!$%04X",
"JMP [!$%04X+X]",
"CLRP",
"TCALL 2",
"SET1 $%02X.1",
"BBS $%02X.1,$%04X",
"AND A,$%02X",
"AND A,!$%04X",
"AND A,(X)",
"AND A,[$%02X+X]",
"AND A,#$%02X",
"AND $%02X,$%02X",
"OR1 C,/$%04X.%d",
"ROL $%02X",
"ROL !$%04X",
"PUSH A",
"CBNE $%02X,$%04X",
"BRA $%04X",
"BMI $%04X",
"TCALL 3",
"CLR1 $%02X.1",
"BBC $%02X.1,$%04X",
"AND A,$%02X+X",
"AND A,!$%04X+X",
"AND A,!$%04X+Y",
"AND A,[$%02X]+Y",
"AND $%02X,#$%02X",
"AND (X),(Y)",
"INCW $%02X",
"ROL $%02X+X",
"ROL A",
"INC X",
"CMP X,$%02X",
"CALL !$%04X",
"SETP",
"TCALL 4",
"SET1 $%02X.2",
"BBS $%02X.2,$%04X",
"EOR A,$%02X",
"EOR A,!$%04X",
"EOR A,(X)",
"EOR A,[$%02X+X]",
"EOR A,#$%02X",
"EOR $%02X,$%02X",
"AND1 C,$%04X.%d",
"LSR $%02X",
"LSR !$%04X",
"PUSH X",
"TCLR1 !$%04X",
"PCALL $%02X",
"BVC $%04X",
"TCALL 5",
"CLR1 $%02X.2",
"BBC $%02X.2,$%04X",
"EOR A,$%02X+X",
"EOR A,!$%04X+X",
"EOR A,!$%04X+Y",
"EOR A,[$%02X]+Y",
"EOR $%02X,#$%02X",
"EOR (X),(Y)",
"CMPW YA,$%02X",
"LSR $%02X+X",
"LSR A",
"MOV X,A",
"CMP Y,!$%04X",
"JMP !$%04X",
"CLRC",
"TCALL 6",
"SET1 $%02X.3",
"BBS $%02X.3,$%04X",
"CMP A,$%02X",
"CMP A,!$%04X",
"CMP A,(X)",
"CMP A,[$%02X+X]",
"CMP A,#$%02X",
"CMP $%02X,$%02X",
"AND1 C,/$%04X.%d",
"ROR $%02X",
"ROR !$%04X",
"PUSH Y",
"DBNZ $%02X,$%04X",
"RET",
"BVS $%04X",
"TCALL 7",
"CLR1 $%02X.3",
"BBC $%02X.3,$%04X",
"CMP A,$%02X+X",
"CMP A,!$%04X+X",
"CMP A,!$%04X+Y",
"CMP A,[$%02X]+Y",
"CMP $%02X,#$%02X",
"CMP (X),(Y)",
"ADDW YA,$%02X",
"ROR $%02X+X",
"ROR A",
"MOV A,X",
"CMP Y,$%02X",
"RET1",
"SETC",
"TCALL 8",
"SET1 $%02X.4",
"BBS $%02X.4,$%04X",
"ADC A,$%02X",
"ADC A,!$%04X",
"ADC A,(X)",
"ADC A,[$%02X+X]",
"ADC A,#$%02X",
"ADC $%02X,$%02X",
"EOR1 C,$%04X.%d",
"DEC $%02X",
"DEC !$%04X",
"MOV Y,#$%02X",
"POP PSW",
"MOV $%02X,#$%02X",
"BCC $%04X",
"TCALL 9",
"CLR1 $%02X.4",
"BBC $%02X.4,$%04X",
"ADC A,$%02X+X",
"ADC A,!$%04X+X",
"ADC A,!$%04X+Y",
"ADC A,[$%02X]+Y",
"ADC $%02X,#$%02X",
"ADC (X),(Y)",
"SUBW YA,$%02X",
"DEC $%02X+X",
"DEC A",
"MOV X,SP",
"DIV YA,X",
"XCN A",
"EI",
"TCALL 10",
"SET1 $%02X.5",
"BBS $%02X.5,$%04X",
"SBC A,$%02X",
"SBC A,!$%04X",
"SBC A,(X)",
"SBC A,[$%02X+X]",
"SBC A,#$%02X",
"SBC $%02X,$%02X",
"MOV1 C,$%04X.%d",
"INC $%02X",
"INC !$%04X",
"CMP Y,#$%02X",
"POP A",
"MOV (X)+,A",
"BCS $%04X",
"TCALL 11",
"CLR1 $%02X.5",
"BBC $%02X.5,$%04X",
"SBC A,$%02X+X",
"SBC A,!$%04X+X",
"SBC A,!$%04X+Y",
"SBC A,[$%02X]+Y",
"SBC $%02X,#$%02X",
"SBC (X),(Y)",
"MOVW YA,$%02X",
"INC $%02X+X",
"INC A",
"MOV SP,X",
"DAS A",
"MOV A,(X)+",
"DI",
"TCALL 12",
"SET1 $%02X.6",
"BBS $%02X.6,$%04X",
"MOV $%02X,A",
"MOV !$%04X,A",
"MOV (X),A",
"MOV [$%02X+X],A",
"CMP X,#$%02X",
"MOV !$%04X,X",
"MOV1 $%04X.%d,C",
"MOV $%02X,Y",
"ASL !$%04X",
"MOV X,#$%02X",
"POP X",
"MUL YA",
"BNE $%04X",
"TCALL 13",
"CLR1 $%02X.6",
"BBC $%02X.6,$%04X",
"MOV $%02X+X,A",
"MOV !$%04X+X,A",
"MOV !$%04X+Y,A",
"MOV [$%02X]+Y,A",
"MOV $%02X,X",
"MOV $%02X+Y,X",
"MOVW $%02X,YA",
"MOV $%02X+X,Y",
"DEC Y",
"MOV A,Y",
"CBNE $%02X+X,$%04X",
"DAA A",
"CLRV",
"TCALL 14",
"SET1 $%02X.7",
"BBS $%02X.7,$%04X",
"MOV A,$%02X",
"MOV A,!$%04X",
"MOV A,(X)",
"MOV A,[$%02X+X]",
"MOV A,#$%02X",
"MOV X,!$%04X",
"NOT1 $%04X.%d",
"MOV Y,$%02X",
"MOV Y,!$%04X",
"NOTC",
"POP Y",
"SLEEP",
"BEQ $%04X",
"TCALL 15",
"CLR1 $%02X.7",
"BBC $%02X.7,$%04X",
"MOV A,$%02X+X",
"MOV A,!$%04X+X",
"MOV A,!$%04X+Y",
"MOV A,[$%02X]+Y",
"MOV X,$%02X",
"MOV X,$%02X+Y",
"MOV $%02X,$%02X",
"MOV Y,$%02X+X",
"INC Y",
"MOV Y,A",
"DBNZ Y,$%04X",
"STOP"
};
static int modes[256] =
{
2, 2, 0, 5, 0, 1, 2, 0, 0, 3, 6, 0, 1, 2, 1, 2,
7, 2, 0, 5, 0, 1, 1, 0, 4, 2, 0, 0, 2, 2, 1, 1,
2, 2, 0, 5, 0, 1, 2, 0, 0, 3, 6, 0, 1, 2, 5, 7,
7, 2, 0, 5, 0, 1, 1, 0, 4, 2, 0, 0, 2, 2, 0, 1,
2, 2, 0, 5, 0, 1, 2, 0, 0, 3, 6, 0, 1, 2, 1, 0,
7, 2, 0, 5, 0, 1, 1, 0, 4, 2, 0, 0, 2, 2, 1, 1,
2, 2, 0, 5, 0, 1, 2, 0, 0, 3, 6, 0, 1, 2, 5, 2,
7, 2, 0, 5, 0, 1, 1, 0, 4, 2, 0, 0, 2, 2, 0, 2,
2, 2, 0, 5, 0, 1, 2, 0, 0, 3, 6, 0, 1, 0, 2, 4,
7, 2, 0, 5, 0, 1, 1, 0, 4, 2, 0, 0, 2, 2, 2, 2,
2, 2, 0, 5, 0, 1, 2, 0, 0, 3, 6, 0, 1, 0, 2, 2,
7, 2, 0, 5, 0, 1, 1, 0, 4, 2, 0, 0, 2, 2, 2, 2,
2, 2, 0, 5, 0, 1, 2, 0, 0, 1, 6, 0, 1, 0, 2, 2,
7, 2, 0, 5, 0, 1, 1, 0, 0, 0, 0, 0, 2, 2, 5, 2,
2, 2, 0, 5, 0, 1, 2, 0, 0, 1, 6, 0, 1, 2, 2, 2,
7, 2, 0, 5, 0, 1, 1, 0, 0, 0, 3, 0, 2, 2, 7, 2
};
static int modesToBytes[] =
{
2, 3, 1, 3, 3, 3, 3, 2
};
int const n80 = 0x80; // nz
int const p20 = 0x20; // dp
int const z02 = 0x02; // nz
int const c01 = 0x01; // c
#define GET_PC() (pc - ram)
#define GET_SP() (sp - 0x101 - ram)
#define GET_PSW( out )\
{\
out = psw & ~(n80 | p20 | z02 | c01);\
out |= c >> 8 & c01;\
out |= dp >> 3 & p20;\
out |= ((nz >> 4) | nz) & n80;\
if ( !(uint8_t) nz ) out |= z02;\
}
uint8_t const *ram = RAM;
int addr;
int tsp, tpsw;
uint8_t d0, d1, d2;
addr = GET_PC();
tsp = GET_SP();
GET_PSW(tpsw);
d0 = *pc;
d1 = (addr < 0xffff) ? *(pc + 1) : 0;
d2 = (addr < 0xfffe) ? *(pc + 2) : 0;
int mode = modes[d0];
int bytes = modesToBytes[mode];
char mnem[100];
switch (bytes)
{
case 1:
sprintf(buffer, "%04X %02X ", addr, d0);
break;
case 2:
sprintf(buffer, "%04X %02X %02X ", addr, d0, d1);
break;
case 3:
sprintf(buffer, "%04X %02X %02X %02X ", addr, d0, d1, d2);
break;
}
switch (mode)
{
case 0:
sprintf(mnem, mnemonics[d0], d1);
break;
case 1:
sprintf(mnem, mnemonics[d0], d1 + (d2 << 8));
break;
case 2:
strcpy (mnem, mnemonics[d0]);
break;
case 3:
sprintf(mnem, mnemonics[d0], d2, d1);
break;
case 4:
sprintf(mnem, mnemonics[d0], d2, d1);
break;
case 5:
sprintf(mnem, mnemonics[d0], d1, addr + 3 + (int8_t) d2);
break;
case 6:
sprintf(mnem, mnemonics[d0], (d1 + (d2 << 8)) & 0x1fff, d2 >> 5);
break;
case 7:
sprintf(mnem, mnemonics[d0], addr + 2 + (int8_t) d1);
break;
}
sprintf(buffer, "%s %-20s A:%02X X:%02X Y:%02X S:%02X P:%c%c%c%c%c%c%c%c ROM:%d",
buffer, mnem, a, x, y, tsp,
(tpsw & 0x80) ? 'N' : 'n',
(tpsw & 0x40) ? 'V' : 'v',
(tpsw & 0x20) ? 'P' : 'p',
(tpsw & 0x10) ? 'B' : 'b',
(tpsw & 0x08) ? 'H' : 'h',
(tpsw & 0x04) ? 'I' : 'i',
(tpsw & 0x02) ? 'Z' : 'z',
(tpsw & 0x01) ? 'C' : 'c',
m.rom_enabled ? 1 : 0);
}
void SNES_SPC::debug_io_print( char *buffer )
{
sprintf(buffer, "i/o %02X/%02X %02X/%02X %02X/%02X %02X/%02X",
m.smp_regs[1][r_cpuio0], m.smp_regs[0][r_cpuio0],
m.smp_regs[1][r_cpuio1], m.smp_regs[0][r_cpuio1],
m.smp_regs[1][r_cpuio2], m.smp_regs[0][r_cpuio2],
m.smp_regs[1][r_cpuio3], m.smp_regs[0][r_cpuio3]);
}
#endif

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@ -1,142 +0,0 @@
// SPC emulation state save/load: copy_state(), save_spc()
// Separate file to avoid linking in unless needed
// snes_spc 0.9.0. http://www.slack.net/‾ant/
#include "SNES_SPC.h"
#if !SPC_NO_COPY_STATE_FUNCS
#include <string.h>
/* Copyright (C) 2004-2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include <stdio.h>
#include "blargg_source.h"
#define RAM (m.ram.ram)
#define REGS (m.smp_regs [0])
#define REGS_IN (m.smp_regs [1])
void SNES_SPC::save_regs( uint8_t out [reg_count] )
{
// Use current timer counter values
for ( int i = 0; i < timer_count; i++ )
out [r_t0out + i] = m.timers [i].counter;
// Last written values
memcpy( out, REGS, r_t0out );
}
void SNES_SPC::init_header( void* spc_out )
{
spc_file_t* const spc = (spc_file_t*) spc_out;
spc->has_id666 = 26; // has none
spc->version = 30;
memcpy( spc, signature, sizeof spc->signature );
memset( spc->text, 0, sizeof spc->text );
}
void SNES_SPC::save_spc( void* spc_out )
{
spc_file_t* const spc = (spc_file_t*) spc_out;
// CPU
spc->pcl = (uint8_t) (m.cpu_regs.pc >> 0);
spc->pch = (uint8_t) (m.cpu_regs.pc >> 8);
spc->a = m.cpu_regs.a;
spc->x = m.cpu_regs.x;
spc->y = m.cpu_regs.y;
spc->psw = m.cpu_regs.psw;
spc->sp = m.cpu_regs.sp;
// RAM, ROM
memcpy( spc->ram, RAM, sizeof spc->ram );
if ( m.rom_enabled )
memcpy( spc->ram + rom_addr, m.hi_ram, sizeof m.hi_ram );
memset( spc->unused, 0, sizeof spc->unused );
memcpy( spc->ipl_rom, m.rom, sizeof spc->ipl_rom );
// SMP registers
save_regs( &spc->ram [0xF0] );
int i;
for ( i = 0; i < port_count; i++ )
spc->ram [0xF0 + r_cpuio0 + i] = REGS_IN [r_cpuio0 + i];
// DSP registers
for ( i = 0; i < SPC_DSP::register_count; i++ )
spc->dsp [i] = dsp.read( i );
}
#undef IF_0_THEN_256
#define IF_0_THEN_256( n ) ((uint8_t) ((n) - 1) + 1)
void SNES_SPC::copy_state( unsigned char** io, copy_func_t copy )
{
SPC_State_Copier copier( io, copy );
// Make state data more readable by putting 64K RAM, 16 SMP registers,
// then DSP (with its 128 registers) first
// RAM
enable_rom( 0 ); // will get re-enabled if necessary in regs_loaded() below
copier.copy( RAM, 0x10000 );
{
// SMP registers
uint8_t regs [reg_count];
uint8_t regs_in [reg_count];
memcpy( regs, REGS, reg_count );
memcpy( regs_in, REGS_IN, reg_count );
copier.copy( regs, sizeof regs );
copier.copy( regs_in, sizeof regs_in );
memcpy( REGS, regs, reg_count);
memcpy( REGS_IN, regs_in, reg_count );
enable_rom( REGS [r_control] & 0x80 );
}
// CPU registers
SPC_COPY( uint16_t, m.cpu_regs.pc );
SPC_COPY( uint8_t, m.cpu_regs.a );
SPC_COPY( uint8_t, m.cpu_regs.x );
SPC_COPY( uint8_t, m.cpu_regs.y );
SPC_COPY( uint8_t, m.cpu_regs.psw );
SPC_COPY( uint8_t, m.cpu_regs.sp );
copier.extra();
SPC_COPY( int16_t, m.spc_time );
SPC_COPY( int16_t, m.dsp_time );
// DSP
dsp.copy_state( io, copy );
// Timers
for ( int i = 0; i < timer_count; i++ )
{
Timer* t = &m.timers [i];
t->period = IF_0_THEN_256( REGS [r_t0target + i] );
t->enabled = REGS [r_control] >> i & 1;
SPC_COPY( int16_t, t->next_time );
SPC_COPY( uint8_t, t->divider );
SPC_COPY( uint8_t, t->counter );
copier.extra();
}
set_tempo( m.tempo );
copier.extra();
}
#endif

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -1,319 +0,0 @@
// Highly accurate SNES SPC-700 DSP emulator
// snes_spc 0.9.0
#ifndef SPC_DSP_H
#define SPC_DSP_H
#include "blargg_common.h"
extern "C" { typedef void (*dsp_copy_func_t)( unsigned char** io, void* state, size_t ); }
class SPC_DSP {
public:
typedef BOOST::uint8_t uint8_t;
// Setup
// Initializes DSP and has it use the 64K RAM provided
void init( void* ram_64k );
// Sets destination for output samples. If out is NULL or out_size is 0,
// doesn't generate any.
typedef short sample_t;
void set_output( sample_t* out, int out_size );
// Number of samples written to output since it was last set, always
// a multiple of 2. Undefined if more samples were generated than
// output buffer could hold.
int sample_count() const;
// Emulation
// Resets DSP to power-on state
void reset();
// Emulates pressing reset switch on SNES
void soft_reset();
// Reads/writes DSP registers. For accuracy, you must first call run()
// to catch the DSP up to present.
int read ( int addr ) const;
void write( int addr, int data );
// Runs DSP for specified number of clocks (~1024000 per second). Every 32 clocks
// a pair of samples is be generated.
void run( int clock_count );
// Sound control
// Mutes voices corresponding to non-zero bits in mask (issues repeated KOFF events).
// Reduces emulation accuracy.
enum { voice_count = 8 };
void mute_voices( int mask );
// State
// Resets DSP and uses supplied values to initialize registers
enum { register_count = 128 };
void load( uint8_t const regs [register_count] );
// Saves/loads exact emulator state
enum { state_size = 640 }; // maximum space needed when saving
typedef dsp_copy_func_t copy_func_t;
void copy_state( unsigned char** io, copy_func_t );
// Returns non-zero if new key-on events occurred since last call
bool check_kon();
// Snes9x Accessor
int stereo_switch;
int take_spc_snapshot;
int rom_enabled; // mirror
uint8_t *rom, *hi_ram; // mirror
void (*spc_snapshot_callback) (void);
void set_spc_snapshot_callback( void (*callback) (void) );
void dump_spc_snapshot( void );
void set_stereo_switch( int );
uint8_t reg_value( int, int );
int envx_value( int );
// DSP register addresses
// Global registers
enum {
r_mvoll = 0x0C, r_mvolr = 0x1C,
r_evoll = 0x2C, r_evolr = 0x3C,
r_kon = 0x4C, r_koff = 0x5C,
r_flg = 0x6C, r_endx = 0x7C,
r_efb = 0x0D, r_pmon = 0x2D,
r_non = 0x3D, r_eon = 0x4D,
r_dir = 0x5D, r_esa = 0x6D,
r_edl = 0x7D,
r_fir = 0x0F // 8 coefficients at 0x0F, 0x1F ... 0x7F
};
// Voice registers
enum {
v_voll = 0x00, v_volr = 0x01,
v_pitchl = 0x02, v_pitchh = 0x03,
v_srcn = 0x04, v_adsr0 = 0x05,
v_adsr1 = 0x06, v_gain = 0x07,
v_envx = 0x08, v_outx = 0x09
};
public:
enum { extra_size = 16 };
sample_t* extra() { return m.extra; }
sample_t const* out_pos() const { return m.out; }
void disable_surround( bool ) { } // not supported
public:
BLARGG_DISABLE_NOTHROW
typedef BOOST::int8_t int8_t;
typedef BOOST::int16_t int16_t;
enum { echo_hist_size = 8 };
enum env_mode_t { env_release, env_attack, env_decay, env_sustain };
enum { brr_buf_size = 12 };
struct voice_t
{
int buf [brr_buf_size*2];// decoded samples (twice the size to simplify wrap handling)
int buf_pos; // place in buffer where next samples will be decoded
int interp_pos; // relative fractional position in sample (0x1000 = 1.0)
int brr_addr; // address of current BRR block
int brr_offset; // current decoding offset in BRR block
uint8_t* regs; // pointer to voice's DSP registers
int vbit; // bitmask for voice: 0x01 for voice 0, 0x02 for voice 1, etc.
int kon_delay; // KON delay/current setup phase
env_mode_t env_mode;
int env; // current envelope level
int hidden_env; // used by GAIN mode 7, very obscure quirk
uint8_t t_envx_out;
int voice_number;
};
private:
enum { brr_block_size = 9 };
struct state_t
{
uint8_t regs [register_count];
// Echo history keeps most recent 8 samples (twice the size to simplify wrap handling)
int echo_hist [echo_hist_size * 2] [2];
int (*echo_hist_pos) [2]; // &echo_hist [0 to 7]
int every_other_sample; // toggles every sample
int kon; // KON value when last checked
int noise;
int counter;
int echo_offset; // offset from ESA in echo buffer
int echo_length; // number of bytes that echo_offset will stop at
int phase; // next clock cycle to run (0-31)
bool kon_check; // set when a new KON occurs
// Hidden registers also written to when main register is written to
int new_kon;
uint8_t endx_buf;
uint8_t envx_buf;
uint8_t outx_buf;
// Temporary state between clocks
// read once per sample
int t_pmon;
int t_non;
int t_eon;
int t_dir;
int t_koff;
// read a few clocks ahead then used
int t_brr_next_addr;
int t_adsr0;
int t_brr_header;
int t_brr_byte;
int t_srcn;
int t_esa;
int t_echo_enabled;
// internal state that is recalculated every sample
int t_dir_addr;
int t_pitch;
int t_output;
int t_looped;
int t_echo_ptr;
// left/right sums
int t_main_out [2];
int t_echo_out [2];
int t_echo_in [2];
voice_t voices [voice_count];
// non-emulation state
uint8_t* ram; // 64K shared RAM between DSP and SMP
int mute_mask;
sample_t* out;
sample_t* out_end;
sample_t* out_begin;
sample_t extra [extra_size];
};
state_t m;
void init_counter();
void run_counters();
unsigned read_counter( int rate );
int interpolate( voice_t const* v );
void run_envelope( voice_t* const v );
void decode_brr( voice_t* v );
void misc_27();
void misc_28();
void misc_29();
void misc_30();
void voice_output( voice_t const* v, int ch );
void voice_V1( voice_t* const );
void voice_V2( voice_t* const );
void voice_V3( voice_t* const );
void voice_V3a( voice_t* const );
void voice_V3b( voice_t* const );
void voice_V3c( voice_t* const );
void voice_V4( voice_t* const );
void voice_V5( voice_t* const );
void voice_V6( voice_t* const );
void voice_V7( voice_t* const );
void voice_V8( voice_t* const );
void voice_V9( voice_t* const );
void voice_V7_V4_V1( voice_t* const );
void voice_V8_V5_V2( voice_t* const );
void voice_V9_V6_V3( voice_t* const );
void echo_read( int ch );
int echo_output( int ch );
void echo_write( int ch );
void echo_22();
void echo_23();
void echo_24();
void echo_25();
void echo_26();
void echo_27();
void echo_28();
void echo_29();
void echo_30();
void soft_reset_common();
};
#include <assert.h>
inline int SPC_DSP::sample_count() const { return m.out - m.out_begin; }
inline int SPC_DSP::read( int addr ) const
{
assert( (unsigned) addr < register_count );
return m.regs [addr];
}
inline void SPC_DSP::write( int addr, int data )
{
assert( (unsigned) addr < register_count );
m.regs [addr] = (uint8_t) data;
switch ( addr & 0x0F )
{
case v_envx:
m.envx_buf = (uint8_t) data;
break;
case v_outx:
m.outx_buf = (uint8_t) data;
break;
case 0x0C:
if ( addr == r_kon )
m.new_kon = (uint8_t) data;
if ( addr == r_endx ) // always cleared, regardless of data written
{
m.endx_buf = 0;
m.regs [r_endx] = 0;
}
break;
}
}
inline void SPC_DSP::mute_voices( int mask ) { m.mute_mask = mask; }
inline bool SPC_DSP::check_kon()
{
bool old = m.kon_check;
m.kon_check = 0;
return old;
}
#if !SPC_NO_COPY_STATE_FUNCS
class SPC_State_Copier {
SPC_DSP::copy_func_t func;
unsigned char** buf;
public:
SPC_State_Copier( unsigned char** p, SPC_DSP::copy_func_t f ) { func = f; buf = p; }
void copy( void* state, size_t size );
int copy_int( int state, int size );
void skip( int count );
void extra();
};
#define SPC_COPY( type, state )\
{\
state = (BOOST::type) copier.copy_int( state, sizeof (BOOST::type) );\
assert( (BOOST::type) state == state );\
}
#endif
#endif

View File

@ -1,68 +0,0 @@
// snes_spc 0.9.0. http://www.slack.net/~ant/
#include "SPC_Filter.h"
#include <string.h>
/* Copyright (C) 2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include "blargg_source.h"
void SPC_Filter::clear() { memset( ch, 0, sizeof ch ); }
SPC_Filter::SPC_Filter()
{
gain = gain_unit;
bass = bass_norm;
clear();
}
void SPC_Filter::run( short* io, int count )
{
require( (count & 1) == 0 ); // must be even
int const gain = this->gain;
int const bass = this->bass;
chan_t* c = &ch [2];
do
{
// cache in registers
int sum = (--c)->sum;
int pp1 = c->pp1;
int p1 = c->p1;
for ( int i = 0; i < count; i += 2 )
{
// Low-pass filter (two point FIR with coeffs 0.25, 0.75)
int f = io [i] + p1;
p1 = io [i] * 3;
// High-pass filter ("leaky integrator")
int delta = f - pp1;
pp1 = f;
int s = sum >> (gain_bits + 2);
sum += (delta * gain) - (sum >> bass);
// Clamp to 16 bits
if ( (short) s != s )
s = (s >> 31) ^ 0x7FFF;
io [i] = (short) s;
}
c->p1 = p1;
c->pp1 = pp1;
c->sum = sum;
++io;
}
while ( c != ch );
}

View File

@ -1,47 +0,0 @@
// Simple low-pass and high-pass filter to better match sound output of a SNES
// snes_spc 0.9.0
#ifndef SPC_FILTER_H
#define SPC_FILTER_H
#include "blargg_common.h"
struct SPC_Filter {
public:
// Filters count samples of stereo sound in place. Count must be a multiple of 2.
typedef short sample_t;
void run( sample_t* io, int count );
// Optional features
// Clears filter to silence
void clear();
// Sets gain (volume), where gain_unit is normal. Gains greater than gain_unit
// are fine, since output is clamped to 16-bit sample range.
enum { gain_unit = 0x100 };
void set_gain( int gain );
// Sets amount of bass (logarithmic scale)
enum { bass_none = 0 };
enum { bass_norm = 8 }; // normal amount
enum { bass_max = 31 };
void set_bass( int bass );
public:
SPC_Filter();
BLARGG_DISABLE_NOTHROW
private:
enum { gain_bits = 8 };
int gain;
int bass;
struct chan_t { int p1, pp1, sum; };
chan_t ch [2];
};
inline void SPC_Filter::set_gain( int g ) { gain = g; }
inline void SPC_Filter::set_bass( int b ) { bass = b; }
#endif

View File

@ -175,14 +175,13 @@
Nintendo Co., Limited and its subsidiary companies.
***********************************************************************************/
#include <math.h>
#include "snes9x.h"
#include "apu.h"
#include "snapshot.h"
#include "display.h"
#include "linear_resampler.h"
#include "hermite_resampler.h"
#include "snes/snes.hpp"
#define APU_DEFAULT_INPUT_RATE 32000
@ -192,27 +191,12 @@
#define APU_DENOMINATOR_NTSC 328125
#define APU_NUMERATOR_PAL 34176
#define APU_DENOMINATOR_PAL 709379
#define APU_DEFAULT_RESAMPLER HermiteResampler
SNES_SPC *spc_core = NULL;
namespace SNES
{
CPU cpu;
}
static uint8 APUROM[64] =
{
0xCD, 0xEF, 0xBD, 0xE8, 0x00, 0xC6, 0x1D, 0xD0,
0xFC, 0x8F, 0xAA, 0xF4, 0x8F, 0xBB, 0xF5, 0x78,
0xCC, 0xF4, 0xD0, 0xFB, 0x2F, 0x19, 0xEB, 0xF4,
0xD0, 0xFC, 0x7E, 0xF4, 0xD0, 0x0B, 0xE4, 0xF5,
0xCB, 0xF4, 0xD7, 0x00, 0xFC, 0xD0, 0xF3, 0xAB,
0x01, 0x10, 0xEF, 0x7E, 0xF4, 0x10, 0xEB, 0xBA,
0xF6, 0xDA, 0x00, 0xBA, 0xF4, 0xC4, 0xF4, 0xDD,
0x5D, 0xD0, 0xDB, 0x1F, 0x00, 0x00, 0xC0, 0xFF
};
namespace spc
{
static apu_callback sa_callback = NULL;
@ -233,8 +217,8 @@ namespace spc
static int32 reference_time;
static uint32 remainder;
static const int timing_hack_numerator = SNES_SPC::tempo_unit;
static int timing_hack_denominator = SNES_SPC::tempo_unit;
static const int timing_hack_numerator = 256;
static int timing_hack_denominator = 256;
/* Set these to NTSC for now. Will change to PAL in S9xAPUTimingSetSpeedup
if necessary on game load. */
static uint32 ratio_numerator = APU_NUMERATOR_NTSC;
@ -360,11 +344,12 @@ int S9xGetSampleCount (void)
return (spc::resampler->avail() >> (Settings.Stereo ? 0 : 1));
}
/* TODO: Attach */
void S9xFinalizeSamples (void)
{
if (!Settings.Mute)
{
if (!spc::resampler->push((short *) spc::landing_buffer, spc_core->sample_count()))
if (!spc::resampler->push((short *) spc::landing_buffer, SNES::dsp.spc_dsp.sample_count ()))
{
/* We weren't able to process the entire buffer. Potential overrun. */
spc::sound_in_sync = FALSE;
@ -382,7 +367,7 @@ void S9xFinalizeSamples (void)
else
spc::sound_in_sync = FALSE;
spc_core->set_output((SNES_SPC::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
SNES::dsp.spc_dsp.set_output((SNES::SPC_DSP::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
}
void S9xLandSamples (void)
@ -458,7 +443,7 @@ bool8 S9xInitSound (int buffer_ms, int lag_ms)
arguments. Use 2x in the resampler for buffer leveling with SoundSync */
if (!spc::resampler)
{
spc::resampler = new APU_DEFAULT_RESAMPLER(spc::buffer_size >> (Settings.SoundSync ? 0 : 1));
spc::resampler = new HermiteResampler(spc::buffer_size >> (Settings.SoundSync ? 0 : 1));
if (!spc::resampler)
{
delete[] spc::landing_buffer;
@ -468,7 +453,7 @@ bool8 S9xInitSound (int buffer_ms, int lag_ms)
else
spc::resampler->resize(spc::buffer_size >> (Settings.SoundSync ? 0 : 1));
spc_core->set_output((SNES_SPC::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
SNES::dsp.spc_dsp.set_output ((SNES::SPC_DSP::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
UpdatePlaybackRate();
@ -479,7 +464,8 @@ bool8 S9xInitSound (int buffer_ms, int lag_ms)
void S9xSetSoundControl (uint8 voice_switch)
{
spc_core->dsp_set_stereo_switch(voice_switch << 8 | voice_switch);
/*
spc_core->dsp_set_stereo_switch(voice_switch << 8 | voice_switch); */
}
void S9xSetSoundMute (bool8 mute)
@ -491,7 +477,8 @@ void S9xSetSoundMute (bool8 mute)
void S9xDumpSPCSnapshot (void)
{
spc_core->dsp_dump_spc_snapshot();
/* No SPC dumping ATM in byuu SMP */
/* spc_core->dsp_dump_spc_snapshot(); */
}
static void SPCSnapshotCallback (void)
@ -502,15 +489,6 @@ static void SPCSnapshotCallback (void)
bool8 S9xInitAPU (void)
{
spc_core = new SNES_SPC;
if (!spc_core)
return (FALSE);
spc_core->init();
spc_core->init_rom(APUROM);
spc_core->dsp_set_spc_snapshot_callback(SPCSnapshotCallback);
spc::landing_buffer = NULL;
spc::shrink_buffer = NULL;
spc::resampler = NULL;
@ -520,12 +498,6 @@ bool8 S9xInitAPU (void)
void S9xDeinitAPU (void)
{
if (spc_core)
{
delete spc_core;
spc_core = NULL;
}
if (spc::resampler)
{
delete spc::resampler;
@ -559,12 +531,14 @@ static inline int S9xAPUGetClockRemainder (int32 cpucycles)
uint8 S9xAPUReadPort (int port)
{
return ((uint8) spc_core->read_port(S9xAPUGetClock(CPU.Cycles), port));
S9xAPUExecute ();
return ((uint8) SNES::smp.port_read (port & 3));
}
void S9xAPUWritePort (int port, uint8 byte)
{
spc_core->write_port(S9xAPUGetClock(CPU.Cycles), port, byte);
S9xAPUExecute ();
SNES::smp.port_write (port & 3, byte);
}
void S9xAPUSetReferenceTime (int32 cpucycles)
@ -574,8 +548,8 @@ void S9xAPUSetReferenceTime (int32 cpucycles)
void S9xAPUExecute (void)
{
/* Accumulate partial APU cycles */
spc_core->end_frame(S9xAPUGetClock(CPU.Cycles));
SNES::smp.clock -= S9xAPUGetClock (CPU.Cycles);
SNES::smp.enter ();
spc::remainder = S9xAPUGetClockRemainder(CPU.Cycles);
@ -586,7 +560,7 @@ void S9xAPUEndScanline (void)
{
S9xAPUExecute();
if (spc_core->sample_count() >= APU_MINIMUM_SAMPLE_BLOCK || !spc::sound_in_sync)
if (SNES::dsp.spc_dsp.sample_count() >= APU_MINIMUM_SAMPLE_BLOCK || !spc::sound_in_sync)
S9xLandSamples();
}
@ -595,8 +569,7 @@ void S9xAPUTimingSetSpeedup (int ticks)
if (ticks != 0)
printf("APU speedup hack: %d\n", ticks);
spc::timing_hack_denominator = SNES_SPC::tempo_unit - ticks;
spc_core->set_tempo(spc::timing_hack_denominator);
spc::timing_hack_denominator = 256 - ticks;
spc::ratio_numerator = Settings.PAL ? APU_NUMERATOR_PAL : APU_NUMERATOR_NTSC;
spc::ratio_denominator = Settings.PAL ? APU_DENOMINATOR_PAL : APU_DENOMINATOR_NTSC;
@ -610,15 +583,18 @@ void S9xAPUAllowTimeOverflow (bool allow)
if (allow)
printf("APU time overflow allowed\n");
spc_core->spc_allow_time_overflow(allow);
/* spc_core->spc_allow_time_overflow(allow); */
}
void S9xResetAPU (void)
{
spc::reference_time = 0;
spc::remainder = 0;
spc_core->reset();
spc_core->set_output((SNES_SPC::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
SNES::cpu.frequency = Settings.PAL ? PAL_MASTER_CLOCK : NTSC_MASTER_CLOCK;
SNES::smp.power ();
SNES::dsp.power ();
SNES::dsp.spc_dsp.set_output ((SNES::SPC_DSP::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
spc::resampler->clear();
}
@ -627,38 +603,27 @@ void S9xSoftResetAPU (void)
{
spc::reference_time = 0;
spc::remainder = 0;
spc_core->soft_reset();
spc_core->set_output((SNES_SPC::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
SNES::smp.reset ();
SNES::dsp.reset ();
SNES::dsp.spc_dsp.set_output ((SNES::SPC_DSP::sample_t *) spc::landing_buffer, spc::buffer_size >> 1);
spc::resampler->clear();
}
static void from_apu_to_state (uint8 **buf, void *var, size_t size)
{
memcpy(*buf, var, size);
*buf += size;
}
static void to_apu_from_state (uint8 **buf, void *var, size_t size)
{
memcpy(var, *buf, size);
*buf += size;
}
void S9xAPUSaveState (uint8 *block)
{
uint8 *ptr = block;
/* uint8 *ptr = block;
spc_core->copy_state(&ptr, from_apu_to_state);
SET_LE32(ptr, spc::reference_time);
ptr += sizeof(int32);
SET_LE32(ptr, spc::remainder);
SET_LE32(ptr, spc::remainder); */
}
void S9xAPULoadState (uint8 *block)
{
uint8 *ptr = block;
/*uint8 *ptr = block;
S9xResetAPU();
@ -666,5 +631,5 @@ void S9xAPULoadState (uint8 *block)
spc::reference_time = GET_LE32(ptr);
ptr += sizeof(int32);
spc::remainder = GET_LE32(ptr);
spc::remainder = GET_LE32(ptr); */
}

View File

@ -180,7 +180,6 @@
#define _APU_H_
#include "snes9x.h"
#include "SNES_SPC.h"
typedef void (*apu_callback) (void *);
@ -214,6 +213,4 @@ void S9xClearSamples (void);
bool8 S9xMixSamples (uint8 *, int);
void S9xSetSamplesAvailableCallback (apu_callback, void *);
extern SNES_SPC *spc_core;
#endif

View File

@ -18,12 +18,6 @@ void DSP::synchronize_smp() {
void DSP::enter() {
spc_dsp.run(1);
step(24);
/* signed count = spc_dsp.sample_count();
if(count > 0) {
for(unsigned n = 0; n < count; n += 2) audio.sample(samplebuffer[n + 0], samplebuffer[n + 1]);
spc_dsp.set_output(samplebuffer, 8192);
} */
}
uint8 DSP::read(uint8 addr) {
@ -37,12 +31,10 @@ void DSP::write(uint8 addr, uint8 data) {
void DSP::power() {
spc_dsp.init(smp.apuram);
spc_dsp.reset();
spc_dsp.set_output(samplebuffer, 8192);
}
void DSP::reset() {
spc_dsp.soft_reset();
spc_dsp.set_output(samplebuffer, 8192);
}
void DSP::channel_enable(unsigned channel, bool enable) {

View File

@ -17,9 +17,9 @@ public:
DSP();
private:
SPC_DSP spc_dsp;
int16 samplebuffer[8192];
private:
bool channel_enabled[8];
};

View File

@ -42,8 +42,6 @@ void SMP::enter() {
void SMP::power() {
#ifdef BSNES
Processor::frequency = system.apu_frequency();
#else
Processor::frequency = 1025600;
#endif
Processor::clock = 0;

View File

@ -23,10 +23,12 @@ public:
void enter ()
{
return;
}
void port_write (uint8 port, uint8 data)
{
}
uint8 port_read (uint8 port)

View File

@ -1,186 +0,0 @@
// Sets up common environment for Shay Green's libraries.
// To change configuration options, modify blargg_config.h, not this file.
// snes_spc 0.9.0
#ifndef BLARGG_COMMON_H
#define BLARGG_COMMON_H
#include <stddef.h>
#include <stdlib.h>
#include <assert.h>
#include <limits.h>
#undef BLARGG_COMMON_H
// allow blargg_config.h to #include blargg_common.h
#include "blargg_config.h"
#ifndef BLARGG_COMMON_H
#define BLARGG_COMMON_H
// BLARGG_RESTRICT: equivalent to restrict, where supported
#if defined (__GNUC__) || _MSC_VER >= 1100
#define BLARGG_RESTRICT __restrict
#else
#define BLARGG_RESTRICT
#endif
// STATIC_CAST(T,expr): Used in place of static_cast<T> (expr)
#ifndef STATIC_CAST
#define STATIC_CAST(T,expr) ((T) (expr))
#endif
// blargg_err_t (0 on success, otherwise error string)
#ifndef blargg_err_t
typedef const char* blargg_err_t;
#endif
// blargg_vector - very lightweight vector of POD types (no constructor/destructor)
template<class T>
class blargg_vector {
T* begin_;
size_t size_;
public:
blargg_vector() : begin_( 0 ), size_( 0 ) { }
~blargg_vector() { free( begin_ ); }
size_t size() const { return size_; }
T* begin() const { return begin_; }
T* end() const { return begin_ + size_; }
blargg_err_t resize( size_t n )
{
// TODO: blargg_common.cpp to hold this as an outline function, ugh
void* p = realloc( begin_, n * sizeof (T) );
if ( p )
begin_ = (T*) p;
else if ( n > size_ ) // realloc failure only a problem if expanding
return "Out of memory";
size_ = n;
return 0;
}
void clear() { void* p = begin_; begin_ = 0; size_ = 0; free( p ); }
T& operator [] ( size_t n ) const
{
assert( n <= size_ ); // <= to allow past-the-end value
return begin_ [n];
}
};
#ifndef BLARGG_DISABLE_NOTHROW
// throw spec mandatory in ISO C++ if operator new can return NULL
#if __cplusplus >= 199711 || defined (__GNUC__)
#define BLARGG_THROWS( spec ) throw spec
#else
#define BLARGG_THROWS( spec )
#endif
#define BLARGG_DISABLE_NOTHROW \
void* operator new ( size_t s ) BLARGG_THROWS(()) { return malloc( s ); }\
void operator delete ( void* p ) { free( p ); }
#define BLARGG_NEW new
#else
#include <new>
#define BLARGG_NEW new (std::nothrow)
#endif
// BLARGG_4CHAR('a','b','c','d') = 'abcd' (four character integer constant)
#define BLARGG_4CHAR( a, b, c, d ) \
((a&0xFF)*0x1000000L + (b&0xFF)*0x10000L + (c&0xFF)*0x100L + (d&0xFF))
// BOOST_STATIC_ASSERT( expr ): Generates compile error if expr is 0.
#ifndef BOOST_STATIC_ASSERT
#ifdef _MSC_VER
// MSVC6 (_MSC_VER < 1300) fails for use of __LINE__ when /Zl is specified
#define BOOST_STATIC_ASSERT( expr ) \
void blargg_failed_( int (*arg) [2 / (int) !!(expr) - 1] )
#else
// Some other compilers fail when declaring same function multiple times in class,
// so differentiate them by line
#define BOOST_STATIC_ASSERT( expr ) \
void blargg_failed_( int (*arg) [2 / !!(expr) - 1] [__LINE__] )
#endif
#endif
// BLARGG_COMPILER_HAS_BOOL: If 0, provides bool support for old compiler. If 1,
// compiler is assumed to support bool. If undefined, availability is determined.
#ifndef BLARGG_COMPILER_HAS_BOOL
#if defined (__MWERKS__)
#if !__option(bool)
#define BLARGG_COMPILER_HAS_BOOL 0
#endif
#elif defined (_MSC_VER)
#if _MSC_VER < 1100
#define BLARGG_COMPILER_HAS_BOOL 0
#endif
#elif defined (__GNUC__)
// supports bool
#elif __cplusplus < 199711
#define BLARGG_COMPILER_HAS_BOOL 0
#endif
#endif
#if defined (BLARGG_COMPILER_HAS_BOOL) && !BLARGG_COMPILER_HAS_BOOL
// If you get errors here, modify your blargg_config.h file
typedef int bool;
const bool true = 1;
const bool false = 0;
#endif
// blargg_long/blargg_ulong = at least 32 bits, int if it's big enough
#if INT_MAX < 0x7FFFFFFF || LONG_MAX == 0x7FFFFFFF
typedef long blargg_long;
#else
typedef int blargg_long;
#endif
#if UINT_MAX < 0xFFFFFFFF || ULONG_MAX == 0xFFFFFFFF
typedef unsigned long blargg_ulong;
#else
typedef unsigned blargg_ulong;
#endif
// BOOST::int8_t etc.
// HAVE_STDINT_H: If defined, use <stdint.h> for int8_t etc.
#if defined (HAVE_STDINT_H)
#include <stdint.h>
#define BOOST
// HAVE_INTTYPES_H: If defined, use <stdint.h> for int8_t etc.
#elif defined (HAVE_INTTYPES_H)
#include <inttypes.h>
#define BOOST
#else
struct BOOST
{
#if UCHAR_MAX == 0xFF && SCHAR_MAX == 0x7F
typedef signed char int8_t;
typedef unsigned char uint8_t;
#else
// No suitable 8-bit type available
typedef struct see_blargg_common_h int8_t;
typedef struct see_blargg_common_h uint8_t;
#endif
#if USHRT_MAX == 0xFFFF
typedef short int16_t;
typedef unsigned short uint16_t;
#else
// No suitable 16-bit type available
typedef struct see_blargg_common_h int16_t;
typedef struct see_blargg_common_h uint16_t;
#endif
#if ULONG_MAX == 0xFFFFFFFF
typedef long int32_t;
typedef unsigned long uint32_t;
#elif UINT_MAX == 0xFFFFFFFF
typedef int int32_t;
typedef unsigned int uint32_t;
#else
// No suitable 32-bit type available
typedef struct see_blargg_common_h int32_t;
typedef struct see_blargg_common_h uint32_t;
#endif
};
#endif
#endif
#endif

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@ -1,24 +0,0 @@
// snes_spc 0.9.0 user configuration file. Don't replace when updating library.
// snes_spc 0.9.0
#ifndef BLARGG_CONFIG_H
#define BLARGG_CONFIG_H
// Uncomment to disable debugging checks
//#define NDEBUG 1
// Uncomment to enable platform-specific (and possibly non-portable) optimizations
//#define BLARGG_NONPORTABLE 1
// Uncomment if automatic byte-order determination doesn't work
//#define BLARGG_BIG_ENDIAN 1
// Uncomment if you get errors in the bool section of blargg_common.h
//#define BLARGG_COMPILER_HAS_BOOL 1
// Use standard config.h if present
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#endif

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@ -1,185 +0,0 @@
// CPU Byte Order Utilities
// snes_spc 0.9.0
#ifndef BLARGG_ENDIAN
#define BLARGG_ENDIAN
#include "blargg_common.h"
// BLARGG_CPU_CISC: Defined if CPU has very few general-purpose registers (< 16)
#if defined (_M_IX86) || defined (_M_IA64) || defined (__i486__) || \
defined (__x86_64__) || defined (__ia64__) || defined (__i386__)
#define BLARGG_CPU_X86 1
#define BLARGG_CPU_CISC 1
#endif
#if defined (__powerpc__) || defined (__ppc__) || defined (__POWERPC__) || defined (__powerc)
#define BLARGG_CPU_POWERPC 1
#define BLARGG_CPU_RISC 1
#endif
// BLARGG_BIG_ENDIAN, BLARGG_LITTLE_ENDIAN: Determined automatically, otherwise only
// one may be #defined to 1. Only needed if something actually depends on byte order.
#if !defined (BLARGG_BIG_ENDIAN) && !defined (BLARGG_LITTLE_ENDIAN)
#ifdef __GLIBC__
// GCC handles this for us
#include <endian.h>
#if __BYTE_ORDER == __LITTLE_ENDIAN
#define BLARGG_LITTLE_ENDIAN 1
#elif __BYTE_ORDER == __BIG_ENDIAN
#define BLARGG_BIG_ENDIAN 1
#endif
#else
#if defined (LSB_FIRST) || defined (__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || \
(defined (LITTLE_ENDIAN) && LITTLE_ENDIAN+0 != 1234)
#define BLARGG_LITTLE_ENDIAN 1
#endif
#if defined (MSB_FIRST) || defined (__BIG_ENDIAN__) || defined (WORDS_BIGENDIAN) || \
defined (__sparc__) || BLARGG_CPU_POWERPC || \
(defined (BIG_ENDIAN) && BIG_ENDIAN+0 != 4321)
#define BLARGG_BIG_ENDIAN 1
#elif !defined (__mips__)
// No endian specified; assume little-endian, since it's most common
#define BLARGG_LITTLE_ENDIAN 1
#endif
#endif
#endif
#if BLARGG_LITTLE_ENDIAN && BLARGG_BIG_ENDIAN
#undef BLARGG_LITTLE_ENDIAN
#undef BLARGG_BIG_ENDIAN
#endif
inline void blargg_verify_byte_order()
{
#ifndef NDEBUG
#if BLARGG_BIG_ENDIAN
volatile int i = 1;
assert( *(volatile char*) &i == 0 );
#elif BLARGG_LITTLE_ENDIAN
volatile int i = 1;
assert( *(volatile char*) &i != 0 );
#endif
#endif
}
inline unsigned get_le16( void const* p )
{
return (unsigned) ((unsigned char const*) p) [1] << 8 |
(unsigned) ((unsigned char const*) p) [0];
}
inline unsigned get_be16( void const* p )
{
return (unsigned) ((unsigned char const*) p) [0] << 8 |
(unsigned) ((unsigned char const*) p) [1];
}
inline blargg_ulong get_le32( void const* p )
{
return (blargg_ulong) ((unsigned char const*) p) [3] << 24 |
(blargg_ulong) ((unsigned char const*) p) [2] << 16 |
(blargg_ulong) ((unsigned char const*) p) [1] << 8 |
(blargg_ulong) ((unsigned char const*) p) [0];
}
inline blargg_ulong get_be32( void const* p )
{
return (blargg_ulong) ((unsigned char const*) p) [0] << 24 |
(blargg_ulong) ((unsigned char const*) p) [1] << 16 |
(blargg_ulong) ((unsigned char const*) p) [2] << 8 |
(blargg_ulong) ((unsigned char const*) p) [3];
}
inline void set_le16( void* p, unsigned n )
{
((unsigned char*) p) [1] = (unsigned char) (n >> 8);
((unsigned char*) p) [0] = (unsigned char) n;
}
inline void set_be16( void* p, unsigned n )
{
((unsigned char*) p) [0] = (unsigned char) (n >> 8);
((unsigned char*) p) [1] = (unsigned char) n;
}
inline void set_le32( void* p, blargg_ulong n )
{
((unsigned char*) p) [0] = (unsigned char) n;
((unsigned char*) p) [1] = (unsigned char) (n >> 8);
((unsigned char*) p) [2] = (unsigned char) (n >> 16);
((unsigned char*) p) [3] = (unsigned char) (n >> 24);
}
inline void set_be32( void* p, blargg_ulong n )
{
((unsigned char*) p) [3] = (unsigned char) n;
((unsigned char*) p) [2] = (unsigned char) (n >> 8);
((unsigned char*) p) [1] = (unsigned char) (n >> 16);
((unsigned char*) p) [0] = (unsigned char) (n >> 24);
}
#if BLARGG_NONPORTABLE
// Optimized implementation if byte order is known
#if BLARGG_LITTLE_ENDIAN
#define GET_LE16( addr ) (*(BOOST::uint16_t*) (addr))
#define GET_LE32( addr ) (*(BOOST::uint32_t*) (addr))
#define SET_LE16( addr, data ) (void) (*(BOOST::uint16_t*) (addr) = (data))
#define SET_LE32( addr, data ) (void) (*(BOOST::uint32_t*) (addr) = (data))
#elif BLARGG_BIG_ENDIAN
#define GET_BE16( addr ) (*(BOOST::uint16_t*) (addr))
#define GET_BE32( addr ) (*(BOOST::uint32_t*) (addr))
#define SET_BE16( addr, data ) (void) (*(BOOST::uint16_t*) (addr) = (data))
#define SET_BE32( addr, data ) (void) (*(BOOST::uint32_t*) (addr) = (data))
#if BLARGG_CPU_POWERPC
// PowerPC has special byte-reversed instructions
#if defined (__MWERKS__)
#define GET_LE16( addr ) (__lhbrx( addr, 0 ))
#define GET_LE32( addr ) (__lwbrx( addr, 0 ))
#define SET_LE16( addr, in ) (__sthbrx( in, addr, 0 ))
#define SET_LE32( addr, in ) (__stwbrx( in, addr, 0 ))
#elif defined (__GNUC__)
#define GET_LE16( addr ) ({unsigned ppc_lhbrx_; asm( "lhbrx %0,0,%1" : "=r" (ppc_lhbrx_) : "r" (addr), "0" (ppc_lhbrx_) ); ppc_lhbrx_;})
#define GET_LE32( addr ) ({unsigned ppc_lwbrx_; asm( "lwbrx %0,0,%1" : "=r" (ppc_lwbrx_) : "r" (addr), "0" (ppc_lwbrx_) ); ppc_lwbrx_;})
#define SET_LE16( addr, in ) ({asm( "sthbrx %0,0,%1" : : "r" (in), "r" (addr) );})
#define SET_LE32( addr, in ) ({asm( "stwbrx %0,0,%1" : : "r" (in), "r" (addr) );})
#endif
#endif
#endif
#endif
#ifndef GET_LE16
#define GET_LE16( addr ) get_le16( addr )
#define SET_LE16( addr, data ) set_le16( addr, data )
#endif
#ifndef GET_LE32
#define GET_LE32( addr ) get_le32( addr )
#define SET_LE32( addr, data ) set_le32( addr, data )
#endif
#ifndef GET_BE16
#define GET_BE16( addr ) get_be16( addr )
#define SET_BE16( addr, data ) set_be16( addr, data )
#endif
#ifndef GET_BE32
#define GET_BE32( addr ) get_be32( addr )
#define SET_BE32( addr, data ) set_be32( addr, data )
#endif
// auto-selecting versions
inline void set_le( BOOST::uint16_t* p, unsigned n ) { SET_LE16( p, n ); }
inline void set_le( BOOST::uint32_t* p, blargg_ulong n ) { SET_LE32( p, n ); }
inline void set_be( BOOST::uint16_t* p, unsigned n ) { SET_BE16( p, n ); }
inline void set_be( BOOST::uint32_t* p, blargg_ulong n ) { SET_BE32( p, n ); }
inline unsigned get_le( BOOST::uint16_t* p ) { return GET_LE16( p ); }
inline blargg_ulong get_le( BOOST::uint32_t* p ) { return GET_LE32( p ); }
inline unsigned get_be( BOOST::uint16_t* p ) { return GET_BE16( p ); }
inline blargg_ulong get_be( BOOST::uint32_t* p ) { return GET_BE32( p ); }
#endif

View File

@ -1,100 +0,0 @@
/* Included at the beginning of library source files, after all other #include lines.
Sets up helpful macros and services used in my source code. They don't need
module an annoying module prefix on their names since they are defined after
all other #include lines. */
// snes_spc 0.9.0
#ifndef BLARGG_SOURCE_H
#define BLARGG_SOURCE_H
// If debugging is enabled, abort program if expr is false. Meant for checking
// internal state and consistency. A failed assertion indicates a bug in the module.
// void assert( bool expr );
#include <assert.h>
// If debugging is enabled and expr is false, abort program. Meant for checking
// caller-supplied parameters and operations that are outside the control of the
// module. A failed requirement indicates a bug outside the module.
// void require( bool expr );
#undef require
#define require( expr ) assert( expr )
// Like printf() except output goes to debug log file. Might be defined to do
// nothing (not even evaluate its arguments).
// void dprintf( const char* format, ... );
static inline void blargg_dprintf_( const char*, ... ) { }
#undef dprintf
#define dprintf (1) ? (void) 0 : blargg_dprintf_
// If enabled, evaluate expr and if false, make debug log entry with source file
// and line. Meant for finding situations that should be examined further, but that
// don't indicate a problem. In all cases, execution continues normally.
#undef check
#define check( expr ) ((void) 0)
// If expr yields error string, return it from current function, otherwise continue.
#undef RETURN_ERR
#define RETURN_ERR( expr ) do { \
blargg_err_t blargg_return_err_ = (expr); \
if ( blargg_return_err_ ) return blargg_return_err_; \
} while ( 0 )
// If ptr is 0, return out of memory error string.
#undef CHECK_ALLOC
#define CHECK_ALLOC( ptr ) do { if ( (ptr) == 0 ) return "Out of memory"; } while ( 0 )
// Avoid any macros which evaluate their arguments multiple times
#undef min
#undef max
#define DEF_MIN_MAX( type ) \
static inline type min( type x, type y ) { if ( x < y ) return x; return y; }\
static inline type max( type x, type y ) { if ( y < x ) return x; return y; }
DEF_MIN_MAX( int )
DEF_MIN_MAX( unsigned )
DEF_MIN_MAX( long )
DEF_MIN_MAX( unsigned long )
DEF_MIN_MAX( float )
DEF_MIN_MAX( double )
#undef DEF_MIN_MAX
/*
// using const references generates crappy code, and I am currenly only using these
// for built-in types, so they take arguments by value
// TODO: remove
inline int min( int x, int y )
template<class T>
inline T min( T x, T y )
{
if ( x < y )
return x;
return y;
}
template<class T>
inline T max( T x, T y )
{
if ( x < y )
return y;
return x;
}
*/
// TODO: good idea? bad idea?
#undef byte
#define byte byte_
typedef unsigned char byte;
// deprecated
#define BLARGG_CHECK_ALLOC CHECK_ALLOC
#define BLARGG_RETURN_ERR RETURN_ERR
// BLARGG_SOURCE_BEGIN: If defined, #included, allowing redefition of dprintf and check
#ifdef BLARGG_SOURCE_BEGIN
#include BLARGG_SOURCE_BEGIN
#endif
#endif

View File

@ -1,504 +0,0 @@
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<signature of Ty Coon>, 1 April 1990
Ty Coon, President of Vice
That's all there is to it!

View File

@ -1,115 +0,0 @@
/* Simple fixed-point linear resampler by BearOso*/
#ifndef __LINEAR_RESAMPLER_H
#define __LINEAR_RESAMPLER_H
#include "resampler.h"
#include "snes9x.h"
static const int f_prec = 15;
static const uint32 f__one = (1 << f_prec);
#define lerp(t, a, b) (((((b) - (a)) * (t)) >> f_prec) + (a))
class LinearResampler : public Resampler
{
protected:
uint32 f__r_step;
uint32 f__inv_r_step;
uint32 f__r_frac;
int r_left, r_right;
public:
LinearResampler (int num_samples) : Resampler (num_samples)
{
f__r_frac = 0;
}
~LinearResampler ()
{
}
void
time_ratio (double ratio)
{
if (ratio == 0.0)
ratio = 1.0;
f__r_step = (uint32) (ratio * f__one);
f__inv_r_step = (uint32) (f__one / ratio);
clear ();
}
void
clear (void)
{
ring_buffer::clear ();
f__r_frac = 0;
r_left = 0;
r_right = 0;
}
void
read (short *data, int num_samples)
{
int i_position = start >> 1;
short *internal_buffer = (short *) buffer;
int o_position = 0;
int consumed = 0;
int max_samples = (buffer_size >> 1);
while (o_position < num_samples && consumed < buffer_size)
{
if (f__r_step == f__one)
{
data[o_position] = internal_buffer[i_position];
data[o_position + 1] = internal_buffer[i_position + 1];
o_position += 2;
i_position += 2;
if (i_position >= max_samples)
i_position -= max_samples;
consumed += 2;
continue;
}
while (f__r_frac <= f__one && o_position < num_samples)
{
data[o_position] = lerp (f__r_frac,
r_left,
internal_buffer[i_position]);
data[o_position + 1] = lerp (f__r_frac,
r_right,
internal_buffer[i_position + 1]);
o_position += 2;
f__r_frac += f__r_step;
}
if (f__r_frac > f__one)
{
f__r_frac -= f__one;
r_left = internal_buffer[i_position];
r_right = internal_buffer[i_position + 1];
i_position += 2;
if (i_position >= max_samples)
i_position -= max_samples;
consumed += 2;
}
}
size -= consumed << 1;
start += consumed << 1;
if (start >= buffer_size)
start -= buffer_size;
}
inline int
avail (void)
{
return (((size >> 2) * f__inv_r_step) - ((f__r_frac * f__inv_r_step) >> f_prec)) >> (f_prec - 1);
}
};
#endif /* __LINEAR_RESAMPLER_H */

View File

@ -119,11 +119,7 @@ endif
# APU
snes9x_gtk_SOURCES += \
../apu/apu.cpp \
../apu/SNES_SPC.cpp \
../apu/SNES_SPC_misc.cpp \
../apu/SNES_SPC_state.cpp \
../apu/SPC_Filter.cpp
../apu/apu.cpp
# Byuu's APU
snes9x_gtk_SOURCES += \

View File

@ -1269,7 +1269,7 @@ bool8 S9xUnfreezeGame (const char *filename)
void S9xFreezeToStream (STREAM stream)
{
char buffer[1024];
uint8 *soundsnapshot = new uint8[SPC_SAVE_STATE_BLOCK_SIZE];
//uint8 *soundsnapshot = new uint8[SPC_SAVE_STATE_BLOCK_SIZE];
S9xSetSoundMute(TRUE);
@ -1298,8 +1298,8 @@ void S9xFreezeToStream (STREAM stream)
FreezeBlock (stream, "FIL", Memory.FillRAM, 0x8000);
S9xAPUSaveState(soundsnapshot);
FreezeBlock (stream, "SND", soundsnapshot, SPC_SAVE_STATE_BLOCK_SIZE);
//S9xAPUSaveState(soundsnapshot);
//FreezeBlock (stream, "SND", soundsnapshot, SPC_SAVE_STATE_BLOCK_SIZE);
struct SControlSnapshot ctl_snap;
S9xControlPreSaveState(&ctl_snap);
@ -1410,7 +1410,7 @@ void S9xFreezeToStream (STREAM stream)
S9xSetSoundMute(FALSE);
delete [] soundsnapshot;
//delete [] soundsnapshot;
}
int S9xUnfreezeFromStream (STREAM stream)
@ -1496,7 +1496,7 @@ int S9xUnfreezeFromStream (STREAM stream)
if (result != SUCCESS)
break;
result = UnfreezeBlockCopy (stream, "SND", &local_apu_sound, SPC_SAVE_STATE_BLOCK_SIZE);
// result = UnfreezeBlockCopy (stream, "SND", &local_apu_sound, SPC_SAVE_STATE_BLOCK_SIZE);
if (result != SUCCESS)
break;
@ -2278,6 +2278,8 @@ static void UnfreezeStructFromCopy (void *sbase, FreezeData *fields, int num_fie
bool8 S9xSPCDump (const char *filename)
{
/* No SPC dumping in byuu SMP */
/*
FILE *fs;
uint8 buf[SNES_SPC::spc_file_size];
size_t ignore;
@ -2296,6 +2298,6 @@ bool8 S9xSPCDump (const char *filename)
fclose(fs);
S9xSetSoundMute(FALSE);
*/
return (TRUE);
}