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8134 Commits

Author SHA1 Message Date
gidan80 9aa08313e3 Qt: Add custom pad configs 
Add a custom pad config for every game.
 2019-05-16 20:37:41 +02:00
kd-11 cb78522620 rsx: Fixup for uninitialized surface antialiasing mode 2019-05-16 19:25:26 +03:00
kd-11 45a13d0319 rsx: Fixup for lost aliased surfaces 
- Intersection routines were changed and require explicit identification of the "old surface"
 2019-05-16 19:25:26 +03:00
kd-11 05eb1e9193 rsx: Fix zombie image references from inside the texture cache 
- Do not add locked orphans to the flush_always cache! They will not remove their cache entries as they are not bound
 2019-05-16 19:25:26 +03:00
kd-11 214bb3ec87 rsx: Always initialize memory unless it is guaranteed to be wiped 2019-05-16 19:25:26 +03:00
kd-11 88290d9fab rsx: Hack around using data regions as transfer targets 2019-05-16 19:25:26 +03:00
kd-11 4182f9984d rsx: Propagate split section information back to the texture cache 2019-05-16 19:25:26 +03:00
kd-11 3c7d8a1099 rsx: Minor texture/surface scanning optimization 
- Also re-enable optimization in blit engine accidentally disabled during debugging
 2019-05-16 19:25:26 +03:00
kd-11 9f0090772a rsx: Fix write tagging when comments are transferred in by blit engine 2019-05-16 19:25:26 +03:00
kd-11 4b443be881 rsx: Fix self-intersection with previous occupant of the address being replaced 2019-05-16 19:25:26 +03:00
kd-11 b840f6da28 [WIP] rsx: Use a sane reference counting model 2019-05-16 19:25:26 +03:00
kd-11 e3cf3ab6b8 rsx: Minor fixes 
- Fix transfer scaling (inverted)
- Fix under-estimated typeless acquisition when doing depth format scaling
 2019-05-16 19:25:26 +03:00
kd-11 e02e27b2b3 rsx: Prevent out-of-bounds writes when resolving shader input textures 
- The target area can also have padding!
 2019-05-16 19:25:26 +03:00
kd-11 1c439f6198 vk: Fix some spec violations 2019-05-16 19:25:26 +03:00
kd-11 88c20afd3a rsx: Implement unaligned surface inheritance with hierachial contribution 
- Allows render targets to behave like stacked 3D views same as shader inputs are resolved
- Basically implements most of 'Read Color/Depth Buffers" option for 'free'.
- Allows splitting RTV/DSV resources if they are superceded by a partial surface
- Also allows intersecting new resources through the surface cache for proper inheritance from other scattered data
- TODO: Refactor bind_surface_as_rtt and bind_surface_as_ds to reduce asinine code duplication
 2019-05-16 19:25:26 +03:00
Nekotekina a016728a9e SPU LLVM: re-enable stack mirror 
It was disabled due to other bugs which should be fixed now.
 2019-05-16 04:12:08 +03:00
Nekotekina a69329fe02 SPU ASMJIT: Fix Giga mode 
This is embarassing.
Fixed local instruction table computation (indirect branch).
 2019-05-16 04:11:05 +03:00
Nekotekina 26d131ef29 SPU LLVM: Fix Giga mode 
Forgot to adjust global chunk table computation.
 2019-05-16 04:02:33 +03:00
Nekotekina 91897fa69d SPU LLVM/ASMJIT: fix BRA/BRASL instructions for PIC 
Handle absolute branch addressing correctly.
 2019-05-16 02:41:31 +03:00
Nekotekina f95ec8a37c SPU LLVM: simplify jump table computation 
Remove one add operation and adjust constants instead.
 2019-05-16 00:54:50 +03:00
Nekotekina b138d25b97 SPU Disasm: fix absolute addressing in some instructions. 
STQA, LQA, BRA, BRASL instructions.
 2019-05-16 00:53:37 +03:00
Nekotekina a921af1e96 SPU LLVM/ASMJIT: remove minor unnecessary code 2019-05-16 00:52:52 +03:00
Nekotekina 43ae4b3f33 SPU LLVM/ASMJIT: add missing PC clamping 
Minor fix, since it's mostly impossible to overflow.
 2019-05-16 00:51:47 +03:00
Nekotekina 007108100e SPU: implement spu_runtime::g_tail_escape 
May help to avoid gateway costs in some cases.
 2019-05-15 18:47:40 +03:00
Nekotekina 4e75d2c2f7 SPU LLVM: don't save $2 in optimized functions 2019-05-15 16:41:57 +03:00
Nekotekina adc7d96683 SPU LLVM: simplify function prototype 
Pass only $3
 2019-05-15 16:18:13 +03:00
Nekotekina 16401722f1 SPU LLVM: fix $SP passing in functions, write PC on halt 
Allows to skip updating $SP in optimizable functions.
 2019-05-15 15:42:03 +03:00
Nekotekina b2d0ca83fb LLVM DSL: simplify value_t template for array 2019-05-15 15:17:36 +03:00
Nekotekina 09eb633f69 SPU ASMJIT: increase stack frame size 
It seems Windows has minimal stack frame size 0x28.
 2019-05-15 02:16:08 +03:00
Nekotekina 3753d27aba SPU: fix Giga mode (kinda) 
Don't scan before the entry point.
Disable stack mirror in SPU LLVM.
Improve analyser logic for holes.
 2019-05-14 22:15:04 +03:00
Nekotekina c481472faf SPU ASMJIT: add PIC support (fix) 
Also cleanup and adapt for GHC CC.
 2019-05-14 22:15:04 +03:00
Nekotekina 82295d131a SPU LLVM: split LLVM IR dump to spu-ir.log 
Also move disasm to spu_recompiler_base::dump.
Interleave disasm with block target info for convenience.
 2019-05-14 22:15:04 +03:00
Nekotekina ea554ae828 Implement 'Max SPURS Threads' option (hack) 
Pauses SPURS threads beyond limit automatically if set.
 2019-05-14 22:15:04 +03:00
Nekotekina 1eed421774 SPU LLVM: use branch patchpoints again 
Renewed and adapted for PIC and all branch types.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina 2f6707d0a0 SPU LLVM: regain some efficiency 
Avoid returns from the recompiler gateway, favoring tail calls.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina f33b81545e SPU: implement recompiler gateway function in assembly 
Use GHC calling convention directly for SPU object entry points.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina a74fd27e3d SPU LLVM: fix SPU termination (spu_escape) on Windows 
Adjust restored stack pointer for the lack of tail call.
 2019-05-14 22:15:04 +03:00
Nekotekina cc8c635855 SPU: PIC support preview 
SPU ASMJIT not supported yet.
Giga mode not supported properly.
 2019-05-14 22:15:04 +03:00
z0z0z 7cf11c7637 Use setenv instead of qputenv 
A user reported issues with Qt's hidpi scaling and RPCS3. They could not disable with their own environment variable because qputenv overwrites them, setenv with 0 as third arg doesn't.
 2019-05-14 21:48:14 +03:00
drysalter 6b01c2f9f5 Further changes to Skyline and Envy 2019-05-14 09:16:45 +01:00
scribam 22f61caf9f GLTexture: add missing #pragma once directive 2019-05-12 18:32:11 +03:00
scribam 786dc6ef40 Use if constexpr in hash_struct function 2019-05-12 18:32:11 +03:00
scribam 6c5ea068c9 Remove redundant semicolons 
Fix "-Wextra-semi" warnings
 2019-05-12 18:32:11 +03:00
Rui Pinheiro 1f82a26a9c SPU LLVM: Fix Mega 2019-05-12 00:39:42 +03:00
scribam 3623f4343f gl/vk: clear scissor_setup_invalid bit along with scissor_config_state_dirty bit 2019-05-11 13:13:49 +03:00
Nekotekina 8194c92f1c SPU LLVM: disable GHC CC for chunks on Windows 
Causes fatal error inside LLVM.
 2019-05-11 02:35:16 +03:00
Nekotekina 5d33d9a3d9 Enable most warnings in GCC 2019-05-11 02:13:19 +03:00
Nekotekina 7492f335e9 SPU analyser: basic function detection in Giga mode 
Misc: fix EH frame registration (LLVM, non-Windows).
Misc: constant-folding bitcast (cpu_translator).
Misc: add syntax for LLVM arrays (cpu_translator).
Misc: use function names for proper linkage (SPU LLVM).

Changed function search and verification in Giga mode.
Basic stack frame layout analysis.
Function detection in Giga mode.
Basic use of new information in SPU LLVM.
Fixed jump table compilation in SPU LLVM.
Disable broken optimization in Accurate xfloat mode.
Make compiled SPU modules position-independent in SPU LLVM.

Optimizations include but not limited to:
 * Compiling SPU functions as native functions when eligible
 * Avoiding register context write-out
 * Aligned stack assumption (CWD alike instruction)
 2019-05-11 02:13:19 +03:00
Megamouse fce9d6a7b8 Qt/input: add LED color picker to pad settings dialog 2019-05-09 22:02:00 +02:00
eladash 7ead021aa7 rsx: Fix 3d swizzled texture to linear conversation 2019-05-08 23:48:39 +03:00