mirror of https://github.com/RPCS3/rpcs3.git
SPU LLVM: Optimize spu_idisable
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@ -2607,6 +2607,12 @@ void spu_recompiler::BI(spu_opcode_t op)
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{
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{
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spu_log.error("[0x%x] BI: no targets", m_pos);
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spu_log.error("[0x%x] BI: no targets", m_pos);
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}
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}
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else if (op.d && found->second.size() == 1 && found->second[0] == spu_branch_target(m_pos, 1))
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{
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// Interrupts-disable pattern
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c->mov(SPU_OFF_8(interrupts_enabled), 0);
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return;
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}
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c->mov(*addr, SPU_OFF_32(gpr, op.ra, &v128::_u32, 3));
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c->mov(*addr, SPU_OFF_32(gpr, op.ra, &v128::_u32, 3));
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c->and_(*addr, 0x3fffc);
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c->and_(*addr, 0x3fffc);
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@ -2382,6 +2382,12 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point)
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spu_log.warning("[0x%x] At 0x%x: indirect branch to 0x%x%s", entry_point, pos, target, op.d ? " (D)" : op.e ? " (E)" : "");
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spu_log.warning("[0x%x] At 0x%x: indirect branch to 0x%x%s", entry_point, pos, target, op.d ? " (D)" : op.e ? " (E)" : "");
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if (type == spu_itype::BI && target == pos + 4 && op.d)
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{
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// Disable interrupts idiom
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break;
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}
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m_targets[pos].push_back(target);
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m_targets[pos].push_back(target);
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if (g_cfg.core.spu_block_size == spu_block_size_type::giga)
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if (g_cfg.core.spu_block_size == spu_block_size_type::giga)
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@ -10870,6 +10876,13 @@ public:
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// Create jump table if necessary (TODO)
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// Create jump table if necessary (TODO)
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const auto tfound = m_targets.find(m_pos);
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const auto tfound = m_targets.find(m_pos);
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if (op.d && tfound != m_targets.end() && tfound->second.size() == 1 && tfound->second[0] == spu_branch_target(m_pos, 1))
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{
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// Interrupts-disable pattern
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m_ir->CreateStore(m_ir->getFalse(), spu_ptr<bool>(&spu_thread::interrupts_enabled));
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return;
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}
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if (!op.d && !op.e && tfound != m_targets.end() && tfound->second.size() > 1)
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if (!op.d && !op.e && tfound != m_targets.end() && tfound->second.size() > 1)
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{
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{
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// Shift aligned address for switch
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// Shift aligned address for switch
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