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core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt

This commit is contained in:
zilmar 2024-11-21 21:33:42 +10:30
parent 315d5b9e66
commit fd05d9f42f
1 changed files with 6 additions and 1 deletions
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7
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
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@ -9773,8 +9773,13 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, con
{ {
if (ValueSize == 32 && m_Instruction.WritesGPR() > 0) if (ValueSize == 32 && m_Instruction.WritesGPR() > 0)
{ {
int32_t LoadReg = m_Opcode.rt == m_Opcode.base ? m_Opcode.base : -1;
if (m_Opcode.op == R4300i_LWL || m_Opcode.op == R4300i_LWR)
{
LoadReg = m_Opcode.rt;
}
m_RegWorkingSet.ProtectGPR(m_Opcode.base); m_RegWorkingSet.ProtectGPR(m_Opcode.base);
m_RegWorkingSet.Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt != m_Opcode.base ? -1 : m_Opcode.base); m_RegWorkingSet.Map_GPR_32bit(m_Opcode.rt, true, LoadReg);
} }
asmjit::Label Load64AddrDone; asmjit::Label Load64AddrDone;
if (ValueSize == 32 && m_RegWorkingSet.IsMapped(m_Opcode.base) && m_RegWorkingSet.Is32Bit(m_Opcode.base) && !m_RegWorkingSet.IsSigned(m_Opcode.base)) if (ValueSize == 32 && m_RegWorkingSet.IsMapped(m_Opcode.base) && m_RegWorkingSet.Is32Bit(m_Opcode.base) && !m_RegWorkingSet.IsSigned(m_Opcode.base))