Core: On unmap base addresses reset to the correct address
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@ -1048,6 +1048,10 @@ void CMipsMemoryVM::ClearMemoryWriteMap(uint32_t VAddr, uint32_t Length)
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uint32_t PAddr = m_TLB_WriteMap[VAddr >> 12] + VAddr;
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for (uint32_t i = PAddr, n = (PAddr + (Length & ~0xFFF)) + 0x1000; i < n; i += 0x1000)
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{
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if ((i + 0x80000000) >> 12 == 0x00080290)
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{
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__debugbreak();
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}
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m_MemoryWriteMap[(i + 0x80000000) >> 12] = (size_t)-1;
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m_MemoryWriteMap[(i + 0xA0000000) >> 12] = (size_t)-1;
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}
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@ -1137,11 +1141,35 @@ void CMipsMemoryVM::TLB_Unmaped(uint32_t Vaddr, uint32_t Len)
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for (uint64_t Address = Vaddr; Address < End && Address >= Vaddr; Address += 0x1000)
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{
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size_t Index = (size_t)(Address >> 12);
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if (Address >= 0x80000000 && Address < 0x80000000 + m_AllocatedRdramSize)
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{
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m_MemoryReadMap[Address >> 12] = (size_t)((m_RDRAM + (Address & 0x1FFFFFFF)) - Address);
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m_MemoryWriteMap[Address >> 12] = (size_t)((m_RDRAM + (Address & 0x1FFFFFFF)) - Address);
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m_TLB_ReadMap[Address >> 12] = (uint32_t)((Address & 0x1FFFFFFF) - Address);
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m_TLB_WriteMap[Address >> 12] = (uint32_t)((Address & 0x1FFFFFFF) - Address);
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}
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else if (Address >= 0xA0000000 && Address < 0xA0000000 + m_AllocatedRdramSize)
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{
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m_MemoryReadMap[Address >> 12] = (size_t)((m_RDRAM + (Address & 0x1FFFFFFF)) - Address);
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m_MemoryWriteMap[Address >> 12] = (size_t)((m_RDRAM + (Address & 0x1FFFFFFF)) - Address);
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m_TLB_ReadMap[Address >> 12] = (uint32_t)((Address & 0x1FFFFFFF) - Address);
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m_TLB_WriteMap[Address >> 12] = (uint32_t)((Address & 0x1FFFFFFF) - Address);
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}
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else if (Address >= 0x80000000 && Address < 0xC0000000)
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{
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m_MemoryReadMap[Index] = (size_t)-1;
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m_MemoryWriteMap[Index] = (size_t)-1;
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m_TLB_ReadMap[Address >> 12] = (uint32_t)((Address & 0x1FFFFFFF) - Address);
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m_TLB_WriteMap[Address >> 12] = (uint32_t)((Address & 0x1FFFFFFF) - Address);
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}
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else
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{
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m_MemoryReadMap[Index] = (size_t)-1;
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m_MemoryWriteMap[Index] = (size_t)-1;
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m_TLB_ReadMap[Index] = (uint32_t)-1;
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m_TLB_WriteMap[Index] = (uint32_t)-1;
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}
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}
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}
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void CMipsMemoryVM::RdramChanged(CMipsMemoryVM * _this)
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