Core: Switch to use asmjit registers in recompiler
This commit is contained in:
parent
0e1a72a0b1
commit
529812fdca
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@ -27,6 +27,7 @@
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<ItemDefinitionGroup>
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<ClCompile>
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<PrecompiledHeader>NotUsing</PrecompiledHeader>
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<AdditionalIncludeDirectories>$(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
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</ClCompile>
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</ItemDefinitionGroup>
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<ItemGroup>
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@ -0,0 +1,12 @@
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#pragma once
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#define ASMJIT_STATIC
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#ifdef new
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#pragma push_macro("new")
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#undef new
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#include <asmjit\asmjit.h>
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#pragma pop_macro("new")
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#else
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#include <asmjit\asmjit.h>
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#endif
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File diff suppressed because it is too large
Load Diff
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@ -4,6 +4,7 @@
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#include <Project64-core/N64System/Interpreter/InterpreterOps.h>
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#include <Project64-core/N64System/Mips/R4300iOpcode.h>
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#include <Project64-core/N64System/Mips/Register.h>
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#include <Project64-core/N64System/Recompiler/asmjit.h>
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#include <Project64-core/N64System/Recompiler/ExitInfo.h>
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#include <Project64-core/N64System/Recompiler/JumpInfo.h>
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#include <Project64-core/N64System/Recompiler/RecompilerOps.h>
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@ -210,9 +211,9 @@ public:
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void FoundMemoryBreakpoint();
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void PreReadInstruction();
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void PreWriteInstruction();
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void TestWriteBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName);
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void TestReadBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName);
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void TestBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName);
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void TestWriteBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
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void TestReadBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
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void TestBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
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void EnterCodeBlock();
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void ExitCodeBlock();
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void CompileExitCode();
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@ -236,9 +237,9 @@ public:
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void PostCompileOpcode(void);
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason);
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void CompileReadTLBMiss(uint32_t VirtualAddress, CX86Ops::x86Reg LookUpReg);
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void CompileReadTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg);
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void CompileWriteTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg);
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void CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg);
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void CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
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void CompileWriteTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
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void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles);
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void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
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void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);
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@ -283,11 +284,11 @@ public:
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{
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return m_RegWorkingSet.GetMipsRegHi_S(Reg);
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}
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CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg)
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asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegMapLo(Reg);
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}
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CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg)
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asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegMapHi(Reg);
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}
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@ -362,11 +363,11 @@ public:
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m_RegWorkingSet.UnMap_FPR(Reg, WriteBackValue);
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}
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CX86Ops::x86Reg FreeX86Reg()
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const asmjit::x86::Gp & FreeX86Reg()
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{
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return m_RegWorkingSet.FreeX86Reg();
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}
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CX86Ops::x86Reg Free8BitX86Reg()
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const asmjit::x86::Gp & Free8BitX86Reg()
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{
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return m_RegWorkingSet.Free8BitX86Reg();
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}
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@ -378,15 +379,15 @@ public:
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{
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m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad);
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}
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CX86Ops::x86Reg Get_MemoryStack()
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asmjit::x86::Gp Get_MemoryStack()
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{
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return m_RegWorkingSet.Get_MemoryStack();
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}
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CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true)
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asmjit::x86::Gp Map_MemoryStack(const asmjit::x86::Gp & Reg, bool bMapRegister, bool LoadValue = true)
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{
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return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue);
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}
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CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
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asmjit::x86::Gp Map_TempReg(const asmjit::x86::Gp & Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
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{
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return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord, Reg8Bit);
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}
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@ -402,7 +403,7 @@ public:
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{
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m_RegWorkingSet.ResetX86Protection();
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}
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CX86Ops::x86Reg UnMap_TempReg()
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const asmjit::x86::Gp & UnMap_TempReg()
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{
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return m_RegWorkingSet.UnMap_TempReg();
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}
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@ -410,7 +411,7 @@ public:
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{
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m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue);
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}
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bool UnMap_X86reg(CX86Ops::x86Reg Reg)
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bool UnMap_X86reg(const asmjit::x86::Gp & Reg)
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{
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return m_RegWorkingSet.UnMap_X86reg(Reg);
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}
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@ -425,19 +426,19 @@ private:
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CX86RecompilerOps(const CX86RecompilerOps &);
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CX86RecompilerOps & operator=(const CX86RecompilerOps &);
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CX86Ops::x86Reg BaseOffsetAddress(bool UseBaseRegister);
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void CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint8_t ValueSize, bool SignExtend);
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void CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint64_t Value, uint8_t ValueSize);
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asmjit::x86::Gp BaseOffsetAddress(bool UseBaseRegister);
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void CompileLoadMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend);
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void CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint64_t Value, uint8_t ValueSize);
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void SB_Const(uint32_t Value, uint32_t Addr);
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void SB_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
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void SB_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
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void SH_Const(uint32_t Value, uint32_t Addr);
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void SH_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
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void SH_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
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void SW_Const(uint32_t Value, uint32_t Addr);
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void SW_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
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void LB_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend);
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void LH_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend);
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void LW_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr);
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void SW_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
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void LB_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend);
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void LH_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend);
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void LW_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr);
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void LW(bool ResultSigned, bool bRecordLLBit);
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void SW(bool bCheckLLbit);
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * Label, uint32_t Value));
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@ -14,38 +14,35 @@ uint32_t CX86RegInfo::m_fpuControl = 0;
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const char * Format_Name[] = {"Unknown", "dword", "qword", "float", "double"};
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x86RegIndex GetIndexFromX86Reg(const CX86Ops::x86Reg & Reg)
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x86RegIndex GetIndexFromX86Reg(const asmjit::x86::Gp & Reg)
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{
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switch (Reg)
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{
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case CX86Ops::x86_EAX: return x86RegIndex_EAX;
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case CX86Ops::x86_EBX: return x86RegIndex_EBX;
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case CX86Ops::x86_ECX: return x86RegIndex_ECX;
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case CX86Ops::x86_EDX: return x86RegIndex_EDX;
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case CX86Ops::x86_ESI: return x86RegIndex_ESI;
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case CX86Ops::x86_EDI: return x86RegIndex_EDI;
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case CX86Ops::x86_EBP: return x86RegIndex_EBP;
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case CX86Ops::x86_ESP: return x86RegIndex_ESP;
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}
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if (Reg == asmjit::x86::eax) { return x86RegIndex_EAX; }
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if (Reg == asmjit::x86::ebx) { return x86RegIndex_EBX; }
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if (Reg == asmjit::x86::ecx) { return x86RegIndex_ECX; }
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if (Reg == asmjit::x86::edx) { return x86RegIndex_EDX; }
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if (Reg == asmjit::x86::esi) { return x86RegIndex_ESI; }
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if (Reg == asmjit::x86::edi) { return x86RegIndex_EDI; }
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if (Reg == asmjit::x86::ebp) { return x86RegIndex_EBP; }
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if (Reg == asmjit::x86::esp) { return x86RegIndex_ESP; }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return x86RegIndex_EAX;
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}
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CX86Ops::x86Reg GetX86RegFromIndex(x86RegIndex Index)
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asmjit::x86::Gp GetX86RegFromIndex(x86RegIndex Index)
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{
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switch (Index)
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{
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case x86RegIndex_EAX: return CX86Ops::x86_EAX;
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case x86RegIndex_ECX: return CX86Ops::x86_ECX;
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case x86RegIndex_EDX: return CX86Ops::x86_EDX;
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case x86RegIndex_EBX: return CX86Ops::x86_EBX;
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case x86RegIndex_ESP: return CX86Ops::x86_ESP;
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case x86RegIndex_EBP: return CX86Ops::x86_EBP;
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case x86RegIndex_ESI: return CX86Ops::x86_ESI;
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case x86RegIndex_EDI: return CX86Ops::x86_EDI;
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case x86RegIndex_EAX: return asmjit::x86::eax;
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case x86RegIndex_EBX: return asmjit::x86::ebx;
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case x86RegIndex_ECX: return asmjit::x86::ecx;
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case x86RegIndex_EDX: return asmjit::x86::edx;
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case x86RegIndex_ESP: return asmjit::x86::esp;
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case x86RegIndex_EBP: return asmjit::x86::ebp;
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case x86RegIndex_ESI: return asmjit::x86::esi;
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case x86RegIndex_EDI: return asmjit::x86::edi;
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}
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return CX86Ops::x86_Unknown;
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return x86Reg_Unknown;
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}
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CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
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{
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for (int32_t i = 0; i < 32; i++)
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{
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m_RegMapLo[i] = CX86Ops::x86_Unknown;
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m_RegMapHi[i] = CX86Ops::x86_Unknown;
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m_RegMapLo[i] = x86Reg_Unknown;
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m_RegMapHi[i] = x86Reg_Unknown;
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}
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for (int32_t i = 0; i < x86RegIndex_Size; i++)
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{
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@ -208,7 +205,7 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
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m_fpuControl = 0;
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m_Assembler.fpuStoreControl(&m_fpuControl, "m_fpuControl");
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CX86Ops::x86Reg reg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
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asmjit::x86::Gp reg = Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(reg, &m_fpuControl, "m_fpuControl");
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m_Assembler.AndConstToX86Reg(reg, 0xF3FF);
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@ -223,14 +220,14 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
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0x00000100, //_RC_DOWN
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};
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CX86Ops::x86Reg RoundReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
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asmjit::x86::Gp RoundReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(RoundReg, &g_Reg->m_RoundingModel, "m_RoundingModel");
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m_Assembler.MoveVariableDispToX86Reg(RoundReg, (void *)&msRound[0], "msRound", RoundReg, CX86Ops::Multip_x4);
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m_Assembler.ShiftLeftSignImmed(RoundReg, 2);
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m_Assembler.OrX86RegToX86Reg(reg, RoundReg);
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#else
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CX86Ops::x86Reg RoundReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
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asmjit::x86::Gp RoundReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(RoundReg, _RoundingModel, "_RoundingModel");
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m_Assembler.OrX86RegToX86Reg(reg, RoundReg);
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#endif
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@ -435,7 +432,7 @@ void CX86RegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Forma
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}
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}
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m_CodeBlock.Log(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
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CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
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asmjit::x86::Gp TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
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switch (Format)
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{
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case FPU_Dword:
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@ -480,35 +477,35 @@ CX86Ops::x86FpuValues CX86RegInfo::StackPosition(int32_t Reg)
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return CX86Ops::x86_ST_Unknown;
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}
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CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
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asmjit::x86::Gp CX86RegInfo::FreeX86Reg()
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{
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if (GetX86Mapped(x86RegIndex_EDI) == NotMapped && !GetX86Protected(x86RegIndex_EDI))
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{
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return CX86Ops::x86_EDI;
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return asmjit::x86::edi;
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}
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if (GetX86Mapped(x86RegIndex_ESI) == NotMapped && !GetX86Protected(x86RegIndex_ESI))
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{
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return CX86Ops::x86_ESI;
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return asmjit::x86::esi;
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}
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if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX))
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{
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return CX86Ops::x86_EBX;
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return asmjit::x86::ebx;
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}
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if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX))
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{
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return CX86Ops::x86_EAX;
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return asmjit::x86::eax;
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}
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if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX))
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{
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return CX86Ops::x86_EDX;
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return asmjit::x86::edx;
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}
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if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX))
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{
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return CX86Ops::x86_ECX;
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return asmjit::x86::ecx;
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}
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CX86Ops::x86Reg Reg = UnMap_TempReg();
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if (Reg != CX86Ops::x86_Unknown)
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asmjit::x86::Gp Reg = UnMap_TempReg();
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if (Reg.isValid())
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{
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return Reg;
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}
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@ -537,14 +534,15 @@ CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
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}
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}
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CX86Ops::x86Reg StackReg = CX86Ops::x86_Unknown;
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asmjit::x86::Gp StackReg;
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for (int i = 0; i < x86RegIndex_Size; i++)
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{
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if (MapCount[i] > 0 && GetX86Mapped(MapReg[i]) != Stack_Mapped)
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{
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if (UnMap_X86reg((CX86Ops::x86Reg)MapReg[i]))
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Reg = GetX86RegFromIndex(MapReg[i]);
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if (UnMap_X86reg(Reg))
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{
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return (CX86Ops::x86Reg)MapReg[i];
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return Reg;
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}
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}
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if (GetX86Mapped(MapReg[i]) == Stack_Mapped)
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@ -552,42 +550,42 @@ CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
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StackReg = GetX86RegFromIndex(MapReg[i]);
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}
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}
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if (StackReg != CX86Ops::x86_Unknown)
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if (StackReg.isValid())
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{
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UnMap_X86reg(StackReg);
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return StackReg;
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}
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return CX86Ops::x86_Unknown;
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return x86Reg_Unknown;
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}
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CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
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asmjit::x86::Gp CX86RegInfo::Free8BitX86Reg()
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{
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if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX))
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{
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return CX86Ops::x86_EBX;
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return asmjit::x86::ebx;
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}
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if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX))
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{
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return CX86Ops::x86_EAX;
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return asmjit::x86::eax;
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}
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if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX))
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{
|
||||
return CX86Ops::x86_EDX;
|
||||
return asmjit::x86::edx;
|
||||
}
|
||||
if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX))
|
||||
{
|
||||
return CX86Ops::x86_ECX;
|
||||
return asmjit::x86::ecx;
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg Reg = UnMap_8BitTempReg();
|
||||
if (Reg > 0)
|
||||
asmjit::x86::Gp Reg = UnMap_8BitTempReg();
|
||||
if (Reg.isValid())
|
||||
{
|
||||
return Reg;
|
||||
}
|
||||
|
||||
uint32_t MapCount[10];
|
||||
x86RegIndex MapReg[10];
|
||||
uint32_t MapCount[x86RegIndex_Size];
|
||||
x86RegIndex MapReg[x86RegIndex_Size];
|
||||
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
|
||||
{
|
||||
MapCount[i] = GetX86MapOrder((x86RegIndex)i);
|
||||
|
@ -595,7 +593,7 @@ CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
|
|||
}
|
||||
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
|
||||
{
|
||||
for (uint32_t z = 0; z < x86RegIndex_Size; z++)
|
||||
for (uint32_t z = 0; z < x86RegIndex_Size - 1; z++)
|
||||
{
|
||||
if (MapCount[z] < MapCount[z + 1])
|
||||
{
|
||||
|
@ -612,20 +610,20 @@ CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
|
|||
{
|
||||
if (MapCount[i] > 0)
|
||||
{
|
||||
if (!CX86Ops::Is8BitReg((CX86Ops::x86Reg)i))
|
||||
if (!CX86Ops::Is8BitReg(GetX86RegFromIndex((x86RegIndex)i)))
|
||||
{
|
||||
continue;
|
||||
}
|
||||
if (UnMap_X86reg((CX86Ops::x86Reg)i))
|
||||
if (UnMap_X86reg(GetX86RegFromIndex((x86RegIndex)i)))
|
||||
{
|
||||
return (CX86Ops::x86Reg)i;
|
||||
return GetX86RegFromIndex((x86RegIndex)i);
|
||||
}
|
||||
}
|
||||
}
|
||||
return CX86Ops::x86_Unknown;
|
||||
return x86Reg_Unknown;
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg()
|
||||
asmjit::x86::Gp CX86RegInfo::UnMap_8BitTempReg()
|
||||
{
|
||||
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
|
||||
{
|
||||
|
@ -643,10 +641,10 @@ CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg()
|
|||
}
|
||||
}
|
||||
}
|
||||
return CX86Ops::x86_Unknown;
|
||||
return x86Reg_Unknown;
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg CX86RegInfo::Get_MemoryStack() const
|
||||
asmjit::x86::Gp CX86RegInfo::Get_MemoryStack() const
|
||||
{
|
||||
for (int32_t i = 0, n = x86RegIndex_Size; i < n; i++)
|
||||
{
|
||||
|
@ -655,32 +653,32 @@ CX86Ops::x86Reg CX86RegInfo::Get_MemoryStack() const
|
|||
return GetX86RegFromIndex((x86RegIndex)i);
|
||||
}
|
||||
}
|
||||
return CX86Ops::x86_Unknown;
|
||||
return x86Reg_Unknown;
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue)
|
||||
asmjit::x86::Gp CX86RegInfo::Map_MemoryStack(asmjit::x86::Gp Reg, bool bMapRegister, bool LoadValue)
|
||||
{
|
||||
CX86Ops::x86Reg CurrentMap = Get_MemoryStack();
|
||||
asmjit::x86::Gp CurrentMap = Get_MemoryStack();
|
||||
if (!bMapRegister)
|
||||
{
|
||||
// If not mapping then just return what the current mapping is
|
||||
return CurrentMap;
|
||||
}
|
||||
|
||||
if (CurrentMap != CX86Ops::x86_Unknown && CurrentMap == Reg)
|
||||
if (CurrentMap.isValid() && CurrentMap == Reg)
|
||||
{
|
||||
// Already mapped to correct register
|
||||
return CurrentMap;
|
||||
}
|
||||
// Map a register
|
||||
if (Reg == CX86Ops::x86_Unknown)
|
||||
if (!Reg.isValid())
|
||||
{
|
||||
if (CurrentMap != CX86Ops::x86_Unknown)
|
||||
if (CurrentMap.isValid())
|
||||
{
|
||||
return CurrentMap;
|
||||
}
|
||||
Reg = FreeX86Reg();
|
||||
if (Reg == CX86Ops::x86_Unknown)
|
||||
if (!Reg.isValid())
|
||||
{
|
||||
g_Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
|
@ -696,7 +694,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegis
|
|||
|
||||
// Move to a register/allocate register
|
||||
UnMap_X86reg(Reg);
|
||||
if (CurrentMap != CX86Ops::x86_Unknown)
|
||||
if (CurrentMap.isValid())
|
||||
{
|
||||
m_CodeBlock.Log(" regcache: change allocation of memory stack from %s to %s", CX86Ops::x86_Name(CurrentMap), CX86Ops::x86_Name(Reg));
|
||||
SetX86Mapped(GetIndexFromX86Reg(Reg), CX86RegInfo::Stack_Mapped);
|
||||
|
@ -717,7 +715,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegis
|
|||
|
||||
void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad)
|
||||
{
|
||||
CX86Ops::x86Reg Reg;
|
||||
asmjit::x86::Gp Reg;
|
||||
if (MipsReg == 0)
|
||||
{
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
|
@ -727,7 +725,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
|
|||
if (IsUnknown(MipsReg) || IsConst(MipsReg))
|
||||
{
|
||||
Reg = FreeX86Reg();
|
||||
if (Reg < 0)
|
||||
if (Reg.isNone())
|
||||
{
|
||||
if (HaveDebugger())
|
||||
{
|
||||
|
@ -751,12 +749,11 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
|
|||
}
|
||||
Reg = GetMipsRegMapLo(MipsReg);
|
||||
}
|
||||
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
|
||||
for (int i = 0; i < sizeof(m_x86reg_MapOrder) / sizeof(m_x86reg_MapOrder[0]); i++)
|
||||
{
|
||||
uint32_t MapOrder = GetX86MapOrder((x86RegIndex)i);
|
||||
if (MapOrder > 0)
|
||||
if (m_x86reg_MapOrder[i] > 0)
|
||||
{
|
||||
SetX86MapOrder((x86RegIndex)i, MapOrder);
|
||||
m_x86reg_MapOrder[i] += 1;
|
||||
}
|
||||
}
|
||||
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
|
||||
|
@ -792,7 +789,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
|
|||
|
||||
void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
||||
{
|
||||
CX86Ops::x86Reg x86Hi = CX86Ops::x86_Unknown, x86lo = CX86Ops::x86_Unknown;
|
||||
asmjit::x86::Gp x86Hi, x86lo;
|
||||
if (MipsReg == 0)
|
||||
{
|
||||
if (HaveDebugger())
|
||||
|
@ -806,7 +803,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
|||
if (IsUnknown(MipsReg) || IsConst(MipsReg))
|
||||
{
|
||||
x86Hi = FreeX86Reg();
|
||||
if (x86Hi < 0)
|
||||
if (!x86Hi.isValid())
|
||||
{
|
||||
if (HaveDebugger())
|
||||
{
|
||||
|
@ -817,7 +814,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
|||
SetX86Protected(GetIndexFromX86Reg(x86Hi), true);
|
||||
|
||||
x86lo = FreeX86Reg();
|
||||
if (x86lo < 0)
|
||||
if (!x86lo.isValid())
|
||||
{
|
||||
g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers");
|
||||
return;
|
||||
|
@ -834,7 +831,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
|||
{
|
||||
SetX86Protected(GetIndexFromX86Reg(x86lo), true);
|
||||
x86Hi = FreeX86Reg();
|
||||
if (x86Hi == CX86Ops::x86_Unknown)
|
||||
if (!x86Hi.isValid())
|
||||
{
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
return;
|
||||
|
@ -927,81 +924,81 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
|
|||
SetMipsRegState(MipsReg, STATE_MAPPED_64);
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
|
||||
asmjit::x86::Gp CX86RegInfo::Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
|
||||
{
|
||||
if (!Reg8Bit && Reg == CX86Ops::x86_Unknown)
|
||||
if (!Reg8Bit && !Reg.isValid())
|
||||
{
|
||||
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EAX;
|
||||
Reg = asmjit::x86::eax;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EBX;
|
||||
Reg = asmjit::x86::ebx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
|
||||
{
|
||||
Reg = CX86Ops::x86_ECX;
|
||||
Reg = asmjit::x86::ecx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EDX;
|
||||
Reg = asmjit::x86::edx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI))
|
||||
{
|
||||
Reg = CX86Ops::x86_ESI;
|
||||
Reg = asmjit::x86::esi;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI))
|
||||
{
|
||||
Reg = CX86Ops::x86_EDI;
|
||||
Reg = asmjit::x86::edi;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP))
|
||||
{
|
||||
Reg = CX86Ops::x86_EBP;
|
||||
Reg = asmjit::x86::ebp;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP))
|
||||
{
|
||||
Reg = CX86Ops::x86_ESP;
|
||||
Reg = asmjit::x86::esp;
|
||||
}
|
||||
|
||||
if (Reg == CX86Ops::x86_Unknown)
|
||||
if (!Reg.isValid())
|
||||
{
|
||||
Reg = FreeX86Reg();
|
||||
if (Reg == CX86Ops::x86_Unknown)
|
||||
if (!Reg.isValid())
|
||||
{
|
||||
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
return CX86Ops::x86_Unknown;
|
||||
return x86Reg_Unknown;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (Reg8Bit && Reg == CX86Ops::x86_Unknown)
|
||||
else if (Reg8Bit && !Reg.isValid())
|
||||
{
|
||||
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EAX;
|
||||
Reg = asmjit::x86::eax;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EBX;
|
||||
Reg = asmjit::x86::ebx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
|
||||
{
|
||||
Reg = CX86Ops::x86_ECX;
|
||||
Reg = asmjit::x86::ecx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EDX;
|
||||
Reg = asmjit::x86::edx;
|
||||
}
|
||||
|
||||
if (Reg == CX86Ops::x86_Unknown)
|
||||
if (!Reg.isValid())
|
||||
{
|
||||
Reg = Free8BitX86Reg();
|
||||
if (Reg < 0)
|
||||
if (!Reg.isValid())
|
||||
{
|
||||
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free 8-bit register");
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
return CX86Ops::x86_Unknown;
|
||||
return x86Reg_Unknown;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1011,11 +1008,11 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
|
|||
{
|
||||
WriteTrace(TraceRegisterCache, TraceError, "Register is protected");
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
return CX86Ops::x86_Unknown;
|
||||
return x86Reg_Unknown;
|
||||
}
|
||||
|
||||
SetX86Protected(GetIndexFromX86Reg(Reg), true);
|
||||
CX86Ops::x86Reg NewReg = FreeX86Reg();
|
||||
asmjit::x86::Gp NewReg = FreeX86Reg();
|
||||
for (uint32_t i = 1; i < 32; i++)
|
||||
{
|
||||
if (!IsMapped(i))
|
||||
|
@ -1024,7 +1021,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
|
|||
}
|
||||
if (GetMipsRegMapLo(i) == Reg)
|
||||
{
|
||||
if (NewReg == CX86Ops::x86_Unknown)
|
||||
if (!NewReg.isValid())
|
||||
{
|
||||
UnMap_GPR(i, true);
|
||||
break;
|
||||
|
@ -1042,7 +1039,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
|
|||
}
|
||||
if (Is64Bit(i) && GetMipsRegMapHi(i) == Reg)
|
||||
{
|
||||
if (NewReg == CX86Ops::x86_Unknown)
|
||||
if (!NewReg.isValid())
|
||||
{
|
||||
UnMap_GPR(i, true);
|
||||
break;
|
||||
|
@ -1118,8 +1115,9 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
|
|||
}
|
||||
}
|
||||
}
|
||||
SetX86Mapped(GetIndexFromX86Reg(Reg), Temp_Mapped);
|
||||
SetX86Protected(GetIndexFromX86Reg(Reg), true);
|
||||
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
|
||||
SetX86Mapped(RegIndex, Temp_Mapped);
|
||||
SetX86Protected(RegIndex, true);
|
||||
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
|
||||
{
|
||||
int32_t MapOrder = GetX86MapOrder((x86RegIndex)i);
|
||||
|
@ -1128,7 +1126,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
|
|||
SetX86MapOrder((x86RegIndex)i, MapOrder + 1);
|
||||
}
|
||||
}
|
||||
SetX86MapOrder(GetIndexFromX86Reg(Reg), 1);
|
||||
SetX86MapOrder(RegIndex, 1);
|
||||
return Reg;
|
||||
}
|
||||
|
||||
|
@ -1253,7 +1251,7 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
|
|||
FixRoundModel(FpuRoundingModel(i));
|
||||
|
||||
RegPos = StackTopPos();
|
||||
CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
|
||||
asmjit::x86::Gp TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
|
||||
switch (m_x86fpu_State[StackTopPos()])
|
||||
{
|
||||
case FPU_Dword:
|
||||
|
@ -1356,9 +1354,9 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
|
|||
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegMapLo(Reg));
|
||||
if (Is64Bit(Reg))
|
||||
{
|
||||
SetMipsRegMapLo(Reg, CX86Ops::x86_Unknown);
|
||||
SetMipsRegMapLo(Reg, x86Reg_Unknown);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapHi(Reg));
|
||||
SetMipsRegMapHi(Reg, CX86Ops::x86_Unknown);
|
||||
SetMipsRegMapHi(Reg, x86Reg_Unknown);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1374,49 +1372,49 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
|
|||
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
|
||||
}
|
||||
}
|
||||
SetMipsRegMapLo(Reg, CX86Ops::x86_Unknown);
|
||||
SetMipsRegMapLo(Reg, x86Reg_Unknown);
|
||||
}
|
||||
SetMipsRegState(Reg, STATE_UNKNOWN);
|
||||
}
|
||||
|
||||
CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg()
|
||||
asmjit::x86::Gp CX86RegInfo::UnMap_TempReg()
|
||||
{
|
||||
CX86Ops::x86Reg Reg = CX86Ops::x86_Unknown;
|
||||
asmjit::x86::Gp Reg;
|
||||
|
||||
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EAX;
|
||||
Reg = asmjit::x86::eax;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EBX;
|
||||
Reg = asmjit::x86::ebx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
|
||||
{
|
||||
Reg = CX86Ops::x86_ECX;
|
||||
Reg = asmjit::x86::ecx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
|
||||
{
|
||||
Reg = CX86Ops::x86_EDX;
|
||||
Reg = asmjit::x86::edx;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI))
|
||||
{
|
||||
Reg = CX86Ops::x86_ESI;
|
||||
Reg = asmjit::x86::esi;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI))
|
||||
{
|
||||
Reg = CX86Ops::x86_EDI;
|
||||
Reg = asmjit::x86::edi;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP))
|
||||
{
|
||||
Reg = CX86Ops::x86_EBP;
|
||||
Reg = asmjit::x86::ebp;
|
||||
}
|
||||
else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP))
|
||||
{
|
||||
Reg = CX86Ops::x86_ESP;
|
||||
Reg = asmjit::x86::esp;
|
||||
}
|
||||
|
||||
if (Reg != CX86Ops::x86_Unknown)
|
||||
if (Reg.isValid())
|
||||
{
|
||||
if (GetX86Mapped(GetIndexFromX86Reg(Reg)) == Temp_Mapped)
|
||||
{
|
||||
|
@ -1427,7 +1425,7 @@ CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg()
|
|||
return Reg;
|
||||
}
|
||||
|
||||
bool CX86RegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
|
||||
bool CX86RegInfo::UnMap_X86reg(const asmjit::x86::Gp & Reg)
|
||||
{
|
||||
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
|
||||
if (GetX86Mapped(RegIndex) == NotMapped)
|
||||
|
@ -1512,21 +1510,21 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
{
|
||||
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
|
||||
{
|
||||
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
|
||||
m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
|
||||
bEdiZero = true;
|
||||
}
|
||||
if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000))
|
||||
{
|
||||
m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF);
|
||||
m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
|
||||
bEsiSign = true;
|
||||
}
|
||||
if ((GetMipsRegLo(count) & 0x80000000) != 0)
|
||||
{
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_ESI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1536,11 +1534,11 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
{
|
||||
if (!bEdiZero)
|
||||
{
|
||||
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
|
||||
m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
|
||||
bEdiZero = true;
|
||||
}
|
||||
}
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
|
||||
}
|
||||
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
|
||||
{
|
||||
|
@ -1548,11 +1546,11 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
{
|
||||
if (!bEsiSign)
|
||||
{
|
||||
m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF);
|
||||
m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
|
||||
bEsiSign = true;
|
||||
}
|
||||
}
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_ESI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1566,10 +1564,10 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
{
|
||||
if (!bEdiZero)
|
||||
{
|
||||
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
|
||||
m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
|
||||
bEdiZero = true;
|
||||
}
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
|
||||
}
|
||||
|
||||
if (GetMipsRegLo(count) == 0)
|
||||
|
@ -1578,11 +1576,11 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
{
|
||||
if (!bEdiZero)
|
||||
{
|
||||
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
|
||||
m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
|
||||
bEdiZero = true;
|
||||
}
|
||||
}
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1593,22 +1591,22 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
case CX86RegInfo::STATE_CONST_64:
|
||||
if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0)
|
||||
{
|
||||
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
|
||||
m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
|
||||
bEdiZero = true;
|
||||
}
|
||||
if (GetMipsRegLo(count) == 0xFFFFFFFF || GetMipsRegHi(count) == 0xFFFFFFFF)
|
||||
{
|
||||
m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF);
|
||||
m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
|
||||
bEsiSign = true;
|
||||
}
|
||||
|
||||
if (GetMipsRegHi(count) == 0)
|
||||
{
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
|
||||
}
|
||||
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
|
||||
{
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_ESI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1617,11 +1615,11 @@ void CX86RegInfo::WriteBackRegisters()
|
|||
|
||||
if (GetMipsRegLo(count) == 0)
|
||||
{
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
|
||||
}
|
||||
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
|
||||
{
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_ESI);
|
||||
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
#if defined(__i386__) || defined(_M_IX86)
|
||||
#include <Project64-core/N64System/Mips/Register.h>
|
||||
#include <Project64-core/N64System/Recompiler/asmjit.h>
|
||||
#include <Project64-core/N64System/Recompiler/RegBase.h>
|
||||
#include <Project64-core/N64System/Recompiler/x86/x86ops.h>
|
||||
#include <Project64-core/Settings/DebugSettings.h>
|
||||
|
@ -19,8 +20,8 @@ enum x86RegIndex
|
|||
x86RegIndex_Size,
|
||||
};
|
||||
|
||||
x86RegIndex GetIndexFromX86Reg(const CX86Ops::x86Reg & Reg);
|
||||
CX86Ops::x86Reg GetX86RegFromIndex(x86RegIndex Index);
|
||||
x86RegIndex GetIndexFromX86Reg(const asmjit::x86::Gp & Reg);
|
||||
asmjit::x86::Gp GetX86RegFromIndex(x86RegIndex Index);
|
||||
|
||||
class CX86RegInfo :
|
||||
public CRegBase,
|
||||
|
@ -69,26 +70,26 @@ public:
|
|||
void UnMap_FPR(int32_t Reg, bool WriteBackValue);
|
||||
CX86Ops::x86FpuValues StackPosition(int32_t Reg);
|
||||
|
||||
CX86Ops::x86Reg FreeX86Reg();
|
||||
CX86Ops::x86Reg Free8BitX86Reg();
|
||||
asmjit::x86::Gp FreeX86Reg();
|
||||
asmjit::x86::Gp Free8BitX86Reg();
|
||||
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
|
||||
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
|
||||
CX86Ops::x86Reg Get_MemoryStack() const;
|
||||
CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true);
|
||||
CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit);
|
||||
asmjit::x86::Gp Get_MemoryStack() const;
|
||||
asmjit::x86::Gp Map_MemoryStack(asmjit::x86::Gp Reg, bool bMapRegister, bool LoadValue = true);
|
||||
asmjit::x86::Gp Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit);
|
||||
void ProtectGPR(uint32_t MipsReg);
|
||||
void UnProtectGPR(uint32_t MipsReg);
|
||||
void ResetX86Protection();
|
||||
CX86Ops::x86Reg UnMap_TempReg();
|
||||
asmjit::x86::Gp UnMap_TempReg();
|
||||
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
|
||||
bool UnMap_X86reg(CX86Ops::x86Reg Reg);
|
||||
bool UnMap_X86reg(const asmjit::x86::Gp & Reg);
|
||||
void WriteBackRegisters();
|
||||
|
||||
CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const
|
||||
asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg) const
|
||||
{
|
||||
return m_RegMapLo[Reg];
|
||||
}
|
||||
CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const
|
||||
asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg) const
|
||||
{
|
||||
return m_RegMapHi[Reg];
|
||||
}
|
||||
|
@ -106,11 +107,11 @@ public:
|
|||
return m_x86reg_MappedTo[Reg];
|
||||
}
|
||||
|
||||
void SetMipsRegMapLo(int32_t GetMipsReg, CX86Ops::x86Reg Reg)
|
||||
void SetMipsRegMapLo(int32_t GetMipsReg, const asmjit::x86::Gp & Reg)
|
||||
{
|
||||
m_RegMapLo[GetMipsReg] = Reg;
|
||||
}
|
||||
void SetMipsRegMapHi(int32_t GetMipsReg, CX86Ops::x86Reg Reg)
|
||||
void SetMipsRegMapHi(int32_t GetMipsReg, const asmjit::x86::Gp & Reg)
|
||||
{
|
||||
m_RegMapHi[GetMipsReg] = Reg;
|
||||
}
|
||||
|
@ -150,11 +151,11 @@ private:
|
|||
|
||||
CCodeBlock & m_CodeBlock;
|
||||
CX86Ops & m_Assembler;
|
||||
CX86Ops::x86Reg UnMap_8BitTempReg();
|
||||
asmjit::x86::Gp UnMap_8BitTempReg();
|
||||
|
||||
// r4k
|
||||
CX86Ops::x86Reg m_RegMapHi[32];
|
||||
CX86Ops::x86Reg m_RegMapLo[32];
|
||||
asmjit::x86::Gp m_RegMapHi[32];
|
||||
asmjit::x86::Gp m_RegMapLo[32];
|
||||
|
||||
REG_MAPPED m_x86reg_MappedTo[x86RegIndex_Size];
|
||||
uint32_t m_x86reg_MapOrder[x86RegIndex_Size];
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,5 +1,6 @@
|
|||
#pragma once
|
||||
#if defined(__i386__) || defined(_M_IX86)
|
||||
#include <Project64-core/N64System/Recompiler/asmjit.h>
|
||||
|
||||
#if !defined(_MSC_VER) && !defined(_Printf_format_string_)
|
||||
#define _Printf_format_string_
|
||||
|
@ -7,31 +8,11 @@
|
|||
|
||||
class CCodeBlock;
|
||||
|
||||
static constexpr asmjit::x86::Gp x86Reg_Unknown = asmjit::x86::Gp();
|
||||
|
||||
class CX86Ops
|
||||
{
|
||||
public:
|
||||
enum x86Reg
|
||||
{
|
||||
x86_EAX = 0,
|
||||
x86_EBX = 3,
|
||||
x86_ECX = 1,
|
||||
x86_EDX = 2,
|
||||
x86_ESI = 6,
|
||||
x86_EDI = 7,
|
||||
x86_EBP = 5,
|
||||
x86_ESP = 4,
|
||||
x86_Unknown = -1,
|
||||
|
||||
x86_AL = 0,
|
||||
x86_BL = 3,
|
||||
x86_CL = 1,
|
||||
x86_DL = 2,
|
||||
x86_AH = 4,
|
||||
x86_BH = 7,
|
||||
x86_CH = 5,
|
||||
x86_DH = 6
|
||||
};
|
||||
|
||||
enum x86FpuValues
|
||||
{
|
||||
x86_ST_Unknown = -1,
|
||||
|
@ -53,9 +34,9 @@ public:
|
|||
Multip_x8 = 8
|
||||
};
|
||||
|
||||
static const char * x86_Name(x86Reg Reg);
|
||||
static const char * x86_ByteName(x86Reg Reg);
|
||||
static const char * x86_HalfName(x86Reg Reg);
|
||||
static const char * x86_Name(const asmjit::x86::Gp & Reg);
|
||||
static const char * x86_ByteName(const asmjit::x86::Gp & Reg);
|
||||
static const char * x86_HalfName(const asmjit::x86::Gp & Reg);
|
||||
static const char * fpu_Name(x86FpuValues Reg);
|
||||
|
||||
CX86Ops(CCodeBlock & CodeBlock);
|
||||
|
@ -65,33 +46,33 @@ public:
|
|||
void WriteX86Label(const char * Label);
|
||||
|
||||
void AdcConstToVariable(void * Variable, const char * VariableName, uint8_t Constant);
|
||||
void AdcConstToX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void AdcVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void AdcX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void AdcConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void AdcVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void AdcX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void AddConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
|
||||
void AddConstToX86Reg(x86Reg Reg, uint32_t Const, bool NeedCarry = false);
|
||||
void AddVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void AddX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg);
|
||||
void AddX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void AddConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const, bool NeedCarry = false);
|
||||
void AddVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void AddX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
|
||||
void AddX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
|
||||
void AndConstToX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void AndVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void AndVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiply);
|
||||
void AndX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void AndConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void AndVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void AndVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiply);
|
||||
void AndX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void X86HardBreakPoint();
|
||||
void X86BreakPoint(const char * FileName, int32_t LineNumber);
|
||||
void CallFunc(uint32_t FunctPtr, const char * FunctName);
|
||||
void CallThis(uint32_t ThisPtr, uint32_t FunctPtr, char * FunctName, uint32_t StackSize);
|
||||
void CompConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
|
||||
void CompConstToX86reg(x86Reg Reg, uint32_t Const);
|
||||
void CompConstToX86regPointer(x86Reg Reg, uint32_t Const);
|
||||
void CompX86regToVariable(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void CompX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void DecX86reg(x86Reg Reg);
|
||||
void DivX86reg(x86Reg Reg);
|
||||
void idivX86reg(x86Reg Reg);
|
||||
void imulX86reg(x86Reg Reg);
|
||||
void IncX86reg(x86Reg Reg);
|
||||
void CompConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void CompConstToX86regPointer(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void CompX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void DecX86reg(const asmjit::x86::Gp & Reg);
|
||||
void DivX86reg(const asmjit::x86::Gp & Reg);
|
||||
void idivX86reg(const asmjit::x86::Gp & Reg);
|
||||
void imulX86reg(const asmjit::x86::Gp & Reg);
|
||||
void IncX86reg(const asmjit::x86::Gp & Reg);
|
||||
void JaeLabel8(const char * Label, uint8_t Value);
|
||||
void JaeLabel32(const char * Label, uint32_t Value);
|
||||
void JaLabel8(const char * Label, uint8_t Value);
|
||||
|
@ -109,9 +90,9 @@ public:
|
|||
void JleLabel32(const char * Label, uint32_t Value);
|
||||
void JlLabel8(const char * Label, uint8_t Value);
|
||||
void JlLabel32(const char * Label, uint32_t Value);
|
||||
void JmpDirectReg(x86Reg Reg);
|
||||
void JmpDirectReg(const asmjit::x86::Gp & Reg);
|
||||
void JmpIndirectLabel32(const char * Label, uint32_t location);
|
||||
void JmpIndirectReg(x86Reg Reg);
|
||||
void JmpIndirectReg(const asmjit::x86::Gp & Reg);
|
||||
void JmpLabel8(const char * Label, uint8_t Value);
|
||||
void JmpLabel32(const char * Label, uint32_t Value);
|
||||
void JneLabel8(const char * Label, uint8_t Value);
|
||||
|
@ -124,107 +105,107 @@ public:
|
|||
void JsLabel32(const char * Label, uint32_t Value);
|
||||
void JzLabel8(const char * Label, uint8_t Value);
|
||||
void JzLabel32(const char * Label, uint32_t Value);
|
||||
void LeaRegReg(x86Reg RegDest, x86Reg RegSrc, uint32_t Const, Multipler multiplier);
|
||||
void LeaRegReg2(x86Reg RegDest, x86Reg RegSrc, x86Reg RegSrc2, Multipler multiplier);
|
||||
void LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t offset);
|
||||
void LeaRegReg(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, uint32_t Const, Multipler multiplier);
|
||||
void LeaRegReg2(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, const asmjit::x86::Gp & RegSrc2, Multipler multiplier);
|
||||
void LeaSourceAndOffset(const asmjit::x86::Gp & x86DestReg, const asmjit::x86::Gp & x86SourceReg, int32_t offset);
|
||||
void MoveConstByteToVariable(void * Variable, const char * VariableName, uint8_t Const);
|
||||
void MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint8_t Const);
|
||||
void MoveConstByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t Const);
|
||||
void MoveConstHalfToVariable(void * Variable, const char * VariableName, uint16_t Const);
|
||||
void MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint16_t Const);
|
||||
void MoveConstToMemoryDisp(x86Reg AddrReg, uint32_t Disp, uint32_t Const);
|
||||
void MoveConstHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint16_t Const);
|
||||
void MoveConstToMemoryDisp(const asmjit::x86::Gp & AddrReg, uint32_t Disp, uint32_t Const);
|
||||
void MoveConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
|
||||
void MoveConstToX86Pointer(x86Reg X86Pointer, uint32_t Const);
|
||||
void MoveConstToX86reg(x86Reg Reg, uint32_t Const);
|
||||
void MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_t Const);
|
||||
void MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
|
||||
void MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
|
||||
void MoveSxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void MoveSxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void MoveVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiplier);
|
||||
void MoveVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void MoveX86PointerToX86reg(x86Reg Reg, x86Reg X86Pointer);
|
||||
void MoveX86PointerToX86regDisp(x86Reg Reg, x86Reg X86Pointer, uint8_t Disp);
|
||||
void MoveX86regByteToVariable(void * Variable, const char * VariableName, x86Reg Reg);
|
||||
void MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg);
|
||||
void MoveX86regHalfToVariable(void * Variable, const char * VariableName, x86Reg Reg);
|
||||
void MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg);
|
||||
void MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
|
||||
void MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2, uint8_t offset);
|
||||
void MoveX86regToMemory(x86Reg AddrReg, uint32_t Disp, x86Reg Reg);
|
||||
void MoveX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg);
|
||||
void MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg);
|
||||
void MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg);
|
||||
void MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
|
||||
void MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
|
||||
void MoveZxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void MoveZxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void MulX86reg(x86Reg Reg);
|
||||
void NotX86Reg(x86Reg Reg);
|
||||
void MoveConstToX86Pointer(const asmjit::x86::Gp & X86Pointer, uint32_t Const);
|
||||
void MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void MoveConstToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint32_t Const);
|
||||
void MoveSxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
|
||||
void MoveSxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
|
||||
void MoveSxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void MoveSxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void MoveVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiplier);
|
||||
void MoveVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void MoveX86PointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer);
|
||||
void MoveX86PointerToX86regDisp(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer, uint8_t Disp);
|
||||
void MoveX86regByteToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86regByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86regHalfToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86regHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
|
||||
void MoveX86regPointerToX86regDisp8(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t offset);
|
||||
void MoveX86regToMemory(const asmjit::x86::Gp & AddrReg, uint32_t Disp, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void MoveX86regToX86Pointer(const asmjit::x86::Gp & X86Pointer, const asmjit::x86::Gp & Reg);
|
||||
void MoveX86regToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
|
||||
void MoveZxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
|
||||
void MoveZxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
|
||||
void MoveZxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void MoveZxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void MulX86reg(const asmjit::x86::Gp & Reg);
|
||||
void NotX86Reg(const asmjit::x86::Gp & Reg);
|
||||
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
|
||||
void OrConstToX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg);
|
||||
void OrX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void Push(x86Reg Reg);
|
||||
void OrConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void OrVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void OrX86RegToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
|
||||
void OrX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void Push(const asmjit::x86::Gp & Reg);
|
||||
void Pushad();
|
||||
void PushImm32(uint32_t Value);
|
||||
void PushImm32(const char * String, uint32_t Value);
|
||||
void Pop(x86Reg Reg);
|
||||
void Pop(const asmjit::x86::Gp & Reg);
|
||||
void Popad();
|
||||
void Ret();
|
||||
void Seta(x86Reg Reg);
|
||||
void Setae(x86Reg Reg);
|
||||
void Seta(const asmjit::x86::Gp & Reg);
|
||||
void Setae(const asmjit::x86::Gp & Reg);
|
||||
void SetaVariable(void * Variable, const char * VariableName);
|
||||
void Setb(x86Reg Reg);
|
||||
void Setb(const asmjit::x86::Gp & Reg);
|
||||
void SetbVariable(void * Variable, const char * VariableName);
|
||||
void Setg(x86Reg Reg);
|
||||
void Setg(const asmjit::x86::Gp & Reg);
|
||||
void SetgVariable(void * Variable, const char * VariableName);
|
||||
void Setl(x86Reg Reg);
|
||||
void Setl(const asmjit::x86::Gp & Reg);
|
||||
void SetlVariable(void * Variable, const char * VariableName);
|
||||
void Setz(x86Reg Reg);
|
||||
void Setnz(x86Reg Reg);
|
||||
void ShiftLeftDouble(x86Reg Destination, x86Reg Source);
|
||||
void ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate);
|
||||
void ShiftLeftSign(x86Reg Reg);
|
||||
void ShiftLeftSignImmed(x86Reg Reg, uint8_t Immediate);
|
||||
void ShiftRightDouble(x86Reg Destination, x86Reg Source);
|
||||
void ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate);
|
||||
void ShiftRightSign(x86Reg Reg);
|
||||
void ShiftRightSignImmed(x86Reg Reg, uint8_t Immediate);
|
||||
void ShiftRightUnsign(x86Reg Reg);
|
||||
void ShiftRightUnsignImmed(x86Reg Reg, uint8_t Immediate);
|
||||
void SbbConstFromX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void SbbVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void SbbX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void Setz(const asmjit::x86::Gp & Reg);
|
||||
void Setnz(const asmjit::x86::Gp & Reg);
|
||||
void ShiftLeftDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void ShiftLeftDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate);
|
||||
void ShiftLeftSign(const asmjit::x86::Gp & Reg);
|
||||
void ShiftLeftSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
|
||||
void ShiftRightDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void ShiftRightDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate);
|
||||
void ShiftRightSign(const asmjit::x86::Gp & Reg);
|
||||
void ShiftRightSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
|
||||
void ShiftRightUnsign(const asmjit::x86::Gp & Reg);
|
||||
void ShiftRightUnsignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
|
||||
void SbbConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void SbbVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void SbbX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName);
|
||||
void SubConstFromX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void SubVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void SubX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void TestConstToX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void SubConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void SubVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
void SubX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void TestConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void TestVariable(void * Variable, const char * VariableName, uint32_t Const);
|
||||
void TestX86RegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void TestX86ByteRegToX86Reg(x86Reg Destination, x86Reg Source);
|
||||
void XorConstToX86Reg(x86Reg Reg, uint32_t Const);
|
||||
void XorX86RegToX86Reg(x86Reg Source, x86Reg Destination);
|
||||
void XorVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
|
||||
void TestX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void TestX86ByteRegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
|
||||
void XorConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
|
||||
void XorX86RegToX86Reg(const asmjit::x86::Gp & Source, const asmjit::x86::Gp & Destination);
|
||||
void XorVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
|
||||
|
||||
void fpuAbs();
|
||||
void fpuAddDword(void * Variable, const char * VariableName);
|
||||
void fpuAddDwordRegPointer(x86Reg x86Pointer);
|
||||
void fpuAddDwordRegPointer(const asmjit::x86::Gp & x86Pointer);
|
||||
void fpuAddQword(void * Variable, const char * VariableName);
|
||||
void fpuAddQwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuAddQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuAddReg(x86FpuValues Reg);
|
||||
void fpuAddRegPop(int32_t & StackPos, x86FpuValues Reg);
|
||||
void fpuComDword(void * Variable, const char * VariableName, bool Pop);
|
||||
void fpuComDwordRegPointer(x86Reg X86Pointer, bool Pop);
|
||||
void fpuComDwordRegPointer(const asmjit::x86::Gp & X86Pointer, bool Pop);
|
||||
void fpuComQword(void * Variable, const char * VariableName, bool Pop);
|
||||
void fpuComQwordRegPointer(x86Reg X86Pointer, bool Pop);
|
||||
void fpuComQwordRegPointer(const asmjit::x86::Gp & X86Pointer, bool Pop);
|
||||
void fpuComReg(x86FpuValues Reg, bool Pop);
|
||||
void fpuDivDword(void * Variable, const char * VariableName);
|
||||
void fpuDivDwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuDivDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuDivQword(void * Variable, const char * VariableName);
|
||||
void fpuDivQwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuDivQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuDivReg(x86FpuValues Reg);
|
||||
void fpuDivRegPop(x86FpuValues Reg);
|
||||
void fpuExchange(x86FpuValues Reg);
|
||||
|
@ -233,21 +214,21 @@ public:
|
|||
void fpuIncStack(int32_t & StackPos);
|
||||
void fpuLoadControl(void * Variable, const char * VariableName);
|
||||
void fpuLoadDword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadInt32bFromN64Mem(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadDwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadInt32bFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadQword(int32_t & StackPos, void * Variable, const char * VariableName);
|
||||
void fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadQwordFromN64Mem(int32_t & StackPos, x86Reg Reg);
|
||||
void fpuLoadQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadQwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
|
||||
void fpuLoadReg(int32_t & StackPos, x86FpuValues Reg);
|
||||
void fpuMulDword(void * Variable, const char * VariableName);
|
||||
void fpuMulDwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuMulDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuMulQword(void * Variable, const char * VariableName);
|
||||
void fpuMulQwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuMulQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuMulReg(x86FpuValues Reg);
|
||||
void fpuMulRegPop(x86FpuValues Reg);
|
||||
void fpuNeg();
|
||||
|
@ -255,24 +236,24 @@ public:
|
|||
void fpuSqrt();
|
||||
void fpuStoreControl(void * Variable, const char * VariableName);
|
||||
void fpuStoreDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg Reg, bool Pop);
|
||||
void fpuStoreDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
|
||||
void fpuStoreDwordToN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool Pop);
|
||||
void fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
|
||||
void fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
|
||||
void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
|
||||
void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
|
||||
void fpuStoreQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
|
||||
void fpuStoreStatus();
|
||||
void fpuSubDword(void * Variable, const char * VariableName);
|
||||
void fpuSubDwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuSubDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuSubDwordReverse(void * Variable, const char * VariableName);
|
||||
void fpuSubQword(void * Variable, const char * VariableName);
|
||||
void fpuSubQwordRegPointer(x86Reg X86Pointer);
|
||||
void fpuSubQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
|
||||
void fpuSubQwordReverse(void * Variable, const char * VariableName);
|
||||
void fpuSubReg(x86FpuValues Reg);
|
||||
void fpuSubRegPop(x86FpuValues Reg);
|
||||
|
||||
static bool Is8BitReg(x86Reg Reg);
|
||||
static bool Is8BitReg(const asmjit::x86::Gp & Reg);
|
||||
static uint8_t CalcMultiplyCode(Multipler Multiply);
|
||||
static uint32_t GetAddressOf(int32_t value, ...);
|
||||
|
||||
|
@ -284,6 +265,28 @@ private:
|
|||
CX86Ops(const CX86Ops &);
|
||||
CX86Ops & operator=(const CX86Ops &);
|
||||
|
||||
enum x86Reg
|
||||
{
|
||||
x86_EAX = 0,
|
||||
x86_EBX = 3,
|
||||
x86_ECX = 1,
|
||||
x86_EDX = 2,
|
||||
x86_ESI = 6,
|
||||
x86_EDI = 7,
|
||||
x86_EBP = 5,
|
||||
x86_ESP = 4,
|
||||
|
||||
x86_AL = 0,
|
||||
x86_BL = 3,
|
||||
x86_CL = 1,
|
||||
x86_DL = 2,
|
||||
x86_AH = 4,
|
||||
x86_BH = 7,
|
||||
x86_CH = 5,
|
||||
x86_DH = 6
|
||||
};
|
||||
|
||||
static x86Reg RegValue(const asmjit::x86::Gp & Reg);
|
||||
void CodeLog(_Printf_format_string_ const char * Text, ...);
|
||||
|
||||
static void BreakPointNotification(const char * FileName, int32_t LineNumber);
|
||||
|
|
|
@ -38,6 +38,9 @@
|
|||
<Lib>
|
||||
<AdditionalOptions>/ignore:4221%(AdditionalOptions)</AdditionalOptions>
|
||||
</Lib>
|
||||
<ClCompile>
|
||||
<AdditionalIncludeDirectories>$(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
|
||||
</ClCompile>
|
||||
</ItemDefinitionGroup>
|
||||
<ItemGroup>
|
||||
<ClCompile Include="3rdParty\7zip.cpp">
|
||||
|
@ -220,6 +223,7 @@
|
|||
<ClInclude Include="N64System\Recompiler\Arm\ArmOps.h" />
|
||||
<ClInclude Include="N64System\Recompiler\Arm\ArmRecompilerOps.h" />
|
||||
<ClInclude Include="N64System\Recompiler\Arm\ArmRegInfo.h" />
|
||||
<ClInclude Include="N64System\Recompiler\asmjit.h" />
|
||||
<ClInclude Include="N64System\Recompiler\CodeBlock.h" />
|
||||
<ClInclude Include="N64System\Recompiler\CodeSection.h" />
|
||||
<ClInclude Include="N64System\Recompiler\ExitInfo.h" />
|
||||
|
|
|
@ -833,6 +833,9 @@
|
|||
<ClInclude Include="N64System\Recompiler\Aarch64\Aarch64RecompilerOps.h">
|
||||
<Filter>Header Files\N64 System\Recompiler\Aarch64</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="N64System\Recompiler\asmjit.h">
|
||||
<Filter>Header Files\N64 System\Recompiler</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<None Include="Version.h.in">
|
||||
|
|
|
@ -49,6 +49,9 @@
|
|||
<PreBuildEvent>
|
||||
<Command>IF NOT EXIST "$(SolutionDir)Config\Project64.cfg" (copy "$(SolutionDir)Config\Project64.cfg.development" "$(SolutionDir)Config\Project64.cfg")</Command>
|
||||
</PreBuildEvent>
|
||||
<ClCompile>
|
||||
<AdditionalIncludeDirectories>$(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
|
||||
</ClCompile>
|
||||
</ItemDefinitionGroup>
|
||||
<ItemGroup>
|
||||
<ClCompile Include="UserInterface\About.cpp" />
|
||||
|
|
Loading…
Reference in New Issue