diff --git a/Source/Android/Bridge/Bridge.vcxproj b/Source/Android/Bridge/Bridge.vcxproj
index 8ddef6a2c..cfa4f3bb5 100644
--- a/Source/Android/Bridge/Bridge.vcxproj
+++ b/Source/Android/Bridge/Bridge.vcxproj
@@ -27,6 +27,7 @@
NotUsing
+ $(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)
diff --git a/Source/Project64-core/N64System/Recompiler/asmjit.h b/Source/Project64-core/N64System/Recompiler/asmjit.h
new file mode 100644
index 000000000..8c5c43530
--- /dev/null
+++ b/Source/Project64-core/N64System/Recompiler/asmjit.h
@@ -0,0 +1,12 @@
+#pragma once
+
+#define ASMJIT_STATIC
+
+#ifdef new
+#pragma push_macro("new")
+#undef new
+#include
+#pragma pop_macro("new")
+#else
+#include
+#endif
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
index 3a825c5e7..2feffc272 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
@@ -210,12 +210,12 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER", m_CompilePC);
if (g_SyncSystem) {
#ifdef _WIN32
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)g_BaseSystem);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
#else
m_Assembler.PushImm32((uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ESP, 4);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
#endif
}
}*/
@@ -230,12 +230,12 @@ void CX86RecompilerOps::PreCompileOpcode(void)
if (g_SyncSystem)
{
#ifdef _WIN32
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)g_BaseSystem);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
#else
m_Assembler.PushImm32((uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ESP, 4);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
#endif
}
}*/
@@ -259,12 +259,12 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER",m_CompilePC);
if (g_SyncSystem) {
#ifdef _WIN32
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)g_BaseSystem);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
#else
m_Assembler.PushImm32((uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ESP, 4);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
#endif
}
}*/
@@ -280,12 +280,12 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER",m_CompilePC);
if (g_SyncSystem) {
#ifdef _WIN32
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)g_BaseSystem);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
#else
m_Assembler.PushImm32((uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ESP, 4);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
#endif
}
}*/
@@ -296,12 +296,12 @@ void CX86RecompilerOps::PreCompileOpcode(void)
m_Assembler.MoveConstToVariable(&g_Reg->m_PROGRAM_COUNTER,"PROGRAM_COUNTER",m_CompilePC);
if (g_SyncSystem) {
#ifdef _WIN32
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)g_BaseSystem);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
#else
m_Assembler.PushImm32((uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ESP, 4);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
#endif
}
}*/
@@ -341,28 +341,28 @@ void CX86RecompilerOps::PostCompileOpcode(void)
if (g_SyncSystem)
{
m_RegWorkingSet.BeforeCallDirect();
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)g_BaseSystem);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)g_BaseSystem);
m_Assembler.CallFunc(AddressOf(&CN64System::SyncSystemPC), "CN64System::SyncSystemPC");
m_RegWorkingSet.AfterCallDirect();
}
}*/
}
-void CX86RecompilerOps::CompileReadTLBMiss(uint32_t VirtualAddress, CX86Ops::x86Reg LookUpReg)
+void CX86RecompilerOps::CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg)
{
m_Assembler.MoveConstToVariable(g_TLBLoadAddress, "TLBLoadAddress", VirtualAddress);
m_Assembler.CompConstToX86reg(LookUpReg, (uint32_t)-1);
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_TLBReadMiss, false, &CX86Ops::JeLabel32);
}
-void CX86RecompilerOps::CompileReadTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg)
+void CX86RecompilerOps::CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg)
{
m_Assembler.MoveX86regToVariable(g_TLBLoadAddress, "TLBLoadAddress", AddressReg);
m_Assembler.CompConstToX86reg(LookUpReg, (uint32_t)-1);
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_TLBReadMiss, false, &CX86Ops::JeLabel32);
}
-void CX86RecompilerOps::CompileWriteTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg)
+void CX86RecompilerOps::CompileWriteTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg)
{
m_Assembler.MoveX86regToVariable(&g_TLBStoreAddress, "g_TLBStoreAddress", AddressReg);
m_Assembler.CompConstToX86reg(LookUpReg, (uint32_t)-1);
@@ -901,8 +901,8 @@ void CX86RecompilerOps::BNE_Compare()
if (Is64Bit(m_Opcode.rs) || Is64Bit(m_Opcode.rt))
{
m_Assembler.CompX86RegToX86Reg(
- Is32Bit(m_Opcode.rs) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false) : GetMipsRegMapHi(m_Opcode.rs),
- Is32Bit(m_Opcode.rt) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false) : GetMipsRegMapHi(m_Opcode.rt));
+ Is32Bit(m_Opcode.rs) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false) : GetMipsRegMapHi(m_Opcode.rs),
+ Is32Bit(m_Opcode.rt) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false) : GetMipsRegMapHi(m_Opcode.rt));
if (m_Section->m_Jump.FallThrough)
{
@@ -970,7 +970,7 @@ void CX86RecompilerOps::BNE_Compare()
ProtectGPR(MappedReg);
if (Is32Bit(MappedReg))
{
- m_Assembler.CompConstToX86reg(Map_TempReg(CX86Ops::x86_Unknown, MappedReg, true, false), GetMipsRegHi(ConstReg));
+ m_Assembler.CompConstToX86reg(Map_TempReg(x86Reg_Unknown, MappedReg, true, false), GetMipsRegHi(ConstReg));
}
else
{
@@ -1067,7 +1067,7 @@ void CX86RecompilerOps::BNE_Compare()
else if (IsSigned(KnownReg))
{
ProtectGPR(KnownReg);
- m_Assembler.CompX86regToVariable(Map_TempReg(CX86Ops::x86_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
+ m_Assembler.CompX86regToVariable(Map_TempReg(x86Reg_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
}
else
{
@@ -1135,11 +1135,11 @@ void CX86RecompilerOps::BNE_Compare()
}
else
{
- CX86Ops::x86Reg Reg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp Reg;
if (!g_System->b32BitCore())
{
- Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false);
+ Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false);
m_Assembler.CompX86regToVariable(Reg, &_GPR[m_Opcode.rs].W[1], CRegName::GPR_Hi[m_Opcode.rs]);
if (m_Section->m_Jump.FallThrough)
{
@@ -1226,8 +1226,8 @@ void CX86RecompilerOps::BEQ_Compare()
ProtectGPR(m_Opcode.rt);
m_Assembler.CompX86RegToX86Reg(
- Is32Bit(m_Opcode.rs) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false) : GetMipsRegMapHi(m_Opcode.rs),
- Is32Bit(m_Opcode.rt) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false) : GetMipsRegMapHi(m_Opcode.rt));
+ Is32Bit(m_Opcode.rs) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false) : GetMipsRegMapHi(m_Opcode.rs),
+ Is32Bit(m_Opcode.rt) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false) : GetMipsRegMapHi(m_Opcode.rt));
if (m_Section->m_Cont.FallThrough)
{
m_Assembler.JneLabel8("Continue", 0);
@@ -1294,7 +1294,7 @@ void CX86RecompilerOps::BEQ_Compare()
if (Is32Bit(MappedReg))
{
ProtectGPR(MappedReg);
- m_Assembler.CompConstToX86reg(Map_TempReg(CX86Ops::x86_Unknown, MappedReg, true, false), GetMipsRegHi(ConstReg));
+ m_Assembler.CompConstToX86reg(Map_TempReg(x86Reg_Unknown, MappedReg, true, false), GetMipsRegHi(ConstReg));
}
else
{
@@ -1391,7 +1391,7 @@ void CX86RecompilerOps::BEQ_Compare()
}
else if (IsSigned(KnownReg))
{
- m_Assembler.CompX86regToVariable(Map_TempReg(CX86Ops::x86_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
+ m_Assembler.CompX86regToVariable(Map_TempReg(x86Reg_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
}
else
{
@@ -1450,10 +1450,10 @@ void CX86RecompilerOps::BEQ_Compare()
}
else
{
- CX86Ops::x86Reg Reg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp Reg;
if (!g_System->b32BitCore())
{
- Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.CompX86regToVariable(Reg, &_GPR[m_Opcode.rt].W[1], CRegName::GPR_Hi[m_Opcode.rt]);
if (m_Section->m_Cont.FallThrough)
{
@@ -2213,7 +2213,7 @@ void CX86RecompilerOps::JAL()
{
m_RegWorkingSet.WriteBackRegisters();
- CX86Ops::x86Reg PCReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & PCReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(PCReg, _PROGRAM_COUNTER, "_PROGRAM_COUNTER");
m_Assembler.AndConstToX86Reg(PCReg, 0xF0000000);
m_Assembler.AddConstToX86Reg(PCReg, (m_Opcode.target << 2));
@@ -2237,7 +2237,7 @@ void CX86RecompilerOps::ADDI()
{
if (g_System->bFastSP() && m_Opcode.rs == 29 && m_Opcode.rt == 29)
{
- m_Assembler.AddConstToX86Reg(Map_MemoryStack(CX86Ops::x86_Unknown, true), (int16_t)m_Opcode.immediate);
+ m_Assembler.AddConstToX86Reg(Map_MemoryStack(x86Reg_Unknown, true), (int16_t)m_Opcode.immediate);
}
if (IsConst(m_Opcode.rs))
@@ -2264,7 +2264,7 @@ void CX86RecompilerOps::ADDI()
else
{
ProtectGPR(m_Opcode.rt);
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
m_Assembler.AddConstToX86Reg(Reg, (int16_t)m_Opcode.immediate);
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp());
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_ExceptionOverflow, false, &CX86Ops::JoLabel32);
@@ -2293,7 +2293,7 @@ void CX86RecompilerOps::ADDIU()
{
if (m_Opcode.rs == 29 && m_Opcode.rt == 29)
{
- m_Assembler.AddConstToX86Reg(Map_MemoryStack(CX86Ops::x86_Unknown, true), (int16_t)m_Opcode.immediate);
+ m_Assembler.AddConstToX86Reg(Map_MemoryStack(x86Reg_Unknown, true), (int16_t)m_Opcode.immediate);
}
}
@@ -2439,7 +2439,7 @@ void CX86RecompilerOps::SLTI()
Map_GPR_32bit(m_Opcode.rt, false, -1);
m_Assembler.CompConstToX86reg(GetMipsRegMapLo(m_Opcode.rs), (int16_t)m_Opcode.immediate);
- if (GetMipsRegMapLo(m_Opcode.rt) > CX86Ops::x86_EBX)
+ if (GetMipsRegMapLo(m_Opcode.rt) != asmjit::x86::eax && GetMipsRegMapLo(m_Opcode.rt) != asmjit::x86::ebx)
{
m_Assembler.SetlVariable(&m_BranchCompare, "m_BranchCompare");
m_Assembler.MoveVariableToX86reg(GetMipsRegMapLo(m_Opcode.rt), &m_BranchCompare, "m_BranchCompare");
@@ -2456,7 +2456,7 @@ void CX86RecompilerOps::SLTI()
Map_GPR_32bit(m_Opcode.rt, false, -1);
m_Assembler.CompConstToVariable(&_GPR[m_Opcode.rs].W[0], CRegName::GPR_Lo[m_Opcode.rs], (int16_t)m_Opcode.immediate);
- if (GetMipsRegMapLo(m_Opcode.rt) > CX86Ops::x86_EBX)
+ if (GetMipsRegMapLo(m_Opcode.rt) != asmjit::x86::eax && GetMipsRegMapLo(m_Opcode.rt) != asmjit::x86::ebx)
{
m_Assembler.SetlVariable(&m_BranchCompare, "m_BranchCompare");
m_Assembler.MoveVariableToX86reg(GetMipsRegMapLo(m_Opcode.rt), &m_BranchCompare, "m_BranchCompare");
@@ -2529,7 +2529,7 @@ void CX86RecompilerOps::ORI()
if (g_System->bFastSP() && m_Opcode.rs == 29 && m_Opcode.rt == 29)
{
- m_Assembler.OrConstToX86Reg(Map_MemoryStack(CX86Ops::x86_Unknown, true), m_Opcode.immediate);
+ m_Assembler.OrConstToX86Reg(Map_MemoryStack(x86Reg_Unknown, true), m_Opcode.immediate);
}
if (IsConst(m_Opcode.rs))
@@ -2630,11 +2630,11 @@ void CX86RecompilerOps::LUI()
if (g_System->bFastSP() && m_Opcode.rt == 29)
{
- CX86Ops::x86Reg Reg = Map_MemoryStack(CX86Ops::x86_Unknown, true, false);
+ const asmjit::x86::Gp & Reg = Map_MemoryStack(x86Reg_Unknown, true, false);
uint32_t Address;
m_MMU.VAddrToPAddr(((int16_t)m_Opcode.offset << 16), Address);
- if (Reg < 0)
+ if (!Reg.isValid())
{
m_Assembler.MoveConstToVariable(&(g_Recompiler->MemoryStackPos()), "MemoryStack", (uint32_t)(Address + g_MMU->Rdram()));
}
@@ -2687,8 +2687,8 @@ void CX86RecompilerOps::DADDI()
else
{
ProtectGPR(m_Opcode.rs);
- CX86Ops::x86Reg RegLo = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
- CX86Ops::x86Reg RegHi = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ const asmjit::x86::Gp & RegLo = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & RegHi = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.AddConstToX86Reg(RegLo, (uint32_t)imm, true);
m_Assembler.AdcConstToX86Reg(RegHi, (uint32_t)(imm >> 32));
@@ -2737,8 +2737,8 @@ void CX86RecompilerOps::DADDIU()
else
{
ProtectGPR(m_Opcode.rs);
- CX86Ops::x86Reg RegLo = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
- CX86Ops::x86Reg RegHi = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ const asmjit::x86::Gp & RegLo = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & RegHi = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.AddConstToX86Reg(RegLo, (uint32_t)imm, true);
m_Assembler.AdcConstToX86Reg(RegHi, (uint32_t)(imm >> 32));
@@ -2778,9 +2778,9 @@ void CX86RecompilerOps::CACHE()
}
else
{
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EAX, &_GPR[m_Opcode.base].UW[0], CRegName::GPR_Lo[m_Opcode.base]);
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_EAX, (int16_t)m_Opcode.offset);
- m_Assembler.Push(CX86Ops::x86_EAX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::eax, &_GPR[m_Opcode.base].UW[0], CRegName::GPR_Lo[m_Opcode.base]);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::eax, (int16_t)m_Opcode.offset);
+ m_Assembler.Push(asmjit::x86::eax);
}
m_Assembler.CallThis((uint32_t)g_Recompiler, AddressOf(&CRecompiler::ClearRecompCode_Virt), "CRecompiler::ClearRecompCode_Virt", 16);
m_RegWorkingSet.AfterCallDirect();
@@ -2839,13 +2839,13 @@ void CX86RecompilerOps::LDR()
m_RegWorkingSet.AfterCallDirect();
}
-void CX86RecompilerOps::LB_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend)
+void CX86RecompilerOps::LB_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend)
{
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileLoadMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 8, SignExtend);
+ CompileLoadMemoryValue(AddressReg, Reg, x86Reg_Unknown, 8, SignExtend);
return;
}
@@ -2956,15 +2956,15 @@ void CX86RecompilerOps::LB_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, boo
}
}
-void CX86RecompilerOps::LH_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend)
+void CX86RecompilerOps::LH_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend)
{
uint32_t PAddr;
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileLoadMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 16, SignExtend);
+ CompileLoadMemoryValue(AddressReg, Reg, x86Reg_Unknown, 16, SignExtend);
}
if (!m_MMU.VAddrToPAddr(VAddr, PAddr))
@@ -3064,7 +3064,7 @@ void CX86RecompilerOps::LB()
}
PreReadInstruction();
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.base == m_Opcode.rt ? m_Opcode.rt : -1);
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, GetMipsRegMapLo(m_Opcode.rt), CX86Ops::x86_Unknown, 8, true);
+ CompileLoadMemoryValue(x86Reg_Unknown, GetMipsRegMapLo(m_Opcode.rt), x86Reg_Unknown, 8, true);
}
void CX86RecompilerOps::LH()
@@ -3084,7 +3084,7 @@ void CX86RecompilerOps::LH()
return;
}
PreReadInstruction();
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, 16, true);
+ CompileLoadMemoryValue(x86Reg_Unknown, x86Reg_Unknown, x86Reg_Unknown, 16, true);
}
void CX86RecompilerOps::LWL()
@@ -3105,7 +3105,7 @@ void CX86RecompilerOps::LWL()
}
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt);
- CX86Ops::x86Reg Value = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & Value = Map_TempReg(x86Reg_Unknown, -1, false, false);
LW_KnownAddress(Value, (Address & ~3));
m_Assembler.AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), R4300iOp::LWL_MASK[Offset]);
m_Assembler.ShiftLeftSignImmed(Value, (uint8_t)R4300iOp::LWL_SHIFT[Offset]);
@@ -3114,18 +3114,18 @@ void CX86RecompilerOps::LWL()
else
{
PreReadInstruction();
- CX86Ops::x86Reg shift = Map_TempReg(CX86Ops::x86_ECX, -1, false, false);
+ const asmjit::x86::Gp & shift = Map_TempReg(asmjit::x86::ecx, -1, false, false);
if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
}
- CX86Ops::x86Reg AddressReg = BaseOffsetAddress(false);
- CX86Ops::x86Reg OffsetReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = BaseOffsetAddress(false);
+ const asmjit::x86::Gp & OffsetReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveX86RegToX86Reg(OffsetReg, AddressReg);
m_Assembler.AndConstToX86Reg(OffsetReg, 3);
m_Assembler.AndConstToX86Reg(AddressReg, (uint32_t)~3);
TestReadBreakpoint(AddressReg, (uint32_t)x86TestReadBreakpoint32, "x86TestReadBreakpoint32");
- CompileLoadMemoryValue(AddressReg, AddressReg, CX86Ops::x86_Unknown, 32, false);
+ CompileLoadMemoryValue(AddressReg, AddressReg, x86Reg_Unknown, 32, false);
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt);
m_Assembler.AndVariableDispToX86Reg(GetMipsRegMapLo(m_Opcode.rt), (void *)R4300iOp::LWL_MASK, "LWL_MASK", OffsetReg, CX86Ops::Multip_x4);
m_Assembler.MoveVariableDispToX86Reg(shift, (void *)R4300iOp::LWL_SHIFT, "LWL_SHIFT", OffsetReg, CX86Ops::Multip_x4);
@@ -3146,7 +3146,7 @@ void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
if (!HaveReadBP() && m_Opcode.base == 29 && g_System->bFastSP())
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, -1);
- CX86Ops::x86Reg TempReg1 = Map_MemoryStack(CX86Ops::x86_Unknown, true);
+ const asmjit::x86::Gp & TempReg1 = Map_MemoryStack(x86Reg_Unknown, true);
m_Assembler.MoveVariableDispToX86Reg(GetMipsRegMapLo(m_Opcode.rt), (void *)((uint32_t)(int16_t)m_Opcode.offset), stdstr_f("%Xh", (int16_t)m_Opcode.offset).c_str(), TempReg1, CX86Ops::Multip_x1);
if (bRecordLLBit)
{
@@ -3171,7 +3171,7 @@ void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
else
{
PreReadInstruction();
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, 32, false);
+ CompileLoadMemoryValue(x86Reg_Unknown, x86Reg_Unknown, x86Reg_Unknown, 32, false);
if (bRecordLLBit)
{
m_Assembler.MoveConstToVariable(_LLBit, "LLBit", 1);
@@ -3184,14 +3184,14 @@ void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
}
}
-void CX86RecompilerOps::LW_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr)
+void CX86RecompilerOps::LW_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr)
{
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(Reg), true);
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileLoadMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 32, true);
+ CompileLoadMemoryValue(AddressReg, Reg, x86Reg_Unknown, 32, true);
}
else
{
@@ -3441,7 +3441,7 @@ void CX86RecompilerOps::LBU()
}
PreReadInstruction();
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.base == m_Opcode.rt ? m_Opcode.rt : -1);
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, GetMipsRegMapLo(m_Opcode.rt), CX86Ops::x86_Unknown, 8, false);
+ CompileLoadMemoryValue(x86Reg_Unknown, GetMipsRegMapLo(m_Opcode.rt), x86Reg_Unknown, 8, false);
}
void CX86RecompilerOps::LHU()
@@ -3465,7 +3465,7 @@ void CX86RecompilerOps::LHU()
}
PreReadInstruction();
Map_GPR_32bit(m_Opcode.rt, false, m_Opcode.base == m_Opcode.rt ? m_Opcode.rt : -1);
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, GetMipsRegMapLo(m_Opcode.rt), CX86Ops::x86_Unknown, 16, false);
+ CompileLoadMemoryValue(x86Reg_Unknown, GetMipsRegMapLo(m_Opcode.rt), x86Reg_Unknown, 16, false);
}
void CX86RecompilerOps::LWR()
@@ -3485,7 +3485,7 @@ void CX86RecompilerOps::LWR()
return;
}
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt);
- CX86Ops::x86Reg Value = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & Value = Map_TempReg(x86Reg_Unknown, -1, false, false);
LW_KnownAddress(Value, (Address & ~3));
m_Assembler.AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), R4300iOp::LWR_MASK[Offset]);
m_Assembler.ShiftRightUnsignImmed(Value, (uint8_t)R4300iOp::LWR_SHIFT[Offset]);
@@ -3494,18 +3494,18 @@ void CX86RecompilerOps::LWR()
else
{
PreReadInstruction();
- CX86Ops::x86Reg shift = Map_TempReg(CX86Ops::x86_ECX, -1, false, false);
+ const asmjit::x86::Gp & shift = Map_TempReg(asmjit::x86::ecx, -1, false, false);
if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
}
- CX86Ops::x86Reg AddressReg = BaseOffsetAddress(false);
- CX86Ops::x86Reg OffsetReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = BaseOffsetAddress(false);
+ const asmjit::x86::Gp & OffsetReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveX86RegToX86Reg(OffsetReg, AddressReg);
m_Assembler.AndConstToX86Reg(OffsetReg, 3);
m_Assembler.AndConstToX86Reg(AddressReg, (uint32_t)~3);
TestReadBreakpoint(AddressReg, (uint32_t)x86TestReadBreakpoint32, "x86TestReadBreakpoint32");
- CompileLoadMemoryValue(AddressReg, AddressReg, CX86Ops::x86_Unknown, 32, false);
+ CompileLoadMemoryValue(AddressReg, AddressReg, x86Reg_Unknown, 32, false);
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt);
m_Assembler.AndVariableDispToX86Reg(GetMipsRegMapLo(m_Opcode.rt), (void *)R4300iOp::LWR_MASK, "LWR_MASK", OffsetReg, CX86Ops::Multip_x4);
m_Assembler.MoveVariableDispToX86Reg(shift, (void *)R4300iOp::LWR_SHIFT, "LWR_SHIFT", OffsetReg, CX86Ops::Multip_x4);
@@ -3540,27 +3540,27 @@ void CX86RecompilerOps::SB()
}
else
{
- SB_Register(Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, true), Address);
+ SB_Register(Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, true), Address);
}
return;
}
PreWriteInstruction();
- CX86Ops::x86Reg ValueReg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp ValueReg;
if (!IsConst(m_Opcode.rt))
{
if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
}
- ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, true) : GetMipsRegMapLo(m_Opcode.rt);
+ ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, true) : GetMipsRegMapLo(m_Opcode.rt);
if (IsMapped(m_Opcode.rt) && !m_Assembler.Is8BitReg(ValueReg))
{
UnProtectGPR(m_Opcode.rt);
- ValueReg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, true);
+ ValueReg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, true);
}
}
- CompileStoreMemoryValue(CX86Ops::x86_Unknown, ValueReg, CX86Ops::x86_Unknown, GetMipsRegLo(m_Opcode.rt), 8);
+ CompileStoreMemoryValue(x86Reg_Unknown, ValueReg, x86Reg_Unknown, GetMipsRegLo(m_Opcode.rt), 8);
}
void CX86RecompilerOps::SH()
@@ -3584,23 +3584,23 @@ void CX86RecompilerOps::SH()
}
else
{
- SH_Register(Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false), Address);
+ SH_Register(Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false), Address);
}
return;
}
PreWriteInstruction();
- CX86Ops::x86Reg ValueReg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp ValueReg;
if (!IsConst(m_Opcode.rt))
{
if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
}
- ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false) : GetMipsRegMapLo(m_Opcode.rt);
+ ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false) : GetMipsRegMapLo(m_Opcode.rt);
}
- CompileStoreMemoryValue(CX86Ops::x86_Unknown, ValueReg, CX86Ops::x86_Unknown, GetMipsRegLo(m_Opcode.rt), 16);
+ CompileStoreMemoryValue(x86Reg_Unknown, ValueReg, x86Reg_Unknown, GetMipsRegLo(m_Opcode.rt), 16);
}
void CX86RecompilerOps::SWL()
@@ -3617,22 +3617,22 @@ void CX86RecompilerOps::SWL()
}
uint32_t Offset = Address & 3;
- CX86Ops::x86Reg Value = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & Value = Map_TempReg(x86Reg_Unknown, -1, false, false);
LW_KnownAddress(Value, (Address & ~3));
m_Assembler.AndConstToX86Reg(Value, R4300iOp::SWL_MASK[Offset]);
- CX86Ops::x86Reg TempReg1 = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ const asmjit::x86::Gp & TempReg1 = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
m_Assembler.ShiftRightUnsignImmed(TempReg1, (uint8_t)R4300iOp::SWL_SHIFT[Offset]);
m_Assembler.AddX86RegToX86Reg(Value, TempReg1);
SW_Register(Value, (Address & ~3));
return;
}
PreWriteInstruction();
- CX86Ops::x86Reg shift = Map_TempReg(CX86Ops::x86_ECX, -1, false, false), AddressReg = BaseOffsetAddress(false);
+ const asmjit::x86::Gp & shift = Map_TempReg(asmjit::x86::ecx, -1, false, false), AddressReg = BaseOffsetAddress(false);
TestWriteBreakpoint(AddressReg, (uint32_t)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
- CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
- CX86Ops::x86Reg OffsetReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
- CX86Ops::x86Reg ValueReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg2 = Map_TempReg(x86Reg_Unknown, -1, false, false);
+ const asmjit::x86::Gp & OffsetReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
+ const asmjit::x86::Gp & ValueReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveX86RegToX86Reg(TempReg2, AddressReg);
m_Assembler.ShiftRightUnsignImmed(TempReg2, 12);
m_Assembler.MoveVariableDispToX86Reg(TempReg2, g_MMU->m_MemoryReadMap, "MMU->m_MemoryReadMap", TempReg2, CX86Ops::Multip_x4);
@@ -3672,7 +3672,7 @@ void CX86RecompilerOps::SWL()
m_Assembler.AddX86RegToX86Reg(ValueReg, OffsetReg);
}
- CompileStoreMemoryValue(AddressReg, ValueReg, CX86Ops::x86_Unknown, 0, 32);
+ CompileStoreMemoryValue(AddressReg, ValueReg, x86Reg_Unknown, 0, 32);
}
void CX86RecompilerOps::SW()
@@ -3692,7 +3692,7 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
{
ProtectGPR(m_Opcode.rt);
}
- CX86Ops::x86Reg TempReg1 = Map_MemoryStack(CX86Ops::x86_Unknown, true);
+ const asmjit::x86::Gp & TempReg1 = Map_MemoryStack(x86Reg_Unknown, true);
if (IsConst(m_Opcode.rt))
{
@@ -3704,7 +3704,7 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
}
else
{
- CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ const asmjit::x86::Gp & TempReg2 = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
m_Assembler.MoveX86regToMemory(TempReg1, (uint32_t)((int16_t)m_Opcode.offset), TempReg2);
}
}
@@ -3734,7 +3734,7 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
}
else
{
- SW_Register(Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false), Address);
+ SW_Register(Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false), Address);
}
return;
}
@@ -3748,16 +3748,16 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
JumpLLBit = *g_RecompPos - 1;
}
- CX86Ops::x86Reg ValueReg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp ValueReg;
if (!IsConst(m_Opcode.rt))
{
if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
}
- ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false) : GetMipsRegMapLo(m_Opcode.rt);
+ ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false) : GetMipsRegMapLo(m_Opcode.rt);
}
- CompileStoreMemoryValue(CX86Ops::x86_Unknown, ValueReg, CX86Ops::x86_Unknown, GetMipsRegLo(m_Opcode.rt), 32);
+ CompileStoreMemoryValue(x86Reg_Unknown, ValueReg, x86Reg_Unknown, GetMipsRegLo(m_Opcode.rt), 32);
if (bCheckLLbit)
{
m_CodeBlock.Log(" ");
@@ -3781,22 +3781,22 @@ void CX86RecompilerOps::SWR()
}
uint32_t Offset = Address & 3;
- CX86Ops::x86Reg Value = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & Value = Map_TempReg(x86Reg_Unknown, -1, false, false);
LW_KnownAddress(Value, (Address & ~3));
m_Assembler.AndConstToX86Reg(Value, R4300iOp::SWR_MASK[Offset]);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
m_Assembler.ShiftLeftSignImmed(TempReg, (uint8_t)R4300iOp::SWR_SHIFT[Offset]);
m_Assembler.AddX86RegToX86Reg(Value, TempReg);
SW_Register(Value, (Address & ~3));
return;
}
PreWriteInstruction();
- CX86Ops::x86Reg shift = Map_TempReg(CX86Ops::x86_ECX, -1, false, false);
- CX86Ops::x86Reg AddressReg = BaseOffsetAddress(false);
+ const asmjit::x86::Gp & shift = Map_TempReg(asmjit::x86::ecx, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = BaseOffsetAddress(false);
TestWriteBreakpoint(AddressReg, (uint32_t)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
- CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
- CX86Ops::x86Reg OffsetReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
- CX86Ops::x86Reg ValueReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg2 = Map_TempReg(x86Reg_Unknown, -1, false, false);
+ const asmjit::x86::Gp & OffsetReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
+ const asmjit::x86::Gp & ValueReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveX86RegToX86Reg(TempReg2, AddressReg);
m_Assembler.ShiftRightUnsignImmed(TempReg2, 12);
m_Assembler.MoveVariableDispToX86Reg(TempReg2, g_MMU->m_MemoryReadMap, "MMU->m_MemoryReadMap", TempReg2, CX86Ops::Multip_x4);
@@ -3838,7 +3838,7 @@ void CX86RecompilerOps::SWR()
m_Assembler.AddX86RegToX86Reg(ValueReg, OffsetReg);
}
- CompileStoreMemoryValue(AddressReg, ValueReg, CX86Ops::x86_Unknown, 0, 32);
+ CompileStoreMemoryValue(AddressReg, ValueReg, x86Reg_Unknown, 0, 32);
}
void CX86RecompilerOps::SDL()
@@ -3908,18 +3908,18 @@ void CX86RecompilerOps::LWC1()
FoundMemoryBreakpoint();
return;
}
- CX86Ops::x86Reg TempReg1 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg1 = Map_TempReg(x86Reg_Unknown, -1, false, false);
LW_KnownAddress(TempReg1, Address);
- CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg2 = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg2, &_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str());
m_Assembler.MoveX86regToX86Pointer(TempReg2, TempReg1);
return;
}
PreReadInstruction();
- CX86Ops::x86Reg ValueReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, ValueReg, CX86Ops::x86_Unknown, 32, false);
- CX86Ops::x86Reg FPR_SPtr = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & ValueReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
+ CompileLoadMemoryValue(x86Reg_Unknown, ValueReg, x86Reg_Unknown, 32, false);
+ const asmjit::x86::Gp & FPR_SPtr = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(FPR_SPtr, &_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str());
m_Assembler.MoveX86regToX86Pointer(FPR_SPtr, ValueReg);
}
@@ -3937,10 +3937,10 @@ void CX86RecompilerOps::LDC1()
FoundMemoryBreakpoint();
return;
}
- CX86Ops::x86Reg TempReg1 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg1 = Map_TempReg(x86Reg_Unknown, -1, false, false);
LW_KnownAddress(TempReg1, Address);
- CX86Ops::x86Reg TempReg2 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg2 = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg2, &_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str());
m_Assembler.AddConstToX86Reg(TempReg2, 4);
m_Assembler.MoveX86regToX86Pointer(TempReg2, TempReg1);
@@ -3954,10 +3954,10 @@ void CX86RecompilerOps::LDC1()
PreReadInstruction();
UnMap_FPR(m_Opcode.ft, true);
- CX86Ops::x86Reg ValueRegHi = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false), ValueRegLo = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, ValueRegLo, ValueRegHi, 64, false);
+ const asmjit::x86::Gp & ValueRegHi = Map_TempReg(x86Reg_Unknown, -1, false, false), ValueRegLo = Map_TempReg(x86Reg_Unknown, -1, false, false);
+ CompileLoadMemoryValue(x86Reg_Unknown, ValueRegLo, ValueRegHi, 64, false);
- CX86Ops::x86Reg FPR_DPtr = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & FPR_DPtr = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(FPR_DPtr, &_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str());
m_Assembler.MoveX86regToX86Pointer(FPR_DPtr, ValueRegLo);
m_Assembler.AddConstToX86Reg(FPR_DPtr, 4);
@@ -3975,7 +3975,7 @@ void CX86RecompilerOps::LD()
if (!HaveReadBP() && m_Opcode.base == 29 && g_System->bFastSP())
{
Map_GPR_64bit(m_Opcode.rt, -1);
- CX86Ops::x86Reg StackReg = Map_MemoryStack(CX86Ops::x86_Unknown, true);
+ const asmjit::x86::Gp & StackReg = Map_MemoryStack(x86Reg_Unknown, true);
m_Assembler.MoveVariableDispToX86Reg(GetMipsRegMapHi(m_Opcode.rt), (void *)((uint32_t)(int16_t)m_Opcode.offset), stdstr_f("%Xh", (int16_t)m_Opcode.offset).c_str(), StackReg, CX86Ops::Multip_x1);
m_Assembler.MoveVariableDispToX86Reg(GetMipsRegMapLo(m_Opcode.rt), (void *)((uint32_t)(int16_t)m_Opcode.offset + 4), stdstr_f("%Xh", (int16_t)m_Opcode.offset + 4).c_str(), StackReg, CX86Ops::Multip_x1);
}
@@ -4004,7 +4004,7 @@ void CX86RecompilerOps::LD()
}
Map_GPR_64bit(m_Opcode.rt, m_Opcode.rt == m_Opcode.base ? m_Opcode.base : -1);
- CompileLoadMemoryValue(CX86Ops::x86_Unknown, GetMipsRegMapLo(m_Opcode.rt), GetMipsRegMapHi(m_Opcode.rt), 64, false);
+ CompileLoadMemoryValue(x86Reg_Unknown, GetMipsRegMapLo(m_Opcode.rt), GetMipsRegMapHi(m_Opcode.rt), 64, false);
}
if (g_System->bFastSP() && m_Opcode.rt == 29)
{
@@ -4032,7 +4032,7 @@ void CX86RecompilerOps::SWC1()
}
UnMap_FPR(m_Opcode.ft, true);
- CX86Ops::x86Reg TempReg1 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg1 = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg1, &_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str());
m_Assembler.MoveX86PointerToX86reg(TempReg1, TempReg1);
SW_Register(TempReg1, Address);
@@ -4040,11 +4040,11 @@ void CX86RecompilerOps::SWC1()
}
PreWriteInstruction();
UnMap_FPR(m_Opcode.ft, true);
- CX86Ops::x86Reg ValueReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & ValueReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(ValueReg, &_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str());
m_Assembler.MoveX86PointerToX86reg(ValueReg, ValueReg);
- CompileStoreMemoryValue(CX86Ops::x86_Unknown, ValueReg, CX86Ops::x86_Unknown, 0, 32);
+ CompileStoreMemoryValue(x86Reg_Unknown, ValueReg, x86Reg_Unknown, 0, 32);
}
void CX86RecompilerOps::SDC1()
@@ -4060,7 +4060,7 @@ void CX86RecompilerOps::SDC1()
return;
}
- CX86Ops::x86Reg TempReg1 = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg1 = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg1, (uint8_t *)&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str());
m_Assembler.AddConstToX86Reg(TempReg1, 4);
m_Assembler.MoveX86PointerToX86reg(TempReg1, TempReg1);
@@ -4073,14 +4073,14 @@ void CX86RecompilerOps::SDC1()
}
PreWriteInstruction();
UnMap_FPR(m_Opcode.ft, true);
- CX86Ops::x86Reg ValueRegHi = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false), ValueRegLo = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & ValueRegHi = Map_TempReg(x86Reg_Unknown, -1, false, false), ValueRegLo = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(ValueRegHi, (uint8_t *)&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str());
m_Assembler.MoveX86RegToX86Reg(ValueRegLo, ValueRegHi);
m_Assembler.AddConstToX86Reg(ValueRegHi, 4);
m_Assembler.MoveX86PointerToX86reg(ValueRegHi, ValueRegHi);
m_Assembler.MoveX86PointerToX86reg(ValueRegLo, ValueRegLo);
- CompileStoreMemoryValue(CX86Ops::x86_Unknown, ValueRegLo, ValueRegHi, 0, 64);
+ CompileStoreMemoryValue(x86Reg_Unknown, ValueRegLo, ValueRegHi, 0, 64);
}
void CX86RecompilerOps::SD()
@@ -4101,12 +4101,12 @@ void CX86RecompilerOps::SD()
}
else if (IsMapped(m_Opcode.rt))
{
- SW_Register(Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false), Address);
+ SW_Register(Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false), Address);
SW_Register(GetMipsRegMapLo(m_Opcode.rt), Address + 4);
}
else
{
- CX86Ops::x86Reg TempReg1 = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false);
+ const asmjit::x86::Gp & TempReg1 = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false);
SW_Register(TempReg1, Address);
SW_Register(Map_TempReg(TempReg1, m_Opcode.rt, false, false), Address + 4);
}
@@ -4114,17 +4114,17 @@ void CX86RecompilerOps::SD()
else
{
PreWriteInstruction();
- CX86Ops::x86Reg ValueReg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp ValueReg;
if (!IsConst(m_Opcode.rt))
{
if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
}
- ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false) : GetMipsRegMapLo(m_Opcode.rt);
+ ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false) : GetMipsRegMapLo(m_Opcode.rt);
}
uint64_t RtValue = 0;
- CX86Ops::x86Reg ValueRegHi = CX86Ops::x86_Unknown, ValueRegLo = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp ValueRegHi, ValueRegLo;
if (IsConst(m_Opcode.rt))
{
RtValue = ((uint64_t)(Is64Bit(m_Opcode.rt) ? GetMipsRegHi(m_Opcode.rt) : (uint32_t)(GetMipsRegLo_S(m_Opcode.rt) >> 31)) << 32) | GetMipsRegLo(m_Opcode.rt);
@@ -4132,15 +4132,15 @@ void CX86RecompilerOps::SD()
else if (IsMapped(m_Opcode.rt))
{
ProtectGPR(m_Opcode.rt);
- ValueRegHi = Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false);
+ ValueRegHi = Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false);
ValueRegLo = GetMipsRegMapLo(m_Opcode.rt);
}
else
{
- ValueRegHi = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false);
- ValueRegLo = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ ValueRegHi = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false);
+ ValueRegLo = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
}
- CompileStoreMemoryValue(CX86Ops::x86_Unknown, ValueReg, ValueRegHi, RtValue, 64);
+ CompileStoreMemoryValue(x86Reg_Unknown, ValueReg, ValueRegHi, RtValue, 64);
}
}
@@ -4267,8 +4267,8 @@ void CX86RecompilerOps::SPECIAL_SLLV()
}
return;
}
- Map_TempReg(CX86Ops::x86_ECX, m_Opcode.rs, false, false);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ Map_TempReg(asmjit::x86::ecx, m_Opcode.rs, false, false);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt);
m_Assembler.ShiftLeftSign(GetMipsRegMapLo(m_Opcode.rd));
}
@@ -4298,8 +4298,8 @@ void CX86RecompilerOps::SPECIAL_SRLV()
return;
}
- Map_TempReg(CX86Ops::x86_ECX, m_Opcode.rs, false, false);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ Map_TempReg(asmjit::x86::ecx, m_Opcode.rs, false, false);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt);
m_Assembler.ShiftRightUnsign(GetMipsRegMapLo(m_Opcode.rd));
}
@@ -4329,8 +4329,8 @@ void CX86RecompilerOps::SPECIAL_SRAV()
m_Assembler.ShiftRightSignImmed(GetMipsRegMapLo(m_Opcode.rd), (uint8_t)Shift);
return;
}
- Map_TempReg(CX86Ops::x86_ECX, m_Opcode.rs, false, false);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ Map_TempReg(asmjit::x86::ecx, m_Opcode.rs, false, false);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rt);
m_Assembler.ShiftRightSign(GetMipsRegMapLo(m_Opcode.rd));
}
@@ -4349,7 +4349,7 @@ void CX86RecompilerOps::SPECIAL_JR()
else
{
m_RegWorkingSet.WriteBackRegisters();
- m_Assembler.MoveX86regToVariable(&g_System->m_JumpToLocation, "System::m_JumpToLocation", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false));
+ m_Assembler.MoveX86regToVariable(&g_System->m_JumpToLocation, "System::m_JumpToLocation", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
}
OverflowDelaySlot(true);
return;
@@ -4376,7 +4376,7 @@ void CX86RecompilerOps::SPECIAL_JR()
}
else
{
- m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false));
+ m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
}
}
m_PipelineStage = PIPELINE_STAGE_DO_DELAY_SLOT;
@@ -4401,7 +4401,7 @@ void CX86RecompilerOps::SPECIAL_JR()
}
else
{
- m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false));
+ m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
}
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
if (m_Section->m_JumpSection)
@@ -4435,7 +4435,7 @@ void CX86RecompilerOps::SPECIAL_JALR()
}
else
{
- m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false));
+ m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
}
}
UnMap_GPR(m_Opcode.rd, false);
@@ -4451,7 +4451,7 @@ void CX86RecompilerOps::SPECIAL_JALR()
else
{
m_RegWorkingSet.WriteBackRegisters();
- m_Assembler.MoveX86regToVariable(&g_System->m_JumpToLocation, "System::m_JumpToLocation", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false));
+ m_Assembler.MoveX86regToVariable(&g_System->m_JumpToLocation, "System::m_JumpToLocation", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
}
OverflowDelaySlot(true);
return;
@@ -4487,7 +4487,7 @@ void CX86RecompilerOps::SPECIAL_JALR()
}
else
{
- m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false));
+ m_Assembler.MoveX86regToVariable(_PROGRAM_COUNTER, "PROGRAM_COUNTER", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false));
}
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_Normal, true, nullptr);
if (m_Section->m_JumpSection)
@@ -4555,7 +4555,7 @@ void CX86RecompilerOps::SPECIAL_MTLO()
}
else if (IsSigned(m_Opcode.rs))
{
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false));
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false));
}
else
{
@@ -4565,7 +4565,7 @@ void CX86RecompilerOps::SPECIAL_MTLO()
}
else
{
- CX86Ops::x86Reg reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ const asmjit::x86::Gp & reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", reg);
m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", Map_TempReg(reg, m_Opcode.rs, false, false));
}
@@ -4609,7 +4609,7 @@ void CX86RecompilerOps::SPECIAL_MTHI()
}
else if (IsSigned(m_Opcode.rs))
{
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false));
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false));
}
else
{
@@ -4619,7 +4619,7 @@ void CX86RecompilerOps::SPECIAL_MTHI()
}
else
{
- CX86Ops::x86Reg reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ const asmjit::x86::Gp & reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", reg);
m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", Map_TempReg(reg, m_Opcode.rs, false, false));
}
@@ -4633,10 +4633,10 @@ void CX86RecompilerOps::SPECIAL_DSLLV()
{
return;
}
- Map_TempReg(CX86Ops::x86_ECX, m_Opcode.rs, false, false);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x3F);
+ Map_TempReg(asmjit::x86::ecx, m_Opcode.rs, false, false);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x3F);
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_ECX, 0x20);
+ m_Assembler.CompConstToX86reg(asmjit::x86::ecx, 0x20);
m_Assembler.JaeLabel8("MORE32", 0);
Jump[0] = *g_RecompPos - 1;
m_Assembler.ShiftLeftDouble(GetMipsRegMapHi(m_Opcode.rd), GetMipsRegMapLo(m_Opcode.rd));
@@ -4650,7 +4650,7 @@ void CX86RecompilerOps::SPECIAL_DSLLV()
m_Assembler.SetJump8(Jump[0], *g_RecompPos);
m_Assembler.MoveX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), GetMipsRegMapLo(m_Opcode.rd));
m_Assembler.XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapLo(m_Opcode.rd));
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
m_Assembler.ShiftLeftSign(GetMipsRegMapHi(m_Opcode.rd));
// Continue:
@@ -4694,14 +4694,14 @@ void CX86RecompilerOps::SPECIAL_DSRLV()
}
return;
}
- Map_TempReg(CX86Ops::x86_ECX, -1, false, false);
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, Shift);
+ Map_TempReg(asmjit::x86::ecx, -1, false, false);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, Shift);
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt);
if ((Shift & 0x20) == 0x20)
{
m_Assembler.MoveX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
m_Assembler.ShiftRightUnsign(GetMipsRegMapLo(m_Opcode.rd));
}
else
@@ -4712,10 +4712,10 @@ void CX86RecompilerOps::SPECIAL_DSRLV()
}
else
{
- Map_TempReg(CX86Ops::x86_ECX, m_Opcode.rs, false, false);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x3F);
+ Map_TempReg(asmjit::x86::ecx, m_Opcode.rs, false, false);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x3F);
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_ECX, 0x20);
+ m_Assembler.CompConstToX86reg(asmjit::x86::ecx, 0x20);
m_Assembler.JaeLabel8("MORE32", 0);
Jump[0] = *g_RecompPos - 1;
m_Assembler.ShiftRightDouble(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
@@ -4729,7 +4729,7 @@ void CX86RecompilerOps::SPECIAL_DSRLV()
m_Assembler.SetJump8(Jump[0], *g_RecompPos);
m_Assembler.MoveX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
m_Assembler.ShiftRightUnsign(GetMipsRegMapLo(m_Opcode.rd));
// Continue:
@@ -4747,10 +4747,10 @@ void CX86RecompilerOps::SPECIAL_DSRAV()
{
return;
}
- Map_TempReg(CX86Ops::x86_ECX, m_Opcode.rs, false, false);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x3F);
+ Map_TempReg(asmjit::x86::ecx, m_Opcode.rs, false, false);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x3F);
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rt);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_ECX, 0x20);
+ m_Assembler.CompConstToX86reg(asmjit::x86::ecx, 0x20);
m_Assembler.JaeLabel8("MORE32", 0);
Jump[0] = *g_RecompPos - 1;
m_Assembler.ShiftRightDouble(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
@@ -4764,7 +4764,7 @@ void CX86RecompilerOps::SPECIAL_DSRAV()
m_Assembler.SetJump8(Jump[0], *g_RecompPos);
m_Assembler.MoveX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapHi(m_Opcode.rd));
m_Assembler.ShiftRightSignImmed(GetMipsRegMapHi(m_Opcode.rd), 0x1F);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
m_Assembler.ShiftRightSign(GetMipsRegMapLo(m_Opcode.rd));
// Continue:
@@ -4776,40 +4776,40 @@ void CX86RecompilerOps::SPECIAL_DSRAV()
void CX86RecompilerOps::SPECIAL_MULT()
{
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, true);
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, false, false);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, false, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, false);
- Map_TempReg(CX86Ops::x86_EDX, m_Opcode.rt, false, false);
+ Map_TempReg(asmjit::x86::edx, m_Opcode.rt, false, false);
- m_Assembler.imulX86reg(CX86Ops::x86_EDX);
+ m_Assembler.imulX86reg(asmjit::x86::edx);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EDX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EAX, 31); // Paired
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EDX, 31);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", CX86Ops::x86_EDX);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::edx);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::eax, 31); // Paired
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::edx, 31);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", asmjit::x86::edx);
}
void CX86RecompilerOps::SPECIAL_MULTU()
{
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, true);
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, false, false);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, false, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, false);
- Map_TempReg(CX86Ops::x86_EDX, m_Opcode.rt, false, false);
+ Map_TempReg(asmjit::x86::edx, m_Opcode.rt, false, false);
- m_Assembler.MulX86reg(CX86Ops::x86_EDX);
+ m_Assembler.MulX86reg(asmjit::x86::edx);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EDX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EAX, 31); // Paired
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EDX, 31);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", CX86Ops::x86_EDX);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::edx);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::eax, 31); // Paired
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::edx, 31);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", asmjit::x86::edx);
}
void CX86RecompilerOps::SPECIAL_DIV()
{
- CX86Ops::x86Reg RegRs = CX86Ops::x86_Unknown, RegRsHi = CX86Ops::x86_Unknown, DivReg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp RegRs, RegRsHi, DivReg;
uint8_t * JumpNotDiv0 = nullptr;
uint8_t * JumpEnd = nullptr;
uint8_t * JumpEnd2 = nullptr;
@@ -4825,7 +4825,7 @@ void CX86RecompilerOps::SPECIAL_DIV()
}
else
{
- CX86Ops::x86Reg Reg = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ asmjit::x86::Gp Reg = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
m_Assembler.CompConstToX86reg(Reg, 0);
m_Assembler.JgeLabel8(stdstr_f("RsPositive_%08X", m_CompilePC).c_str(), 0);
uint8_t * JumpPositive = *g_RecompPos - 1;
@@ -4844,7 +4844,7 @@ void CX86RecompilerOps::SPECIAL_DIV()
m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", Reg);
if (IsMapped(m_Opcode.rs))
{
- Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
}
else
{
@@ -4866,15 +4866,15 @@ void CX86RecompilerOps::SPECIAL_DIV()
}
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- UnMap_X86reg(CX86Ops::x86_EDX);
+ UnMap_X86reg(asmjit::x86::edx);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, true);
- UnMap_X86reg(CX86Ops::x86_EAX);
+ UnMap_X86reg(asmjit::x86::eax);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- RegRs = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ RegRs = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(RegRs), true);
- RegRsHi = IsMapped(m_Opcode.rs) && Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, IsMapped(m_Opcode.rs) ? m_Opcode.rs : -1, true, false);
- DivReg = IsMapped(m_Opcode.rt) ? GetMipsRegMapLo(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ RegRsHi = IsMapped(m_Opcode.rs) && Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, IsMapped(m_Opcode.rs) ? m_Opcode.rs : -1, true, false);
+ DivReg = IsMapped(m_Opcode.rt) ? GetMipsRegMapLo(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
if (!IsConst(m_Opcode.rs))
{
@@ -4895,15 +4895,15 @@ void CX86RecompilerOps::SPECIAL_DIV()
else
{
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- UnMap_X86reg(CX86Ops::x86_EDX);
+ UnMap_X86reg(asmjit::x86::edx);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, true);
- UnMap_X86reg(CX86Ops::x86_EAX);
+ UnMap_X86reg(asmjit::x86::eax);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- RegRs = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ RegRs = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(RegRs), true);
- RegRsHi = IsMapped(m_Opcode.rs) && Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, IsMapped(m_Opcode.rs) ? m_Opcode.rs : -1, true, false);
- DivReg = IsMapped(m_Opcode.rt) ? GetMipsRegMapLo(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ RegRsHi = IsMapped(m_Opcode.rs) && Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, IsMapped(m_Opcode.rs) ? m_Opcode.rs : -1, true, false);
+ DivReg = IsMapped(m_Opcode.rt) ? GetMipsRegMapLo(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
if (!IsConst(m_Opcode.rs))
{
@@ -4963,28 +4963,28 @@ void CX86RecompilerOps::SPECIAL_DIV()
}
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- UnMap_X86reg(CX86Ops::x86_EDX);
- Map_TempReg(CX86Ops::x86_EDX, -1, false, false);
+ UnMap_X86reg(asmjit::x86::edx);
+ Map_TempReg(asmjit::x86::edx, -1, false, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, false);
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, false, false);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, false, false);
if (IsConst(m_Opcode.rs))
{
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_EDX, GetMipsRegLo_S(m_Opcode.rs) >> 31);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::edx, GetMipsRegLo_S(m_Opcode.rs) >> 31);
}
else
{
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_EDX, CX86Ops::x86_EAX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EDX, 31);
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::edx, asmjit::x86::eax);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::edx, 31);
}
m_Assembler.idivX86reg(DivReg);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EDX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EAX, 31);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EDX, 31);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", CX86Ops::x86_EDX);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::edx);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::eax, 31);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::edx, 31);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", asmjit::x86::edx);
if (JumpEnd != nullptr || JumpEnd2 != nullptr)
{
@@ -5015,7 +5015,7 @@ void CX86RecompilerOps::SPECIAL_DIVU()
}
else
{
- CX86Ops::x86Reg RegRs = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ asmjit::x86::Gp RegRs = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
m_Assembler.CompConstToX86reg(RegRs, 0);
m_Assembler.JgeLabel8(stdstr_f("RsPositive_%08X", m_CompilePC).c_str(), 0);
uint8_t * JumpPositive = *g_RecompPos - 1;
@@ -5034,7 +5034,7 @@ void CX86RecompilerOps::SPECIAL_DIVU()
m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", RegRs);
if (IsMapped(m_Opcode.rs))
{
- RegRs = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ RegRs = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
}
else
{
@@ -5046,19 +5046,19 @@ void CX86RecompilerOps::SPECIAL_DIVU()
else
{
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- UnMap_X86reg(CX86Ops::x86_EDX);
+ UnMap_X86reg(asmjit::x86::edx);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EDX, true);
- UnMap_X86reg(CX86Ops::x86_EAX);
+ UnMap_X86reg(asmjit::x86::eax);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- CX86Ops::x86Reg RegRsLo = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
- CX86Ops::x86Reg RegRsHi = IsMapped(m_Opcode.rs) ? Map_TempReg(CX86Ops::x86_Unknown, IsMapped(m_Opcode.rs), true, false) : CX86Ops::x86_Unknown;
+ asmjit::x86::Gp RegRsLo = IsMapped(m_Opcode.rs) ? GetMipsRegMapLo(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
+ asmjit::x86::Gp RegRsHi = IsMapped(m_Opcode.rs) ? Map_TempReg(x86Reg_Unknown, IsMapped(m_Opcode.rs), true, false) : x86Reg_Unknown;
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, true);
- Map_TempReg(CX86Ops::x86_EDX, 0, false, false);
+ Map_TempReg(asmjit::x86::edx, 0, false, false);
m_RegWorkingSet.SetX86Protected(x86RegIndex_EAX, false);
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, false, false);
- CX86Ops::x86Reg DivReg = IsMapped(m_Opcode.rt) ? GetMipsRegMapLo(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & DivReg = IsMapped(m_Opcode.rt) ? GetMipsRegMapLo(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
if (!IsConst(m_Opcode.rt))
{
@@ -5084,12 +5084,12 @@ void CX86RecompilerOps::SPECIAL_DIVU()
}
m_Assembler.DivX86reg(DivReg);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EDX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EAX, 31);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EDX, 31);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", CX86Ops::x86_EDX);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::edx);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::eax, 31);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::edx, 31);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", asmjit::x86::edx);
if (JumpEndDivu != nullptr)
{
@@ -5129,68 +5129,68 @@ void CX86RecompilerOps::SPECIAL_DMULTU()
#ifdef toremove
/* _RegLO->UDW = (uint64)_GPR[m_Opcode.rs].UW[0] * (uint64)_GPR[m_Opcode.rt].UW[0]; */
- X86Protected(CX86Ops::x86_EDX) = true;
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, false);
- X86Protected(CX86Ops::x86_EDX) = false;
- Map_TempReg(CX86Ops::x86_EDX, m_Opcode.rt, false);
+ X86Protected(asmjit::x86::edx) = true;
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, false);
+ X86Protected(asmjit::x86::edx) = false;
+ Map_TempReg(asmjit::x86::edx, m_Opcode.rt, false);
- m_Assembler.MulX86reg(CX86Ops::x86_EDX);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_EDX);
+ m_Assembler.MulX86reg(asmjit::x86::edx);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[0], "_RegLO->UW[0]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::edx);
/* _RegHI->UDW = (uint64)_GPR[m_Opcode.rs].UW[1] * (uint64)_GPR[m_Opcode.rt].UW[1]; */
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, true);
- Map_TempReg(CX86Ops::x86_EDX, m_Opcode.rt, true);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, true);
+ Map_TempReg(asmjit::x86::edx, m_Opcode.rt, true);
- m_Assembler.MulX86reg(CX86Ops::x86_EDX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", CX86Ops::x86_EDX);
+ m_Assembler.MulX86reg(asmjit::x86::edx);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", asmjit::x86::edx);
/* Tmp[0].UDW = (uint64)_GPR[m_Opcode.rs].UW[1] * (uint64)_GPR[m_Opcode.rt].UW[0]; */
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, true);
- Map_TempReg(CX86Ops::x86_EDX, m_Opcode.rt, false);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, true);
+ Map_TempReg(asmjit::x86::edx, m_Opcode.rt, false);
- Map_TempReg(CX86Ops::x86_EBX, -1, false);
- Map_TempReg(CX86Ops::x86_ECX, -1, false);
+ Map_TempReg(asmjit::x86::ebx, -1, false);
+ Map_TempReg(asmjit::x86::ecx, -1, false);
- m_Assembler.MulX86reg(CX86Ops::x86_EDX);
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_EBX, CX86Ops::x86_EAX); // EDX:EAX -> ECX:EBX
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_ECX, CX86Ops::x86_EDX);
+ m_Assembler.MulX86reg(asmjit::x86::edx);
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::ebx, asmjit::x86::eax); // EDX:EAX -> ECX:EBX
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::ecx, asmjit::x86::edx);
/* Tmp[1].UDW = (uint64)_GPR[m_Opcode.rs].UW[0] * (uint64)_GPR[m_Opcode.rt].UW[1]; */
- Map_TempReg(CX86Ops::x86_EAX, m_Opcode.rs, false);
- Map_TempReg(CX86Ops::x86_EDX, m_Opcode.rt, true);
+ Map_TempReg(asmjit::x86::eax, m_Opcode.rs, false);
+ Map_TempReg(asmjit::x86::edx, m_Opcode.rt, true);
- m_Assembler.MulX86reg(CX86Ops::x86_EDX);
- Map_TempReg(CX86Ops::x86_ESI, -1, false);
- Map_TempReg(CX86Ops::x86_EDI, -1, false);
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_ESI, CX86Ops::x86_EAX); // EDX:EAX -> EDI:ESI
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDX);
+ m_Assembler.MulX86reg(asmjit::x86::edx);
+ Map_TempReg(asmjit::x86::esi, -1, false);
+ Map_TempReg(asmjit::x86::edi, -1, false);
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::esi, asmjit::x86::eax); // EDX:EAX -> EDI:ESI
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edx);
/* Tmp[2].UDW = (uint64)_RegLO->UW[1] + (uint64)Tmp[0].UW[0] + (uint64)Tmp[1].UW[0]; */
- m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDX, CX86Ops::x86_EDX);
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EAX, &_RegLO->UW[1], "_RegLO->UW[1]");
- m_Assembler.AddX86RegToX86Reg(CX86Ops::x86_EAX, CX86Ops::x86_EBX);
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_EDX, 0);
- m_Assembler.AddX86RegToX86Reg(CX86Ops::x86_EAX, CX86Ops::x86_ESI);
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_EDX, 0); // EDX:EAX
+ m_Assembler.XorX86RegToX86Reg(asmjit::x86::edx, asmjit::x86::edx);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::eax, &_RegLO->UW[1], "_RegLO->UW[1]");
+ m_Assembler.AddX86RegToX86Reg(asmjit::x86::eax, asmjit::x86::ebx);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::edx, 0);
+ m_Assembler.AddX86RegToX86Reg(asmjit::x86::eax, asmjit::x86::esi);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::edx, 0); // EDX:EAX
/* _RegLO->UDW += ((uint64)Tmp[0].UW[0] + (uint64)Tmp[1].UW[0]) << 32; */
/* [low+4] += ebx + esi */
- AddX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_EBX);
- AddX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", CX86Ops::x86_ESI);
+ AddX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::ebx);
+ AddX86regToVariable(&_RegLO->UW[1], "_RegLO->UW[1]", asmjit::x86::esi);
/* _RegHI->UDW += (uint64)Tmp[0].UW[1] + (uint64)Tmp[1].UW[1] + Tmp[2].UW[1]; */
/* [hi] += ecx + edi + edx */
- AddX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_ECX);
+ AddX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::ecx);
AdcConstToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", 0);
- AddX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EDI);
+ AddX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::edi);
AdcConstToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", 0);
- AddX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", CX86Ops::x86_EDX);
+ AddX86regToVariable(&_RegHI->UW[0], "_RegHI->UW[0]", asmjit::x86::edx);
AdcConstToVariable(&_RegHI->UW[1], "_RegHI->UW[1]", 0);
#endif
}
@@ -5244,7 +5244,7 @@ void CX86RecompilerOps::SPECIAL_ADD()
}
ProtectGPR(m_Opcode.rd);
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, source1, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, source1, false, false);
if (IsConst(source2))
{
m_Assembler.AddConstToX86Reg(Reg, GetMipsRegLo(source2));
@@ -5339,7 +5339,7 @@ void CX86RecompilerOps::SPECIAL_SUB()
else
{
ProtectGPR(m_Opcode.rd);
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
if (IsConst(m_Opcode.rt))
{
m_Assembler.SubConstFromX86Reg(Reg, GetMipsRegLo(m_Opcode.rt));
@@ -5390,7 +5390,7 @@ void CX86RecompilerOps::SPECIAL_SUBU()
{
if (m_Opcode.rd == m_Opcode.rt)
{
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
Map_GPR_32bit(m_Opcode.rd, true, m_Opcode.rs);
m_Assembler.SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), Reg);
return;
@@ -5472,7 +5472,7 @@ void CX86RecompilerOps::SPECIAL_AND()
Map_GPR_64bit(m_Opcode.rd, source1);
if (Is32Bit(source2))
{
- m_Assembler.AndX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(CX86Ops::x86_Unknown, source2, true, false));
+ m_Assembler.AndX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(x86Reg_Unknown, source2, true, false));
}
else
{
@@ -5671,7 +5671,7 @@ void CX86RecompilerOps::SPECIAL_OR()
}
else
{
- m_Assembler.OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(CX86Ops::x86_Unknown, source2, true, false));
+ m_Assembler.OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(x86Reg_Unknown, source2, true, false));
}
}
else
@@ -5838,7 +5838,7 @@ void CX86RecompilerOps::SPECIAL_XOR()
}
else if (IsSigned(source2))
{
- m_Assembler.XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(CX86Ops::x86_Unknown, source2, true, false));
+ m_Assembler.XorX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(x86Reg_Unknown, source2, true, false));
}
m_Assembler.XorX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapLo(source2));
}
@@ -6007,7 +6007,7 @@ void CX86RecompilerOps::SPECIAL_NOR()
}
else
{
- m_Assembler.OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(CX86Ops::x86_Unknown, source2, true, false));
+ m_Assembler.OrX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), Map_TempReg(x86Reg_Unknown, source2, true, false));
}
}
else
@@ -6171,8 +6171,8 @@ void CX86RecompilerOps::SPECIAL_SLT()
uint8_t * Jump[2];
m_Assembler.CompX86RegToX86Reg(
- Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false),
- Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false));
+ Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false),
+ Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false));
m_Assembler.JeLabel8("Low Compare", 0);
Jump[0] = *g_RecompPos - 1;
m_Assembler.SetlVariable(&m_BranchCompare, "m_BranchCompare");
@@ -6195,7 +6195,7 @@ void CX86RecompilerOps::SPECIAL_SLT()
Map_GPR_32bit(m_Opcode.rd, true, -1);
m_Assembler.CompX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rs), GetMipsRegMapLo(m_Opcode.rt));
- if (GetMipsRegMapLo(m_Opcode.rd) > CX86Ops::x86_EBX)
+ if (GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::eax && GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::ebx)
{
m_Assembler.SetlVariable(&m_BranchCompare, "m_BranchCompare");
m_Assembler.MoveVariableToX86reg(GetMipsRegMapLo(m_Opcode.rd), &m_BranchCompare, "m_BranchCompare");
@@ -6218,7 +6218,7 @@ void CX86RecompilerOps::SPECIAL_SLT()
uint8_t * Jump[2];
m_Assembler.CompConstToX86reg(
- Is64Bit(MappedReg) ? GetMipsRegMapHi(MappedReg) : Map_TempReg(CX86Ops::x86_Unknown, MappedReg, true, false),
+ Is64Bit(MappedReg) ? GetMipsRegMapHi(MappedReg) : Map_TempReg(x86Reg_Unknown, MappedReg, true, false),
Is64Bit(ConstReg) ? GetMipsRegHi(ConstReg) : (GetMipsRegLo_S(ConstReg) >> 31));
m_Assembler.JeLabel8("Low Compare", 0);
Jump[0] = *g_RecompPos - 1;
@@ -6257,7 +6257,7 @@ void CX86RecompilerOps::SPECIAL_SLT()
Map_GPR_32bit(m_Opcode.rd, true, -1);
m_Assembler.CompConstToX86reg(GetMipsRegMapLo(MappedReg), Constant);
- if (GetMipsRegMapLo(m_Opcode.rd) > CX86Ops::x86_EBX)
+ if (GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::eax && GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::ebx)
{
if (MappedReg == m_Opcode.rs)
{
@@ -6312,7 +6312,7 @@ void CX86RecompilerOps::SPECIAL_SLT()
else
{
ProtectGPR(KnownReg);
- m_Assembler.CompX86regToVariable(Map_TempReg(CX86Ops::x86_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
+ m_Assembler.CompX86regToVariable(Map_TempReg(x86Reg_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
}
}
m_Assembler.JeLabel8("Low Compare", 0);
@@ -6371,7 +6371,7 @@ void CX86RecompilerOps::SPECIAL_SLT()
{
m_Assembler.CompX86regToVariable(GetMipsRegMapLo(KnownReg), &_GPR[UnknownReg].W[0], CRegName::GPR_Lo[UnknownReg]);
}
- if (GetMipsRegMapLo(m_Opcode.rd) > CX86Ops::x86_EBX)
+ if (GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::eax && GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::ebx)
{
if (KnownReg == (bConstant ? m_Opcode.rs : m_Opcode.rt))
{
@@ -6399,10 +6399,10 @@ void CX86RecompilerOps::SPECIAL_SLT()
}
else if (g_System->b32BitCore())
{
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
Map_GPR_32bit(m_Opcode.rd, false, -1);
m_Assembler.CompX86regToVariable(Reg, &_GPR[m_Opcode.rt].W[0], CRegName::GPR_Lo[m_Opcode.rt]);
- if (GetMipsRegMapLo(m_Opcode.rd) > CX86Ops::x86_EBX)
+ if (GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::eax && GetMipsRegMapLo(m_Opcode.rd) != asmjit::x86::ebx)
{
m_Assembler.SetlVariable(&m_BranchCompare, "m_BranchCompare");
m_Assembler.MoveVariableToX86reg(GetMipsRegMapLo(m_Opcode.rd), &m_BranchCompare, "m_BranchCompare");
@@ -6417,7 +6417,7 @@ void CX86RecompilerOps::SPECIAL_SLT()
{
uint8_t * Jump[2] = {nullptr, nullptr};
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.CompX86regToVariable(Reg, &_GPR[m_Opcode.rt].W[1], CRegName::GPR_Hi[m_Opcode.rt]);
m_Assembler.JeLabel8("Low Compare", 0);
Jump[0] = *g_RecompPos - 1;
@@ -6485,8 +6485,8 @@ void CX86RecompilerOps::SPECIAL_SLTU()
uint8_t * Jump[2];
m_Assembler.CompX86RegToX86Reg(
- Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false),
- Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false));
+ Is64Bit(m_Opcode.rs) ? GetMipsRegMapHi(m_Opcode.rs) : Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false),
+ Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false));
m_Assembler.JeLabel8("Low Compare", 0);
Jump[0] = *g_RecompPos - 1;
m_Assembler.SetbVariable(&m_BranchCompare, "m_BranchCompare");
@@ -6517,7 +6517,7 @@ void CX86RecompilerOps::SPECIAL_SLTU()
if (Is64Bit(m_Opcode.rt) || Is64Bit(m_Opcode.rs))
{
uint32_t ConstHi, ConstLo, ConstReg, MappedReg;
- CX86Ops::x86Reg MappedRegHi, MappedRegLo;
+ asmjit::x86::Gp MappedRegHi, MappedRegLo;
uint8_t * Jump[2];
ConstReg = IsConst(m_Opcode.rt) ? m_Opcode.rt : m_Opcode.rs;
@@ -6535,7 +6535,7 @@ void CX86RecompilerOps::SPECIAL_SLTU()
MappedRegHi = GetMipsRegMapHi(MappedReg);
if (Is32Bit(MappedReg))
{
- MappedRegHi = Map_TempReg(CX86Ops::x86_Unknown, MappedReg, true, false);
+ MappedRegHi = Map_TempReg(x86Reg_Unknown, MappedReg, true, false);
}
Map_GPR_32bit(m_Opcode.rd, true, -1);
@@ -6641,7 +6641,7 @@ void CX86RecompilerOps::SPECIAL_SLTU()
else
{
ProtectGPR(KnownReg);
- m_Assembler.CompX86regToVariable(Map_TempReg(CX86Ops::x86_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
+ m_Assembler.CompX86regToVariable(Map_TempReg(x86Reg_Unknown, KnownReg, true, false), &_GPR[UnknownReg].W[1], CRegName::GPR_Hi[UnknownReg]);
}
}
m_Assembler.JeLabel8("Low Compare", 0);
@@ -6689,7 +6689,7 @@ void CX86RecompilerOps::SPECIAL_SLTU()
}
else if (g_System->b32BitCore())
{
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, false, false);
Map_GPR_32bit(m_Opcode.rd, false, -1);
m_Assembler.CompX86regToVariable(Reg, &_GPR[m_Opcode.rt].W[0], CRegName::GPR_Lo[m_Opcode.rt]);
m_Assembler.SetbVariable(&m_BranchCompare, "m_BranchCompare");
@@ -6699,7 +6699,7 @@ void CX86RecompilerOps::SPECIAL_SLTU()
{
uint8_t * Jump[2] = {nullptr, nullptr};
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rs, true, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rs, true, false);
m_Assembler.CompX86regToVariable(Reg, &_GPR[m_Opcode.rt].W[1], CRegName::GPR_Hi[m_Opcode.rt]);
m_Assembler.JeLabel8("Low Compare", 0);
Jump[0] = *g_RecompPos - 1;
@@ -6764,8 +6764,8 @@ void CX86RecompilerOps::SPECIAL_DADD()
ProtectGPR(source1);
ProtectGPR(source2);
- CX86Ops::x86Reg RegLo = Map_TempReg(CX86Ops::x86_Unknown, source1, false, false);
- CX86Ops::x86Reg RegHi = Map_TempReg(CX86Ops::x86_Unknown, source1, true, false);
+ const asmjit::x86::Gp & RegLo = Map_TempReg(x86Reg_Unknown, source1, false, false);
+ const asmjit::x86::Gp & RegHi = Map_TempReg(x86Reg_Unknown, source1, true, false);
if (IsConst(source2))
{
@@ -6774,7 +6774,7 @@ void CX86RecompilerOps::SPECIAL_DADD()
}
else if (IsMapped(source2))
{
- CX86Ops::x86Reg HiReg = Is64Bit(source2) ? GetMipsRegMapHi(source2) : Map_TempReg(CX86Ops::x86_Unknown, source2, true, false);
+ const asmjit::x86::Gp & HiReg = Is64Bit(source2) ? GetMipsRegMapHi(source2) : Map_TempReg(x86Reg_Unknown, source2, true, false);
m_Assembler.AddX86RegToX86Reg(RegLo, GetMipsRegMapLo(source2));
m_Assembler.AdcX86RegToX86Reg(RegHi, HiReg);
}
@@ -6850,7 +6850,7 @@ void CX86RecompilerOps::SPECIAL_DADDU()
}
else if (IsMapped(source2))
{
- CX86Ops::x86Reg HiReg = Is64Bit(source2) ? GetMipsRegMapHi(source2) : Map_TempReg(CX86Ops::x86_Unknown, source2, true, false);
+ const asmjit::x86::Gp & HiReg = Is64Bit(source2) ? GetMipsRegMapHi(source2) : Map_TempReg(x86Reg_Unknown, source2, true, false);
m_Assembler.AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapLo(source2));
m_Assembler.AdcX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), HiReg);
}
@@ -6904,8 +6904,8 @@ void CX86RecompilerOps::SPECIAL_DSUB()
ProtectGPR(source1);
ProtectGPR(source2);
- CX86Ops::x86Reg RegLo = Map_TempReg(CX86Ops::x86_Unknown, source1, false, false);
- CX86Ops::x86Reg RegHi = Map_TempReg(CX86Ops::x86_Unknown, source1, true, false);
+ const asmjit::x86::Gp & RegLo = Map_TempReg(x86Reg_Unknown, source1, false, false);
+ const asmjit::x86::Gp & RegHi = Map_TempReg(x86Reg_Unknown, source1, true, false);
if (IsConst(source2))
{
@@ -6914,7 +6914,7 @@ void CX86RecompilerOps::SPECIAL_DSUB()
}
else if (IsMapped(source2))
{
- CX86Ops::x86Reg HiReg = Is64Bit(source2) ? GetMipsRegMapHi(source2) : Map_TempReg(CX86Ops::x86_Unknown, source2, true, false);
+ const asmjit::x86::Gp & HiReg = Is64Bit(source2) ? GetMipsRegMapHi(source2) : Map_TempReg(x86Reg_Unknown, source2, true, false);
m_Assembler.SubX86RegToX86Reg(RegLo, GetMipsRegMapLo(source2));
m_Assembler.SbbX86RegToX86Reg(RegHi, HiReg);
}
@@ -6971,8 +6971,8 @@ void CX86RecompilerOps::SPECIAL_DSUBU()
{
if (m_Opcode.rd == m_Opcode.rt)
{
- CX86Ops::x86Reg HiReg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false);
- CX86Ops::x86Reg LoReg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ const asmjit::x86::Gp & HiReg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false);
+ const asmjit::x86::Gp & LoReg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
Map_GPR_64bit(m_Opcode.rd, m_Opcode.rs);
m_Assembler.SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), LoReg);
m_Assembler.SbbX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), HiReg);
@@ -6990,7 +6990,7 @@ void CX86RecompilerOps::SPECIAL_DSUBU()
}
else if (IsMapped(m_Opcode.rt))
{
- CX86Ops::x86Reg HiReg = Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false);
+ const asmjit::x86::Gp & HiReg = Is64Bit(m_Opcode.rt) ? GetMipsRegMapHi(m_Opcode.rt) : Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false);
m_Assembler.SubX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rd), GetMipsRegMapLo(m_Opcode.rt));
m_Assembler.SbbX86RegToX86Reg(GetMipsRegMapHi(m_Opcode.rd), HiReg);
}
@@ -7147,7 +7147,7 @@ void CX86RecompilerOps::SPECIAL_DSLL32()
else
{
m_CodeBlock.Log(" regcache: switch hi (%s) with lo (%s) for %s", CX86Ops::x86_Name(GetMipsRegMapHi(m_Opcode.rt)), CX86Ops::x86_Name(GetMipsRegMapLo(m_Opcode.rt)), CRegName::GPR[m_Opcode.rt]);
- CX86Ops::x86Reg HiReg = GetMipsRegMapHi(m_Opcode.rt);
+ const asmjit::x86::Gp & HiReg = GetMipsRegMapHi(m_Opcode.rt);
m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt, GetMipsRegMapLo(m_Opcode.rt));
m_RegWorkingSet.SetMipsRegMapLo(m_Opcode.rt, HiReg);
}
@@ -7189,7 +7189,7 @@ void CX86RecompilerOps::SPECIAL_DSRL32()
if (m_Opcode.rt == m_Opcode.rd)
{
m_CodeBlock.Log(" regcache: switch hi (%s) with lo (%s) for %s", CX86Ops::x86_Name(GetMipsRegMapHi(m_Opcode.rt)), CX86Ops::x86_Name(GetMipsRegMapLo(m_Opcode.rt)), CRegName::GPR[m_Opcode.rt]);
- CX86Ops::x86Reg HiReg = GetMipsRegMapHi(m_Opcode.rt);
+ const asmjit::x86::Gp & HiReg = GetMipsRegMapHi(m_Opcode.rt);
m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt, GetMipsRegMapLo(m_Opcode.rt));
m_RegWorkingSet.SetMipsRegMapLo(m_Opcode.rt, HiReg);
Map_GPR_32bit(m_Opcode.rd, false, -1);
@@ -7240,7 +7240,7 @@ void CX86RecompilerOps::SPECIAL_DSRA32()
if (m_Opcode.rt == m_Opcode.rd)
{
m_CodeBlock.Log(" regcache: switch hi (%s) with lo (%s) for %s", CX86Ops::x86_Name(GetMipsRegMapHi(m_Opcode.rt)), CX86Ops::x86_Name(GetMipsRegMapLo(m_Opcode.rt)), CRegName::GPR[m_Opcode.rt]);
- CX86Ops::x86Reg HiReg = GetMipsRegMapHi(m_Opcode.rt);
+ const asmjit::x86::Gp & HiReg = GetMipsRegMapHi(m_Opcode.rt);
m_RegWorkingSet.SetMipsRegMapHi(m_Opcode.rt, GetMipsRegMapLo(m_Opcode.rt));
m_RegWorkingSet.SetMipsRegMapLo(m_Opcode.rt, HiReg);
Map_GPR_32bit(m_Opcode.rd, true, -1);
@@ -7278,7 +7278,7 @@ void CX86RecompilerOps::COP0_MF()
m_RegWorkingSet.BeforeCallDirect();
m_Assembler.PushImm32(m_Opcode.rd);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::Cop0_MF), "CRegisters::Cop0_MF", 8);
- m_Assembler.MoveX86regToVariable(&_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt], CX86Ops::x86_EAX);
+ m_Assembler.MoveX86regToVariable(&_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt], asmjit::x86::eax);
m_RegWorkingSet.AfterCallDirect();
m_Assembler.MoveVariableToX86reg(GetMipsRegMapLo(m_Opcode.rt), &_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt]);
}
@@ -7289,8 +7289,8 @@ void CX86RecompilerOps::COP0_DMF()
m_RegWorkingSet.BeforeCallDirect();
m_Assembler.PushImm32(m_Opcode.rd);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::Cop0_MF), "CRegisters::Cop0_MF", 8);
- m_Assembler.MoveX86regToVariable(&_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt], CX86Ops::x86_EAX);
- m_Assembler.MoveX86regToVariable(&_GPR[m_Opcode.rt].UW[1], CRegName::GPR_Hi[m_Opcode.rt], CX86Ops::x86_EDX);
+ m_Assembler.MoveX86regToVariable(&_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt], asmjit::x86::eax);
+ m_Assembler.MoveX86regToVariable(&_GPR[m_Opcode.rt].UW[1], CRegName::GPR_Hi[m_Opcode.rt], asmjit::x86::edx);
m_RegWorkingSet.AfterCallDirect();
m_Assembler.MoveVariableToX86reg(GetMipsRegMapLo(m_Opcode.rt), &_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt]);
m_Assembler.MoveVariableToX86reg(GetMipsRegMapHi(m_Opcode.rt), &_GPR[m_Opcode.rt].UW[1], CRegName::GPR_Hi[m_Opcode.rt]);
@@ -7310,7 +7310,7 @@ void CX86RecompilerOps::COP0_MT()
}
else if (IsMapped(m_Opcode.rt))
{
- CX86Ops::x86Reg HiReg = GetMipsRegMapLo(m_Opcode.rt) != CX86Ops::x86_EDX ? CX86Ops::x86_EDX : CX86Ops::x86_EAX;
+ const asmjit::x86::Gp & HiReg = GetMipsRegMapLo(m_Opcode.rt) != asmjit::x86::edx ? asmjit::x86::edx : asmjit::x86::eax;
m_Assembler.MoveX86RegToX86Reg(HiReg, GetMipsRegMapLo(m_Opcode.rt));
m_Assembler.ShiftRightSignImmed(HiReg, 0x1F);
m_Assembler.Push(HiReg);
@@ -7318,11 +7318,11 @@ void CX86RecompilerOps::COP0_MT()
}
else
{
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EAX, &_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt]);
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_EDX, CX86Ops::x86_EAX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EDX, 0x1F);
- m_Assembler.Push(CX86Ops::x86_EDX);
- m_Assembler.Push(CX86Ops::x86_EAX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::eax, &_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt]);
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::edx, asmjit::x86::eax);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::edx, 0x1F);
+ m_Assembler.Push(asmjit::x86::edx);
+ m_Assembler.Push(asmjit::x86::eax);
}
m_Assembler.PushImm32(m_Opcode.rd);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::Cop0_MT), "CRegisters::Cop0_MT", 16);
@@ -7349,7 +7349,7 @@ void CX86RecompilerOps::COP0_DMT()
}
else
{
- CX86Ops::x86Reg HiReg = GetMipsRegMapLo(m_Opcode.rt) != CX86Ops::x86_EDX ? CX86Ops::x86_EDX : CX86Ops::x86_EAX;
+ const asmjit::x86::Gp & HiReg = GetMipsRegMapLo(m_Opcode.rt) != asmjit::x86::edx ? asmjit::x86::edx : asmjit::x86::eax;
m_Assembler.MoveX86RegToX86Reg(HiReg, GetMipsRegMapLo(m_Opcode.rt));
m_Assembler.ShiftRightSignImmed(HiReg, 0x1F);
m_Assembler.Push(HiReg);
@@ -7358,10 +7358,10 @@ void CX86RecompilerOps::COP0_DMT()
}
else
{
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EAX, &_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt]);
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EDX, &_GPR[m_Opcode.rt].UW[1], CRegName::GPR_Hi[m_Opcode.rt]);
- m_Assembler.Push(CX86Ops::x86_EDX);
- m_Assembler.Push(CX86Ops::x86_EAX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::eax, &_GPR[m_Opcode.rt].UW[0], CRegName::GPR_Lo[m_Opcode.rt]);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, &_GPR[m_Opcode.rt].UW[1], CRegName::GPR_Hi[m_Opcode.rt]);
+ m_Assembler.Push(asmjit::x86::edx);
+ m_Assembler.Push(asmjit::x86::eax);
}
m_Assembler.PushImm32(m_Opcode.rd);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::Cop0_MT), "CRegisters::Cop0_MT", 16);
@@ -7380,9 +7380,9 @@ void CX86RecompilerOps::COP0_CO_TLBWI(void)
{
m_RegWorkingSet.BeforeCallDirect();
m_Assembler.PushImm32("false", 0);
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_ECX, &g_Reg->INDEX_REGISTER, "INDEX_REGISTER");
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
- m_Assembler.Push(CX86Ops::x86_ECX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::ecx, &g_Reg->INDEX_REGISTER, "INDEX_REGISTER");
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
+ m_Assembler.Push(asmjit::x86::ecx);
m_Assembler.CallThis((uint32_t)g_TLB, AddressOf(&CTLB::WriteEntry), "CTLB::WriteEntry", 12);
m_RegWorkingSet.AfterCallDirect();
}
@@ -7393,9 +7393,9 @@ void CX86RecompilerOps::COP0_CO_TLBWR(void)
m_RegWorkingSet.BeforeCallDirect();
m_Assembler.CallThis((uint32_t)g_SystemTimer, AddressOf(&CSystemTimer::UpdateTimers), "CSystemTimer::UpdateTimers", 4);
m_Assembler.PushImm32("true", true);
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_ECX, &g_Reg->RANDOM_REGISTER, "RANDOM_REGISTER");
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX, 0x1F);
- m_Assembler.Push(CX86Ops::x86_ECX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::ecx, &g_Reg->RANDOM_REGISTER, "RANDOM_REGISTER");
+ m_Assembler.AndConstToX86Reg(asmjit::x86::ecx, 0x1F);
+ m_Assembler.Push(asmjit::x86::ecx);
m_Assembler.CallThis((uint32_t)g_TLB, AddressOf(&CTLB::WriteEntry), "CTLB::WriteEntry", 12);
m_RegWorkingSet.AfterCallDirect();
}
@@ -7453,7 +7453,7 @@ void CX86RecompilerOps::COP1_MF()
UnMap_FPR(m_Opcode.fs, true);
Map_GPR_32bit(m_Opcode.rt, true, -1);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[m_Opcode.fs], stdstr_f("_FPR_S[%d]", m_Opcode.fs).c_str());
m_Assembler.MoveX86PointerToX86reg(GetMipsRegMapLo(m_Opcode.rt), TempReg);
}
@@ -7464,7 +7464,7 @@ void CX86RecompilerOps::COP1_DMF()
UnMap_FPR(m_Opcode.fs, true);
Map_GPR_64bit(m_Opcode.rt, -1);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[m_Opcode.fs], stdstr_f("_FPR_D[%d]", m_Opcode.fs).c_str());
m_Assembler.AddConstToX86Reg(TempReg, 4);
m_Assembler.MoveX86PointerToX86reg(GetMipsRegMapHi(m_Opcode.rt), TempReg);
@@ -7498,7 +7498,7 @@ void CX86RecompilerOps::COP1_MT()
}
}
UnMap_FPR(m_Opcode.fs, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[m_Opcode.fs], stdstr_f("_FPR_S[%d]", m_Opcode.fs).c_str());
if (IsConst(m_Opcode.rt))
@@ -7511,7 +7511,7 @@ void CX86RecompilerOps::COP1_MT()
}
else
{
- m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false));
+ m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false));
}
}
@@ -7527,7 +7527,7 @@ void CX86RecompilerOps::COP1_DMT()
}
}
UnMap_FPR(m_Opcode.fs, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[m_Opcode.fs], stdstr_f("_FPR_D[%d]", m_Opcode.fs).c_str());
if (IsConst(m_Opcode.rt))
@@ -7553,12 +7553,12 @@ void CX86RecompilerOps::COP1_DMT()
}
else
{
- m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, true, false));
+ m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(x86Reg_Unknown, m_Opcode.rt, true, false));
}
}
else
{
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false);
m_Assembler.MoveX86regToX86Pointer(TempReg, Reg);
m_Assembler.AddConstToX86Reg(TempReg, 4);
m_Assembler.MoveX86regToX86Pointer(TempReg, Map_TempReg(Reg, m_Opcode.rt, true, false));
@@ -7585,7 +7585,7 @@ void CX86RecompilerOps::COP1_CT()
}
else
{
- m_Assembler.MoveX86regToVariable(&_FPCR[m_Opcode.fs], CRegName::FPR_Ctrl[m_Opcode.fs], Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.rt, false, false));
+ m_Assembler.MoveX86regToVariable(&_FPCR[m_Opcode.fs], CRegName::FPR_Ctrl[m_Opcode.fs], Map_TempReg(x86Reg_Unknown, m_Opcode.rt, false, false));
}
m_RegWorkingSet.BeforeCallDirect();
m_Assembler.CallFunc((uint32_t)ChangeDefaultRoundingModel, "ChangeDefaultRoundingModel");
@@ -7610,7 +7610,7 @@ void CX86RecompilerOps::COP1_S_ADD()
else
{
UnMap_FPR(Reg2, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Float);
m_Assembler.fpuAddDwordRegPointer(TempReg);
@@ -7631,7 +7631,7 @@ void CX86RecompilerOps::COP1_S_SUB()
UnMap_FPR(m_Opcode.fd, true);
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Float);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str());
m_Assembler.fpuSubDwordRegPointer(TempReg);
}
@@ -7647,7 +7647,7 @@ void CX86RecompilerOps::COP1_S_SUB()
UnMap_FPR(Reg2, true);
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Float);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
m_Assembler.fpuSubDwordRegPointer(TempReg);
}
@@ -7673,7 +7673,7 @@ void CX86RecompilerOps::COP1_S_MUL()
UnMap_FPR(Reg2, true);
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Float);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
m_Assembler.fpuMulDwordRegPointer(TempReg);
}
@@ -7693,7 +7693,7 @@ void CX86RecompilerOps::COP1_S_DIV()
UnMap_FPR(m_Opcode.fd, true);
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Float);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str());
m_Assembler.fpuDivDwordRegPointer(TempReg);
}
@@ -7709,7 +7709,7 @@ void CX86RecompilerOps::COP1_S_DIV()
UnMap_FPR(Reg2, true);
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Float);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
m_Assembler.fpuDivDwordRegPointer(TempReg);
}
@@ -7889,7 +7889,7 @@ void CX86RecompilerOps::COP1_S_CMP()
}
Load_FPR_ToTop(Reg1, Reg1, CRegInfo::FPU_Float);
- Map_TempReg(CX86Ops::x86_EAX, 0, false, false);
+ Map_TempReg(asmjit::x86::eax, 0, false, false);
if (RegInStack(Reg2, CRegInfo::FPU_Float))
{
m_Assembler.fpuComReg(StackPosition(Reg2), false);
@@ -7899,26 +7899,26 @@ void CX86RecompilerOps::COP1_S_CMP()
UnMap_FPR(Reg2, true);
Load_FPR_ToTop(Reg1, Reg1, CRegInfo::FPU_Float);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
m_Assembler.fpuComDwordRegPointer(TempReg, false);
}
m_Assembler.AndConstToVariable(&_FPCR[31], "_FPCR[31]", (uint32_t)~FPCSR_C);
m_Assembler.fpuStoreStatus();
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, 0, false, true);
- m_Assembler.TestConstToX86Reg(CX86Ops::x86_EAX, cmp);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, 0, false, true);
+ m_Assembler.TestConstToX86Reg(asmjit::x86::eax, cmp);
m_Assembler.Setnz(Reg);
if (cmp != 0)
{
- m_Assembler.TestConstToX86Reg(CX86Ops::x86_EAX, cmp);
+ m_Assembler.TestConstToX86Reg(asmjit::x86::eax, cmp);
m_Assembler.Setnz(Reg);
if ((m_Opcode.funct & 1) != 0)
{
- CX86Ops::x86Reg _86RegReg2 = Map_TempReg(CX86Ops::x86_Unknown, 0, false, true);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_EAX, 0x4300);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_EAX, 0x4300);
+ const asmjit::x86::Gp & _86RegReg2 = Map_TempReg(x86Reg_Unknown, 0, false, true);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::eax, 0x4300);
+ m_Assembler.CompConstToX86reg(asmjit::x86::eax, 0x4300);
m_Assembler.Setz(_86RegReg2);
m_Assembler.OrX86RegToX86Reg(Reg, _86RegReg2);
@@ -7926,8 +7926,8 @@ void CX86RecompilerOps::COP1_S_CMP()
}
else if ((m_Opcode.funct & 1) != 0)
{
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_EAX, 0x4300);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_EAX, 0x4300);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::eax, 0x4300);
+ m_Assembler.CompConstToX86reg(asmjit::x86::eax, 0x4300);
m_Assembler.Setz(Reg);
}
m_Assembler.ShiftLeftSignImmed(Reg, 23);
@@ -7950,7 +7950,7 @@ void CX86RecompilerOps::COP1_D_ADD()
else
{
UnMap_FPR(Reg2, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[Reg2], stdstr_f("_FPR_D[%d]", Reg2).c_str());
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Double);
m_Assembler.fpuAddQwordRegPointer(TempReg);
@@ -7967,7 +7967,7 @@ void CX86RecompilerOps::COP1_D_SUB()
if (m_Opcode.fd == m_Opcode.ft)
{
UnMap_FPR(m_Opcode.fd, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str());
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Double);
m_Assembler.fpuSubQwordRegPointer(TempReg);
@@ -7983,7 +7983,7 @@ void CX86RecompilerOps::COP1_D_SUB()
{
UnMap_FPR(Reg2, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[Reg2], stdstr_f("_FPR_D[%d]", Reg2).c_str());
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Double);
m_Assembler.fpuSubQwordRegPointer(TempReg);
@@ -8008,7 +8008,7 @@ void CX86RecompilerOps::COP1_D_MUL()
{
UnMap_FPR(Reg2, true);
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Double);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[Reg2], stdstr_f("_FPR_D[%d]", Reg2).c_str());
m_Assembler.fpuMulQwordRegPointer(TempReg);
}
@@ -8024,7 +8024,7 @@ void CX86RecompilerOps::COP1_D_DIV()
if (m_Opcode.fd == m_Opcode.ft)
{
UnMap_FPR(m_Opcode.fd, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[m_Opcode.ft], stdstr_f("_FPR_D[%d]", m_Opcode.ft).c_str());
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Double);
m_Assembler.fpuDivQwordRegPointer(TempReg);
@@ -8039,7 +8039,7 @@ void CX86RecompilerOps::COP1_D_DIV()
else
{
UnMap_FPR(Reg2, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[Reg2], stdstr_f("_FPR_D[%d]").c_str());
Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Double);
m_Assembler.fpuDivQwordRegPointer(TempReg);
@@ -8255,7 +8255,7 @@ void CX86RecompilerOps::COP1_D_CMP()
}
Load_FPR_ToTop(Reg1, Reg1, CRegInfo::FPU_Double);
- Map_TempReg(CX86Ops::x86_EAX, 0, false, false);
+ Map_TempReg(asmjit::x86::eax, 0, false, false);
if (RegInStack(Reg2, CRegInfo::FPU_Double))
{
m_Assembler.fpuComReg(StackPosition(Reg2), false);
@@ -8263,26 +8263,26 @@ void CX86RecompilerOps::COP1_D_CMP()
else
{
UnMap_FPR(Reg2, true);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&_FPR_D[Reg2], stdstr_f("_FPR_D[%d]", Reg2).c_str());
Load_FPR_ToTop(Reg1, Reg1, CRegInfo::FPU_Double);
m_Assembler.fpuComQwordRegPointer(TempReg, false);
}
m_Assembler.AndConstToVariable(&_FPCR[31], "_FPCR[31]", (uint32_t)~FPCSR_C);
m_Assembler.fpuStoreStatus();
- CX86Ops::x86Reg Reg = Map_TempReg(CX86Ops::x86_Unknown, 0, false, true);
- m_Assembler.TestConstToX86Reg(CX86Ops::x86_EAX, cmp);
+ const asmjit::x86::Gp & Reg = Map_TempReg(x86Reg_Unknown, 0, false, true);
+ m_Assembler.TestConstToX86Reg(asmjit::x86::eax, cmp);
m_Assembler.Setnz(Reg);
if (cmp != 0)
{
- m_Assembler.TestConstToX86Reg(CX86Ops::x86_EAX, cmp);
+ m_Assembler.TestConstToX86Reg(asmjit::x86::eax, cmp);
m_Assembler.Setnz(Reg);
if ((m_Opcode.funct & 1) != 0)
{
- CX86Ops::x86Reg _86RegReg2 = Map_TempReg(CX86Ops::x86_Unknown, 0, false, true);
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_EAX, 0x4300);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_EAX, 0x4300);
+ const asmjit::x86::Gp & _86RegReg2 = Map_TempReg(x86Reg_Unknown, 0, false, true);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::eax, 0x4300);
+ m_Assembler.CompConstToX86reg(asmjit::x86::eax, 0x4300);
m_Assembler.Setz(_86RegReg2);
m_Assembler.OrX86RegToX86Reg(Reg, _86RegReg2);
@@ -8290,8 +8290,8 @@ void CX86RecompilerOps::COP1_D_CMP()
}
else if ((m_Opcode.funct & 1) != 0)
{
- m_Assembler.AndConstToX86Reg(CX86Ops::x86_EAX, 0x4300);
- m_Assembler.CompConstToX86reg(CX86Ops::x86_EAX, 0x4300);
+ m_Assembler.AndConstToX86Reg(asmjit::x86::eax, 0x4300);
+ m_Assembler.CompConstToX86reg(asmjit::x86::eax, 0x4300);
m_Assembler.Setz(Reg);
}
m_Assembler.ShiftLeftSignImmed(Reg, 23);
@@ -8402,7 +8402,7 @@ void CX86RecompilerOps::PreWriteInstruction()
ClearCachedInstructionInfo();
}
-void CX86RecompilerOps::TestBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName)
+void CX86RecompilerOps::TestBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName)
{
m_RegWorkingSet.BeforeCallDirect();
m_Assembler.MoveX86regToVariable(&memory_access_address, "memory_access_address", AddressReg);
@@ -8419,7 +8419,7 @@ void CX86RecompilerOps::TestBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t Func
m_Assembler.SetJump8(Jump, *g_RecompPos);
}
-void CX86RecompilerOps::TestWriteBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName)
+void CX86RecompilerOps::TestWriteBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName)
{
if (!HaveWriteBP())
{
@@ -8428,7 +8428,7 @@ void CX86RecompilerOps::TestWriteBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t
TestBreakpoint(AddressReg, FunctAddress, FunctName);
}
-void CX86RecompilerOps::TestReadBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName)
+void CX86RecompilerOps::TestReadBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName)
{
if (!HaveReadBP())
{
@@ -8440,11 +8440,11 @@ void CX86RecompilerOps::TestReadBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t
void CX86RecompilerOps::EnterCodeBlock()
{
#ifdef _DEBUG
- m_Assembler.Push(CX86Ops::x86_ESI);
+ m_Assembler.Push(asmjit::x86::esi);
#else
- m_Assembler.Push(CX86Ops::x86_EDI);
- m_Assembler.Push(CX86Ops::x86_ESI);
- m_Assembler.Push(CX86Ops::x86_EBX);
+ m_Assembler.Push(asmjit::x86::edi);
+ m_Assembler.Push(asmjit::x86::esi);
+ m_Assembler.Push(asmjit::x86::ebx);
#endif
}
@@ -8455,11 +8455,11 @@ void CX86RecompilerOps::ExitCodeBlock()
m_Assembler.CallThis((uint32_t)g_BaseSystem, AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem", 4);
}
#ifdef _DEBUG
- m_Assembler.Pop(CX86Ops::x86_ESI);
+ m_Assembler.Pop(asmjit::x86::esi);
#else
- m_Assembler.Pop(CX86Ops::x86_EBX);
- m_Assembler.Pop(CX86Ops::x86_ESI);
- m_Assembler.Pop(CX86Ops::x86_EDI);
+ m_Assembler.Pop(asmjit::x86::ebx);
+ m_Assembler.Pop(asmjit::x86::esi);
+ m_Assembler.Pop(asmjit::x86::edi);
#endif
m_Assembler.Ret();
}
@@ -8532,17 +8532,17 @@ void CX86RecompilerOps::SyncRegState(const CRegInfo & SyncTo)
{
m_RegWorkingSet.SetRoundingModel(CRegInfo::RoundUnknown);
}
- CX86Ops::x86Reg MemStackReg = Get_MemoryStack();
- CX86Ops::x86Reg TargetStackReg = SyncTo.Get_MemoryStack();
+ const asmjit::x86::Gp & MemStackReg = Get_MemoryStack();
+ const asmjit::x86::Gp & TargetStackReg = SyncTo.Get_MemoryStack();
//m_CodeBlock.Log("MemoryStack for Original State = %s",MemStackReg > 0?CX86Ops::x86_Name(MemStackReg):"Not Mapped");
if (MemStackReg != TargetStackReg)
{
- if (TargetStackReg == CX86Ops::x86_Unknown)
+ if (TargetStackReg == x86Reg_Unknown)
{
UnMap_X86reg(MemStackReg);
}
- else if (MemStackReg == CX86Ops::x86_Unknown)
+ else if (MemStackReg == x86Reg_Unknown)
{
UnMap_X86reg(TargetStackReg);
m_CodeBlock.Log(" regcache: allocate %s as memory stack", CX86Ops::x86_Name(TargetStackReg));
@@ -8607,8 +8607,8 @@ void CX86RecompilerOps::SyncRegState(const CRegInfo & SyncTo)
case CRegInfo::STATE_UNKNOWN: UnMap_GPR(i, true); break;
case CRegInfo::STATE_MAPPED_64:
{
- CX86Ops::x86Reg Reg = SyncTo.GetMipsRegMapLo(i);
- CX86Ops::x86Reg x86RegHi = SyncTo.GetMipsRegMapHi(i);
+ const asmjit::x86::Gp & Reg = SyncTo.GetMipsRegMapLo(i);
+ const asmjit::x86::Gp & x86RegHi = SyncTo.GetMipsRegMapHi(i);
UnMap_X86reg(Reg);
UnMap_X86reg(x86RegHi);
switch (GetMipsRegState(i))
@@ -8658,7 +8658,7 @@ void CX86RecompilerOps::SyncRegState(const CRegInfo & SyncTo)
}
case CRegInfo::STATE_MAPPED_32_SIGN:
{
- CX86Ops::x86Reg Reg = SyncTo.GetMipsRegMapLo(i);
+ const asmjit::x86::Gp & Reg = SyncTo.GetMipsRegMapLo(i);
UnMap_X86reg(Reg);
switch (GetMipsRegState(i))
{
@@ -8694,7 +8694,7 @@ void CX86RecompilerOps::SyncRegState(const CRegInfo & SyncTo)
}
case CRegInfo::STATE_MAPPED_32_ZERO:
{
- CX86Ops::x86Reg Reg = SyncTo.GetMipsRegMapLo(i);
+ const asmjit::x86::Gp & Reg = SyncTo.GetMipsRegMapLo(i);
UnMap_X86reg(Reg);
switch (GetMipsRegState(i))
{
@@ -8917,7 +8917,7 @@ bool CX86RecompilerOps::InheritParentInfo()
for (size_t i = 0; i < ParentList.size(); i++)
{
- CX86Ops::x86Reg MemoryStackPos;
+ asmjit::x86::Gp MemoryStackPos;
int i2;
if (i == (size_t)FirstParent)
@@ -8937,7 +8937,7 @@ bool CX86RecompilerOps::InheritParentInfo()
}
// Find parent MapRegState
- MemoryStackPos = CX86Ops::x86_Unknown;
+ MemoryStackPos = x86Reg_Unknown;
for (i2 = 0; i2 < x86RegIndex_Size; i2++)
{
if (RegSet->GetX86Mapped((x86RegIndex)i2) == CRegInfo::Stack_Mapped)
@@ -8946,11 +8946,11 @@ bool CX86RecompilerOps::InheritParentInfo()
break;
}
}
- if (MemoryStackPos == CX86Ops::x86_Unknown)
+ if (MemoryStackPos == x86Reg_Unknown)
{
// If the memory stack position is not mapped then unmap it
- CX86Ops::x86Reg MemStackReg = Get_MemoryStack();
- if (MemStackReg != CX86Ops::x86_Unknown)
+ const asmjit::x86::Gp & MemStackReg = Get_MemoryStack();
+ if (MemStackReg != x86Reg_Unknown)
{
UnMap_X86reg(MemStackReg);
}
@@ -9052,7 +9052,7 @@ bool CX86RecompilerOps::InheritParentInfo()
ResetX86Protection();
}
- if (MemoryStackPos > 0)
+ if (MemoryStackPos.isValid())
{
Map_MemoryStack(MemoryStackPos, true);
}
@@ -9406,7 +9406,7 @@ void CX86RecompilerOps::OverflowDelaySlot(bool TestTimer)
m_Assembler.PushImm32("g_System->CountPerOp()", g_System->CountPerOp());
m_Assembler.CallFunc((uint32_t)CInterpreterCPU::ExecuteOps, "CInterpreterCPU::ExecuteOps");
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ESP, 4);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
if (g_System->bFastSP() && g_Recompiler)
{
@@ -9498,27 +9498,27 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
// if (TargetPC >= 0x80000000 && TargetPC < 0xC0000000) {
// uint32_t pAddr = TargetPC & 0x1FFFFFFF;
//
- // m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EAX, (uint8_t *)RDRAM + pAddr,"RDRAM + pAddr");
+ // m_Assembler.MoveVariableToX86reg(asmjit::x86::eax, (uint8_t *)RDRAM + pAddr,"RDRAM + pAddr");
// Jump2 = nullptr;
// } else {
- // m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (TargetPC >> 12));
- // m_Assembler.MoveConstToX86reg(CX86Ops::x86_EBX, TargetPC);
- // m_Assembler.MoveVariableDispToX86Reg(CX86Ops::x86_ECX,TLB_ReadMap,"TLB_ReadMap",CX86Ops::x86_ECX,4);
- // TestX86RegToX86Reg(CX86Ops::x86_ECX,CX86Ops::x86_ECX);
+ // m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (TargetPC >> 12));
+ // m_Assembler.MoveConstToX86reg(asmjit::x86::ebx, TargetPC);
+ // m_Assembler.MoveVariableDispToX86Reg(asmjit::x86::ecx,TLB_ReadMap,"TLB_ReadMap",asmjit::x86::ecx,4);
+ // TestX86RegToX86Reg(asmjit::x86::ecx,asmjit::x86::ecx);
// m_Assembler.JeLabel8("NoTlbEntry",0);
// Jump2 = *g_RecompPos - 1;
- // m_Assembler.MoveX86regPointerToX86reg(CX86Ops::x86_EAX,CX86Ops::x86_ECX, CX86Ops::x86_EBX);
+ // m_Assembler.MoveX86regPointerToX86reg(asmjit::x86::eax,asmjit::x86::ecx, asmjit::x86::ebx);
// }
- // m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_ECX, CX86Ops::x86_EAX);
- // m_Assembler.AndConstToX86Reg(CX86Ops::x86_ECX,0xFFFF0000);
- // m_Assembler.CompConstToX86reg(CX86Ops::x86_ECX,0x7C7C0000);
+ // m_Assembler.MoveX86RegToX86Reg(asmjit::x86::ecx, asmjit::x86::eax);
+ // m_Assembler.AndConstToX86Reg(asmjit::x86::ecx,0xFFFF0000);
+ // m_Assembler.CompConstToX86reg(asmjit::x86::ecx,0x7C7C0000);
// m_Assembler.JneLabel8("NoCode",0);
// Jump = *g_RecompPos - 1;
- // m_Assembler.AndConstToX86Reg(CX86Ops::x86_EAX,0xFFFF);
- // m_Assembler.ShiftLeftSignImmed(CX86Ops::x86_EAX,4);
- // m_Assembler.AddConstToX86Reg(CX86Ops::x86_EAX,0xC);
- // m_Assembler.MoveVariableDispToX86Reg(CX86Ops::x86_ECX,OrigMem,"OrigMem",CX86Ops::x86_EAX,1);
- // JmpDirectReg(CX86Ops::x86_ECX);
+ // m_Assembler.AndConstToX86Reg(asmjit::x86::eax,0xFFFF);
+ // m_Assembler.ShiftLeftSignImmed(asmjit::x86::eax,4);
+ // m_Assembler.AddConstToX86Reg(asmjit::x86::eax,0xC);
+ // m_Assembler.MoveVariableDispToX86Reg(asmjit::x86::ecx,OrigMem,"OrigMem",asmjit::x86::eax,1);
+ // JmpDirectReg(asmjit::x86::ecx);
// m_CodeBlock.Log(" NoCode:");
// *((uint8_t *)(Jump))=(uint8_t)(*g_RecompPos - Jump - 1);
// if (Jump2 != nullptr) {
@@ -9528,14 +9528,14 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
}
else if (LookUpMode() == FuncFind_VirtualLookup)
{
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_EDX, TargetPC);
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (uint32_t)&m_Functions);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::edx, TargetPC);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (uint32_t)&m_Functions);
m_Assembler.CallFunc(AddressOf(&CFunctionMap::CompilerFindFunction), "CFunctionMap::CompilerFindFunction");
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_ECX, CX86Ops::x86_EAX);
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::ecx, asmjit::x86::eax);
JecxzLabel8("NullPointer", 0);
uint8_t * Jump = *g_RecompPos - 1;
- m_Assembler.MoveX86PointerToX86regDisp(CX86Ops::x86_EBX, CX86Ops::x86_ECX, 0xC);
- JmpDirectReg(CX86Ops::x86_EBX);
+ m_Assembler.MoveX86PointerToX86regDisp(asmjit::x86::ebx, asmjit::x86::ecx, 0xC);
+ JmpDirectReg(asmjit::x86::ebx);
m_CodeBlock.Log(" NullPointer:");
*((uint8_t *)(Jump)) = (uint8_t)(*g_RecompPos - Jump - 1);
}
@@ -9545,28 +9545,28 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
if (TargetPC >= 0x80000000 && TargetPC < 0x90000000)
{
uint32_t pAddr = TargetPC & 0x1FFFFFFF;
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_ECX, (uint8_t *)JumpTable + pAddr, "JumpTable + pAddr");
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::ecx, (uint8_t *)JumpTable + pAddr, "JumpTable + pAddr");
}
else if (TargetPC >= 0x90000000 && TargetPC < 0xC0000000)
{
}
else
{
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ECX, (TargetPC >> 12));
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_EBX, TargetPC);
- m_Assembler.MoveVariableDispToX86Reg(CX86Ops::x86_ECX, TLB_ReadMap, "TLB_ReadMap", CX86Ops::x86_ECX, 4);
- TestX86RegToX86Reg(CX86Ops::x86_ECX, CX86Ops::x86_ECX);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ecx, (TargetPC >> 12));
+ m_Assembler.MoveConstToX86reg(asmjit::x86::ebx, TargetPC);
+ m_Assembler.MoveVariableDispToX86Reg(asmjit::x86::ecx, TLB_ReadMap, "TLB_ReadMap", asmjit::x86::ecx, 4);
+ TestX86RegToX86Reg(asmjit::x86::ecx, asmjit::x86::ecx);
m_Assembler.JeLabel8("NoTlbEntry", 0);
Jump2 = *g_RecompPos - 1;
- m_Assembler.AddConstToX86Reg(CX86Ops::x86_ECX, (uint32_t)JumpTable - (uint32_t)RDRAM);
- m_Assembler.MoveX86regPointerToX86reg(CX86Ops::x86_ECX, CX86Ops::x86_ECX, CX86Ops::x86_EBX);
+ m_Assembler.AddConstToX86Reg(asmjit::x86::ecx, (uint32_t)JumpTable - (uint32_t)RDRAM);
+ m_Assembler.MoveX86regPointerToX86reg(asmjit::x86::ecx, asmjit::x86::ecx, asmjit::x86::ebx);
}
if (TargetPC < 0x90000000 || TargetPC >= 0xC0000000)
{
JecxzLabel8("NullPointer", 0);
uint8_t * Jump = *g_RecompPos - 1;
- m_Assembler.MoveX86PointerToX86regDisp(CX86Ops::x86_EAX, CX86Ops::x86_ECX, 0xC);
- JmpDirectReg(CX86Ops::x86_EAX);
+ m_Assembler.MoveX86PointerToX86regDisp(asmjit::x86::eax, asmjit::x86::ecx, 0xC);
+ JmpDirectReg(asmjit::x86::eax);
m_CodeBlock.Log(" NullPointer:");
*((uint8_t *)(Jump)) = (uint8_t)(*g_RecompPos - Jump - 1);
if (Jump2 != nullptr)
@@ -9607,8 +9607,8 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
ExitCodeBlock();
break;
case ExitReason_TLBReadMiss:
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EDX, g_TLBLoadAddress, "g_TLBLoadAddress");
- m_Assembler.Push(CX86Ops::x86_EDX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, g_TLBLoadAddress, "g_TLBLoadAddress");
+ m_Assembler.Push(asmjit::x86::edx);
m_Assembler.PushImm32(InDelaySlot ? "true" : "false", InDelaySlot);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::DoTLBReadMiss), "CRegisters::DoTLBReadMiss", 12);
ExitCodeBlock();
@@ -9624,21 +9624,21 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
break;
case ExitReason_AddressErrorExceptionRead32:
m_Assembler.PushImm32("1", 1);
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EDX, &m_TempValue32, "TempValue32");
- m_Assembler.MoveX86RegToX86Reg(CX86Ops::x86_EAX, CX86Ops::x86_EDX);
- m_Assembler.ShiftRightSignImmed(CX86Ops::x86_EAX, 31);
- m_Assembler.Push(CX86Ops::x86_EAX);
- m_Assembler.Push(CX86Ops::x86_EDX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, &m_TempValue32, "TempValue32");
+ m_Assembler.MoveX86RegToX86Reg(asmjit::x86::eax, asmjit::x86::edx);
+ m_Assembler.ShiftRightSignImmed(asmjit::x86::eax, 31);
+ m_Assembler.Push(asmjit::x86::eax);
+ m_Assembler.Push(asmjit::x86::edx);
m_Assembler.PushImm32(InDelaySlot ? "true" : "false", InDelaySlot);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::DoAddressError), "CRegisters::DoAddressError", 12);
ExitCodeBlock();
break;
case ExitReason_AddressErrorExceptionRead64:
m_Assembler.PushImm32("1", 1);
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EDX, &m_TempValue64, "TempValue64");
- m_Assembler.MoveVariableToX86reg(CX86Ops::x86_EAX, &m_TempValue64 + 4, "TempValue64+4");
- m_Assembler.Push(CX86Ops::x86_EAX);
- m_Assembler.Push(CX86Ops::x86_EDX);
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, &m_TempValue64, "TempValue64");
+ m_Assembler.MoveVariableToX86reg(asmjit::x86::eax, &m_TempValue64 + 4, "TempValue64+4");
+ m_Assembler.Push(asmjit::x86::eax);
+ m_Assembler.Push(asmjit::x86::edx);
m_Assembler.PushImm32(InDelaySlot ? "true" : "false", InDelaySlot);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::DoAddressError), "CRegisters::DoAddressError", 12);
ExitCodeBlock();
@@ -9654,16 +9654,16 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
}
}
-CX86Ops::x86Reg CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister)
+asmjit::x86::Gp CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister)
{
- CX86Ops::x86Reg AddressReg;
+ asmjit::x86::Gp AddressReg;
if (IsMapped(m_Opcode.base))
{
if (m_Opcode.offset != 0)
{
bool UnProtect = m_RegWorkingSet.GetX86Protected(GetIndexFromX86Reg(GetMipsRegMapLo(m_Opcode.base)));
ProtectGPR(m_Opcode.base);
- AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.LeaSourceAndOffset(AddressReg, GetMipsRegMapLo(m_Opcode.base), (int16_t)m_Opcode.offset);
if (!UnProtect)
{
@@ -9677,19 +9677,19 @@ CX86Ops::x86Reg CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister)
}
else
{
- AddressReg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.base, false, false);
+ AddressReg = Map_TempReg(x86Reg_Unknown, m_Opcode.base, false, false);
}
}
else
{
- AddressReg = Map_TempReg(CX86Ops::x86_Unknown, m_Opcode.base, false, false);
+ AddressReg = Map_TempReg(x86Reg_Unknown, m_Opcode.base, false, false);
m_Assembler.AddConstToX86Reg(AddressReg, (int16_t)m_Opcode.immediate);
}
if (!b32BitCore() && ((IsKnown(m_Opcode.base) && Is64Bit(m_Opcode.base)) || IsUnknown(m_Opcode.base)))
{
m_Assembler.MoveX86regToVariable(&m_TempValue64, "TempValue64", AddressReg);
- CX86Ops::x86Reg AddressRegHi = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressRegHi = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveX86RegToX86Reg(AddressRegHi, AddressReg);
m_Assembler.ShiftRightSignImmed(AddressRegHi, 31);
@@ -9705,7 +9705,7 @@ CX86Ops::x86Reg CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister)
}
else
{
- CX86Ops::x86Reg AddressMemoryHi = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressMemoryHi = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(AddressMemoryHi, &_GPR[m_Opcode.base].W[1], CRegName::GPR_Hi[m_Opcode.base]);
m_Assembler.MoveX86regToVariable(&m_TempValue64 + 4, "TempValue64 + 4", AddressMemoryHi);
m_Assembler.CompX86RegToX86Reg(AddressRegHi, AddressMemoryHi);
@@ -9719,10 +9719,10 @@ CX86Ops::x86Reg CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister)
return AddressReg;
}
-void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint8_t ValueSize, bool SignExtend)
+void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend)
{
- bool UnprotectAddressReg = AddressReg == CX86Ops::x86_Unknown;
- if (AddressReg == CX86Ops::x86_Unknown)
+ bool UnprotectAddressReg = AddressReg == x86Reg_Unknown;
+ if (AddressReg == x86Reg_Unknown)
{
if (ValueSize == 8)
{
@@ -9750,7 +9750,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
}
}
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
if (ValueSize == 16)
{
m_Assembler.MoveX86regToVariable(&m_TempValue32, "TempValue32", AddressReg);
@@ -9787,7 +9787,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
m_Assembler.PushImm32("m_TempValue32", (uint32_t)&m_TempValue32);
m_Assembler.Push(AddressReg);
m_Assembler.CallThis((uint32_t)(&m_MMU), AddressOf(&CMipsMemoryVM::LW_NonMemory), "CMipsMemoryVM::LW_NonMemory", 12);
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32);
@@ -9799,7 +9799,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
m_Assembler.PushImm32("m_TempValue32", (uint32_t)&m_TempValue32);
m_Assembler.Push(AddressReg);
m_Assembler.CallThis((uint32_t)(&m_MMU), AddressOf(&CMipsMemoryVM::LH_NonMemory), "CMipsMemoryVM::LH_NonMemory", 12);
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32);
@@ -9812,7 +9812,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
m_Assembler.PushImm32("m_TempValue32", (uint32_t)&m_TempValue32);
m_Assembler.Push(AddressReg);
m_Assembler.CallThis((uint32_t)&m_MMU, AddressOf(&CMipsMemoryVM::LB_NonMemory), "CMipsMemoryVM::LB_NonMemory", 12);
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.MoveConstToX86reg(TempReg, (uint32_t)&m_TempValue32);
@@ -9834,7 +9834,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
if (ValueSize == 8)
{
m_Assembler.XorConstToX86Reg(AddressReg, 3);
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
@@ -9850,7 +9850,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
else if (ValueSize == 16)
{
m_Assembler.XorConstToX86Reg(AddressReg, 2);
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
Map_GPR_32bit(m_Opcode.rt, SignExtend, -1);
ValueReg = GetMipsRegMapLo(m_Opcode.rt);
@@ -9867,13 +9867,13 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
}
else if (ValueSize == 32)
{
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
Map_GPR_32bit(m_Opcode.rt, true, -1);
ValueReg = GetMipsRegMapLo(m_Opcode.rt);
}
- if (ValueReg != CX86Ops::x86_Unknown)
+ if (ValueReg != x86Reg_Unknown)
{
m_Assembler.MoveX86regPointerToX86reg(ValueReg, AddressReg, TempReg);
}
@@ -9884,7 +9884,7 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
}
else if (ValueSize == 64)
{
- if (ValueReg != CX86Ops::x86_Unknown)
+ if (ValueReg != x86Reg_Unknown)
{
m_Assembler.MoveX86regPointerToX86reg(ValueRegHi, AddressReg, TempReg);
m_Assembler.MoveX86regPointerToX86regDisp8(ValueReg, AddressReg, TempReg, 4);
@@ -9905,11 +9905,11 @@ void CX86RecompilerOps::CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86O
}
}
-void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint64_t Value, uint8_t ValueSize)
+void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint64_t Value, uint8_t ValueSize)
{
uint8_t * MemoryWriteDone = nullptr;
- if (AddressReg == CX86Ops::x86_Unknown)
+ if (AddressReg == x86Reg_Unknown)
{
AddressReg = BaseOffsetAddress(ValueSize == 32);
if (ValueSize == 8)
@@ -9933,7 +9933,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveX86RegToX86Reg(TempReg, AddressReg);
m_Assembler.ShiftRightUnsignImmed(TempReg, 12);
m_Assembler.MoveVariableDispToX86Reg(TempReg, g_MMU->m_MemoryWriteMap, "MMU->m_MemoryWriteMap", TempReg, CX86Ops::Multip_x4);
@@ -9951,7 +9951,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
if (ValueSize == 8)
{
m_RegWorkingSet.BeforeCallDirect();
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.PushImm32((uint32_t)Value);
}
@@ -9965,7 +9965,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
{
m_Assembler.AddConstToVariable(g_NextTimer, "g_NextTimer", OpsExecuted);
}
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.JmpLabel8(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), 0);
@@ -9974,7 +9974,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
else if (ValueSize == 16)
{
m_RegWorkingSet.BeforeCallDirect();
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.PushImm32((uint32_t)(Value & 0xFFFF));
}
@@ -9988,7 +9988,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
{
m_Assembler.AddConstToVariable(g_NextTimer, "g_NextTimer", OpsExecuted);
}
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.JmpLabel8(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), 0);
@@ -9997,7 +9997,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
else if (ValueSize == 32)
{
m_RegWorkingSet.BeforeCallDirect();
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.PushImm32((uint32_t)(Value & 0xFFFFFFFF));
}
@@ -10011,7 +10011,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
{
m_Assembler.AddConstToVariable(g_NextTimer, "g_NextTimer", OpsExecuted);
}
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.JmpLabel8(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), 0);
@@ -10020,7 +10020,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
else if (ValueSize == 64)
{
m_RegWorkingSet.BeforeCallDirect();
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.PushImm32((uint32_t)(Value & 0xFFFFFFFF));
m_Assembler.PushImm32((uint32_t)((Value >> 32) & 0xFFFFFFFF));
@@ -10036,7 +10036,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
{
m_Assembler.AddConstToVariable(g_NextTimer, "g_NextTimer", OpsExecuted);
}
- m_Assembler.TestX86ByteRegToX86Reg(CX86Ops::x86_AL, CX86Ops::x86_AL);
+ m_Assembler.TestX86ByteRegToX86Reg(asmjit::x86::al, asmjit::x86::al);
m_RegWorkingSet.AfterCallDirect();
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_NormalNoSysCheck, false, &CX86Ops::JeLabel32);
m_Assembler.JmpLabel8(stdstr_f("MemoryWrite_%X_Done:", m_CompilePC).c_str(), 0);
@@ -10058,7 +10058,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
if (ValueSize == 8)
{
m_Assembler.XorConstToX86Reg(AddressReg, 3);
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.MoveConstByteToX86regPointer(AddressReg, TempReg, (uint8_t)(Value & 0xFF));
}
@@ -10074,7 +10074,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
else if (ValueSize == 16)
{
m_Assembler.XorConstToX86Reg(AddressReg, 2);
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.MoveConstHalfToX86regPointer(AddressReg, TempReg, (uint16_t)(Value & 0xFFFF));
}
@@ -10085,7 +10085,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
}
else if (ValueSize == 32)
{
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.MoveConstToX86regPointer(AddressReg, TempReg, (uint32_t)(Value & 0xFFFFFFFF));
}
@@ -10096,7 +10096,7 @@ void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86
}
else if (ValueSize == 64)
{
- if (ValueReg == CX86Ops::x86_Unknown)
+ if (ValueReg == x86Reg_Unknown)
{
m_Assembler.MoveConstToX86regPointer(AddressReg, TempReg, (uint32_t)(Value >> 32));
m_Assembler.AddConstToX86Reg(AddressReg, 4);
@@ -10126,9 +10126,9 @@ void CX86RecompilerOps::SB_Const(uint32_t Value, uint32_t VAddr)
{
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, Value, 8);
+ CompileStoreMemoryValue(AddressReg, x86Reg_Unknown, x86Reg_Unknown, Value, 8);
return;
}
@@ -10155,9 +10155,9 @@ void CX86RecompilerOps::SB_Const(uint32_t Value, uint32_t VAddr)
case 0x00700000:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, Value, 8);
+ CompileStoreMemoryValue(AddressReg, x86Reg_Unknown, x86Reg_Unknown, Value, 8);
}
else if (PAddr < g_MMU->RdramSize())
{
@@ -10198,14 +10198,14 @@ void CX86RecompilerOps::SB_Const(uint32_t Value, uint32_t VAddr)
}
}
-void CX86RecompilerOps::SB_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
+void CX86RecompilerOps::SB_Register(const asmjit::x86::Gp & Reg, uint32_t VAddr)
{
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(Reg), true);
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 8);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 8);
return;
}
@@ -10232,9 +10232,9 @@ void CX86RecompilerOps::SB_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
case 0x00700000:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 8);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 8);
}
else if (PAddr < g_MMU->RdramSize())
{
@@ -10253,9 +10253,9 @@ void CX86RecompilerOps::SH_Const(uint32_t Value, uint32_t VAddr)
{
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, (uint16_t)Value, 16);
+ CompileStoreMemoryValue(AddressReg, x86Reg_Unknown, x86Reg_Unknown, (uint16_t)Value, 16);
return;
}
@@ -10282,9 +10282,9 @@ void CX86RecompilerOps::SH_Const(uint32_t Value, uint32_t VAddr)
case 0x00700000:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, (uint16_t)Value, 16);
+ CompileStoreMemoryValue(AddressReg, x86Reg_Unknown, x86Reg_Unknown, (uint16_t)Value, 16);
}
else if (PAddr < g_MMU->RdramSize())
{
@@ -10308,15 +10308,15 @@ void CX86RecompilerOps::SH_Const(uint32_t Value, uint32_t VAddr)
}
}
-void CX86RecompilerOps::SH_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
+void CX86RecompilerOps::SH_Register(const asmjit::x86::Gp & Reg, uint32_t VAddr)
{
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(Reg), true);
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 16);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 16);
}
else
{
@@ -10335,9 +10335,9 @@ void CX86RecompilerOps::SH_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
case 0x00700000:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 16);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 16);
}
else if (PAddr < g_MMU->RdramSize())
{
@@ -10368,9 +10368,9 @@ void CX86RecompilerOps::SW_Const(uint32_t Value, uint32_t VAddr)
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, Value, 32);
+ CompileStoreMemoryValue(AddressReg, x86Reg_Unknown, x86Reg_Unknown, Value, 32);
return;
}
@@ -10397,9 +10397,9 @@ void CX86RecompilerOps::SW_Const(uint32_t Value, uint32_t VAddr)
case 0x00700000:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, CX86Ops::x86_Unknown, CX86Ops::x86_Unknown, Value, 32);
+ CompileStoreMemoryValue(AddressReg, x86Reg_Unknown, x86Reg_Unknown, Value, 32);
}
else if (PAddr < g_MMU->RdramSize())
{
@@ -10829,14 +10829,14 @@ void CX86RecompilerOps::SW_Const(uint32_t Value, uint32_t VAddr)
}
}
-void CX86RecompilerOps::SW_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
+void CX86RecompilerOps::SW_Register(const asmjit::x86::Gp & Reg, uint32_t VAddr)
{
if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(Reg), true);
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 32);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 32);
return;
}
@@ -10865,9 +10865,9 @@ void CX86RecompilerOps::SW_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
case 0x00700000:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 32);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 32);
}
else if (PAddr < g_MMU->RdramSize())
{
@@ -10904,9 +10904,9 @@ void CX86RecompilerOps::SW_Register(CX86Ops::x86Reg Reg, uint32_t VAddr)
default:
if (CGameSettings::bSMM_StoreInstruc())
{
- CX86Ops::x86Reg AddressReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ const asmjit::x86::Gp & AddressReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveConstToX86reg(AddressReg, VAddr);
- CompileStoreMemoryValue(AddressReg, Reg, CX86Ops::x86_Unknown, 0, 32);
+ CompileStoreMemoryValue(AddressReg, Reg, x86Reg_Unknown, 0, 32);
}
else if (PAddr < 0x04001000)
{
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
index 39ded28b8..a3426836a 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
@@ -4,6 +4,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -210,9 +211,9 @@ public:
void FoundMemoryBreakpoint();
void PreReadInstruction();
void PreWriteInstruction();
- void TestWriteBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName);
- void TestReadBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName);
- void TestBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName);
+ void TestWriteBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
+ void TestReadBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
+ void TestBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
void EnterCodeBlock();
void ExitCodeBlock();
void CompileExitCode();
@@ -236,9 +237,9 @@ public:
void PostCompileOpcode(void);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason);
- void CompileReadTLBMiss(uint32_t VirtualAddress, CX86Ops::x86Reg LookUpReg);
- void CompileReadTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg);
- void CompileWriteTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg);
+ void CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg);
+ void CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
+ void CompileWriteTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles);
void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);
@@ -283,11 +284,11 @@ public:
{
return m_RegWorkingSet.GetMipsRegHi_S(Reg);
}
- CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg)
+ asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegMapLo(Reg);
}
- CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg)
+ asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg)
{
return m_RegWorkingSet.GetMipsRegMapHi(Reg);
}
@@ -362,11 +363,11 @@ public:
m_RegWorkingSet.UnMap_FPR(Reg, WriteBackValue);
}
- CX86Ops::x86Reg FreeX86Reg()
+ const asmjit::x86::Gp & FreeX86Reg()
{
return m_RegWorkingSet.FreeX86Reg();
}
- CX86Ops::x86Reg Free8BitX86Reg()
+ const asmjit::x86::Gp & Free8BitX86Reg()
{
return m_RegWorkingSet.Free8BitX86Reg();
}
@@ -378,15 +379,15 @@ public:
{
m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad);
}
- CX86Ops::x86Reg Get_MemoryStack()
+ asmjit::x86::Gp Get_MemoryStack()
{
return m_RegWorkingSet.Get_MemoryStack();
}
- CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true)
+ asmjit::x86::Gp Map_MemoryStack(const asmjit::x86::Gp & Reg, bool bMapRegister, bool LoadValue = true)
{
return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue);
}
- CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
+ asmjit::x86::Gp Map_TempReg(const asmjit::x86::Gp & Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
{
return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord, Reg8Bit);
}
@@ -402,7 +403,7 @@ public:
{
m_RegWorkingSet.ResetX86Protection();
}
- CX86Ops::x86Reg UnMap_TempReg()
+ const asmjit::x86::Gp & UnMap_TempReg()
{
return m_RegWorkingSet.UnMap_TempReg();
}
@@ -410,7 +411,7 @@ public:
{
m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue);
}
- bool UnMap_X86reg(CX86Ops::x86Reg Reg)
+ bool UnMap_X86reg(const asmjit::x86::Gp & Reg)
{
return m_RegWorkingSet.UnMap_X86reg(Reg);
}
@@ -425,19 +426,19 @@ private:
CX86RecompilerOps(const CX86RecompilerOps &);
CX86RecompilerOps & operator=(const CX86RecompilerOps &);
- CX86Ops::x86Reg BaseOffsetAddress(bool UseBaseRegister);
- void CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint8_t ValueSize, bool SignExtend);
- void CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint64_t Value, uint8_t ValueSize);
+ asmjit::x86::Gp BaseOffsetAddress(bool UseBaseRegister);
+ void CompileLoadMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend);
+ void CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint64_t Value, uint8_t ValueSize);
void SB_Const(uint32_t Value, uint32_t Addr);
- void SB_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
+ void SB_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
void SH_Const(uint32_t Value, uint32_t Addr);
- void SH_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
+ void SH_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
void SW_Const(uint32_t Value, uint32_t Addr);
- void SW_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
- void LB_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend);
- void LH_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend);
- void LW_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr);
+ void SW_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
+ void LB_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend);
+ void LH_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend);
+ void LW_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr);
void LW(bool ResultSigned, bool bRecordLLBit);
void SW(bool bCheckLLbit);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * Label, uint32_t Value));
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp b/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
index 4174ec1e2..6ec89ae4d 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
@@ -14,38 +14,35 @@ uint32_t CX86RegInfo::m_fpuControl = 0;
const char * Format_Name[] = {"Unknown", "dword", "qword", "float", "double"};
-x86RegIndex GetIndexFromX86Reg(const CX86Ops::x86Reg & Reg)
+x86RegIndex GetIndexFromX86Reg(const asmjit::x86::Gp & Reg)
{
- switch (Reg)
- {
- case CX86Ops::x86_EAX: return x86RegIndex_EAX;
- case CX86Ops::x86_EBX: return x86RegIndex_EBX;
- case CX86Ops::x86_ECX: return x86RegIndex_ECX;
- case CX86Ops::x86_EDX: return x86RegIndex_EDX;
- case CX86Ops::x86_ESI: return x86RegIndex_ESI;
- case CX86Ops::x86_EDI: return x86RegIndex_EDI;
- case CX86Ops::x86_EBP: return x86RegIndex_EBP;
- case CX86Ops::x86_ESP: return x86RegIndex_ESP;
- }
+ if (Reg == asmjit::x86::eax) { return x86RegIndex_EAX; }
+ if (Reg == asmjit::x86::ebx) { return x86RegIndex_EBX; }
+ if (Reg == asmjit::x86::ecx) { return x86RegIndex_ECX; }
+ if (Reg == asmjit::x86::edx) { return x86RegIndex_EDX; }
+ if (Reg == asmjit::x86::esi) { return x86RegIndex_ESI; }
+ if (Reg == asmjit::x86::edi) { return x86RegIndex_EDI; }
+ if (Reg == asmjit::x86::ebp) { return x86RegIndex_EBP; }
+ if (Reg == asmjit::x86::esp) { return x86RegIndex_ESP; }
g_Notify->BreakPoint(__FILE__, __LINE__);
return x86RegIndex_EAX;
}
-CX86Ops::x86Reg GetX86RegFromIndex(x86RegIndex Index)
+asmjit::x86::Gp GetX86RegFromIndex(x86RegIndex Index)
{
switch (Index)
{
- case x86RegIndex_EAX: return CX86Ops::x86_EAX;
- case x86RegIndex_ECX: return CX86Ops::x86_ECX;
- case x86RegIndex_EDX: return CX86Ops::x86_EDX;
- case x86RegIndex_EBX: return CX86Ops::x86_EBX;
- case x86RegIndex_ESP: return CX86Ops::x86_ESP;
- case x86RegIndex_EBP: return CX86Ops::x86_EBP;
- case x86RegIndex_ESI: return CX86Ops::x86_ESI;
- case x86RegIndex_EDI: return CX86Ops::x86_EDI;
+ case x86RegIndex_EAX: return asmjit::x86::eax;
+ case x86RegIndex_EBX: return asmjit::x86::ebx;
+ case x86RegIndex_ECX: return asmjit::x86::ecx;
+ case x86RegIndex_EDX: return asmjit::x86::edx;
+ case x86RegIndex_ESP: return asmjit::x86::esp;
+ case x86RegIndex_EBP: return asmjit::x86::ebp;
+ case x86RegIndex_ESI: return asmjit::x86::esi;
+ case x86RegIndex_EDI: return asmjit::x86::edi;
}
g_Notify->BreakPoint(__FILE__, __LINE__);
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
@@ -56,8 +53,8 @@ CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
{
for (int32_t i = 0; i < 32; i++)
{
- m_RegMapLo[i] = CX86Ops::x86_Unknown;
- m_RegMapHi[i] = CX86Ops::x86_Unknown;
+ m_RegMapLo[i] = x86Reg_Unknown;
+ m_RegMapHi[i] = x86Reg_Unknown;
}
for (int32_t i = 0; i < x86RegIndex_Size; i++)
{
@@ -208,7 +205,7 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
m_fpuControl = 0;
m_Assembler.fpuStoreControl(&m_fpuControl, "m_fpuControl");
- CX86Ops::x86Reg reg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ asmjit::x86::Gp reg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(reg, &m_fpuControl, "m_fpuControl");
m_Assembler.AndConstToX86Reg(reg, 0xF3FF);
@@ -223,14 +220,14 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
0x00000100, //_RC_DOWN
};
- CX86Ops::x86Reg RoundReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ asmjit::x86::Gp RoundReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(RoundReg, &g_Reg->m_RoundingModel, "m_RoundingModel");
m_Assembler.MoveVariableDispToX86Reg(RoundReg, (void *)&msRound[0], "msRound", RoundReg, CX86Ops::Multip_x4);
m_Assembler.ShiftLeftSignImmed(RoundReg, 2);
m_Assembler.OrX86RegToX86Reg(reg, RoundReg);
#else
- CX86Ops::x86Reg RoundReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ asmjit::x86::Gp RoundReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(RoundReg, _RoundingModel, "_RoundingModel");
m_Assembler.OrX86RegToX86Reg(reg, RoundReg);
#endif
@@ -435,7 +432,7 @@ void CX86RegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Forma
}
}
m_CodeBlock.Log(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ asmjit::x86::Gp TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
switch (Format)
{
case FPU_Dword:
@@ -480,35 +477,35 @@ CX86Ops::x86FpuValues CX86RegInfo::StackPosition(int32_t Reg)
return CX86Ops::x86_ST_Unknown;
}
-CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
+asmjit::x86::Gp CX86RegInfo::FreeX86Reg()
{
if (GetX86Mapped(x86RegIndex_EDI) == NotMapped && !GetX86Protected(x86RegIndex_EDI))
{
- return CX86Ops::x86_EDI;
+ return asmjit::x86::edi;
}
if (GetX86Mapped(x86RegIndex_ESI) == NotMapped && !GetX86Protected(x86RegIndex_ESI))
{
- return CX86Ops::x86_ESI;
+ return asmjit::x86::esi;
}
if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX))
{
- return CX86Ops::x86_EBX;
+ return asmjit::x86::ebx;
}
if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX))
{
- return CX86Ops::x86_EAX;
+ return asmjit::x86::eax;
}
if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX))
{
- return CX86Ops::x86_EDX;
+ return asmjit::x86::edx;
}
if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX))
{
- return CX86Ops::x86_ECX;
+ return asmjit::x86::ecx;
}
- CX86Ops::x86Reg Reg = UnMap_TempReg();
- if (Reg != CX86Ops::x86_Unknown)
+ asmjit::x86::Gp Reg = UnMap_TempReg();
+ if (Reg.isValid())
{
return Reg;
}
@@ -537,14 +534,15 @@ CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
}
}
- CX86Ops::x86Reg StackReg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp StackReg;
for (int i = 0; i < x86RegIndex_Size; i++)
{
if (MapCount[i] > 0 && GetX86Mapped(MapReg[i]) != Stack_Mapped)
{
- if (UnMap_X86reg((CX86Ops::x86Reg)MapReg[i]))
+ Reg = GetX86RegFromIndex(MapReg[i]);
+ if (UnMap_X86reg(Reg))
{
- return (CX86Ops::x86Reg)MapReg[i];
+ return Reg;
}
}
if (GetX86Mapped(MapReg[i]) == Stack_Mapped)
@@ -552,42 +550,42 @@ CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
StackReg = GetX86RegFromIndex(MapReg[i]);
}
}
- if (StackReg != CX86Ops::x86_Unknown)
+ if (StackReg.isValid())
{
UnMap_X86reg(StackReg);
return StackReg;
}
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
-CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
+asmjit::x86::Gp CX86RegInfo::Free8BitX86Reg()
{
if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX))
{
- return CX86Ops::x86_EBX;
+ return asmjit::x86::ebx;
}
if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX))
{
- return CX86Ops::x86_EAX;
+ return asmjit::x86::eax;
}
if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX))
{
- return CX86Ops::x86_EDX;
+ return asmjit::x86::edx;
}
if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX))
{
- return CX86Ops::x86_ECX;
+ return asmjit::x86::ecx;
}
- CX86Ops::x86Reg Reg = UnMap_8BitTempReg();
- if (Reg > 0)
+ asmjit::x86::Gp Reg = UnMap_8BitTempReg();
+ if (Reg.isValid())
{
return Reg;
}
- uint32_t MapCount[10];
- x86RegIndex MapReg[10];
+ uint32_t MapCount[x86RegIndex_Size];
+ x86RegIndex MapReg[x86RegIndex_Size];
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{
MapCount[i] = GetX86MapOrder((x86RegIndex)i);
@@ -595,7 +593,7 @@ CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
}
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{
- for (uint32_t z = 0; z < x86RegIndex_Size; z++)
+ for (uint32_t z = 0; z < x86RegIndex_Size - 1; z++)
{
if (MapCount[z] < MapCount[z + 1])
{
@@ -612,20 +610,20 @@ CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
{
if (MapCount[i] > 0)
{
- if (!CX86Ops::Is8BitReg((CX86Ops::x86Reg)i))
+ if (!CX86Ops::Is8BitReg(GetX86RegFromIndex((x86RegIndex)i)))
{
continue;
}
- if (UnMap_X86reg((CX86Ops::x86Reg)i))
+ if (UnMap_X86reg(GetX86RegFromIndex((x86RegIndex)i)))
{
- return (CX86Ops::x86Reg)i;
+ return GetX86RegFromIndex((x86RegIndex)i);
}
}
}
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
-CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg()
+asmjit::x86::Gp CX86RegInfo::UnMap_8BitTempReg()
{
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{
@@ -643,10 +641,10 @@ CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg()
}
}
}
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
-CX86Ops::x86Reg CX86RegInfo::Get_MemoryStack() const
+asmjit::x86::Gp CX86RegInfo::Get_MemoryStack() const
{
for (int32_t i = 0, n = x86RegIndex_Size; i < n; i++)
{
@@ -655,32 +653,32 @@ CX86Ops::x86Reg CX86RegInfo::Get_MemoryStack() const
return GetX86RegFromIndex((x86RegIndex)i);
}
}
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
-CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue)
+asmjit::x86::Gp CX86RegInfo::Map_MemoryStack(asmjit::x86::Gp Reg, bool bMapRegister, bool LoadValue)
{
- CX86Ops::x86Reg CurrentMap = Get_MemoryStack();
+ asmjit::x86::Gp CurrentMap = Get_MemoryStack();
if (!bMapRegister)
{
// If not mapping then just return what the current mapping is
return CurrentMap;
}
- if (CurrentMap != CX86Ops::x86_Unknown && CurrentMap == Reg)
+ if (CurrentMap.isValid() && CurrentMap == Reg)
{
// Already mapped to correct register
return CurrentMap;
}
// Map a register
- if (Reg == CX86Ops::x86_Unknown)
+ if (!Reg.isValid())
{
- if (CurrentMap != CX86Ops::x86_Unknown)
+ if (CurrentMap.isValid())
{
return CurrentMap;
}
Reg = FreeX86Reg();
- if (Reg == CX86Ops::x86_Unknown)
+ if (!Reg.isValid())
{
g_Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
g_Notify->BreakPoint(__FILE__, __LINE__);
@@ -696,7 +694,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegis
// Move to a register/allocate register
UnMap_X86reg(Reg);
- if (CurrentMap != CX86Ops::x86_Unknown)
+ if (CurrentMap.isValid())
{
m_CodeBlock.Log(" regcache: change allocation of memory stack from %s to %s", CX86Ops::x86_Name(CurrentMap), CX86Ops::x86_Name(Reg));
SetX86Mapped(GetIndexFromX86Reg(Reg), CX86RegInfo::Stack_Mapped);
@@ -717,7 +715,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegis
void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad)
{
- CX86Ops::x86Reg Reg;
+ asmjit::x86::Gp Reg;
if (MipsReg == 0)
{
g_Notify->BreakPoint(__FILE__, __LINE__);
@@ -727,7 +725,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
if (IsUnknown(MipsReg) || IsConst(MipsReg))
{
Reg = FreeX86Reg();
- if (Reg < 0)
+ if (Reg.isNone())
{
if (HaveDebugger())
{
@@ -751,12 +749,11 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
}
Reg = GetMipsRegMapLo(MipsReg);
}
- for (uint32_t i = 0; i < x86RegIndex_Size; i++)
+ for (int i = 0; i < sizeof(m_x86reg_MapOrder) / sizeof(m_x86reg_MapOrder[0]); i++)
{
- uint32_t MapOrder = GetX86MapOrder((x86RegIndex)i);
- if (MapOrder > 0)
+ if (m_x86reg_MapOrder[i] > 0)
{
- SetX86MapOrder((x86RegIndex)i, MapOrder);
+ m_x86reg_MapOrder[i] += 1;
}
}
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
@@ -792,7 +789,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
{
- CX86Ops::x86Reg x86Hi = CX86Ops::x86_Unknown, x86lo = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp x86Hi, x86lo;
if (MipsReg == 0)
{
if (HaveDebugger())
@@ -806,7 +803,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
if (IsUnknown(MipsReg) || IsConst(MipsReg))
{
x86Hi = FreeX86Reg();
- if (x86Hi < 0)
+ if (!x86Hi.isValid())
{
if (HaveDebugger())
{
@@ -817,7 +814,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
SetX86Protected(GetIndexFromX86Reg(x86Hi), true);
x86lo = FreeX86Reg();
- if (x86lo < 0)
+ if (!x86lo.isValid())
{
g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers");
return;
@@ -834,7 +831,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
{
SetX86Protected(GetIndexFromX86Reg(x86lo), true);
x86Hi = FreeX86Reg();
- if (x86Hi == CX86Ops::x86_Unknown)
+ if (!x86Hi.isValid())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
@@ -927,81 +924,81 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
SetMipsRegState(MipsReg, STATE_MAPPED_64);
}
-CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
+asmjit::x86::Gp CX86RegInfo::Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
{
- if (!Reg8Bit && Reg == CX86Ops::x86_Unknown)
+ if (!Reg8Bit && !Reg.isValid())
{
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
{
- Reg = CX86Ops::x86_EAX;
+ Reg = asmjit::x86::eax;
}
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
{
- Reg = CX86Ops::x86_EBX;
+ Reg = asmjit::x86::ebx;
}
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
{
- Reg = CX86Ops::x86_ECX;
+ Reg = asmjit::x86::ecx;
}
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
{
- Reg = CX86Ops::x86_EDX;
+ Reg = asmjit::x86::edx;
}
else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI))
{
- Reg = CX86Ops::x86_ESI;
+ Reg = asmjit::x86::esi;
}
else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI))
{
- Reg = CX86Ops::x86_EDI;
+ Reg = asmjit::x86::edi;
}
else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP))
{
- Reg = CX86Ops::x86_EBP;
+ Reg = asmjit::x86::ebp;
}
else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP))
{
- Reg = CX86Ops::x86_ESP;
+ Reg = asmjit::x86::esp;
}
- if (Reg == CX86Ops::x86_Unknown)
+ if (!Reg.isValid())
{
Reg = FreeX86Reg();
- if (Reg == CX86Ops::x86_Unknown)
+ if (!Reg.isValid())
{
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
g_Notify->BreakPoint(__FILE__, __LINE__);
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
}
}
- else if (Reg8Bit && Reg == CX86Ops::x86_Unknown)
+ else if (Reg8Bit && !Reg.isValid())
{
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
{
- Reg = CX86Ops::x86_EAX;
+ Reg = asmjit::x86::eax;
}
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
{
- Reg = CX86Ops::x86_EBX;
+ Reg = asmjit::x86::ebx;
}
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
{
- Reg = CX86Ops::x86_ECX;
+ Reg = asmjit::x86::ecx;
}
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
{
- Reg = CX86Ops::x86_EDX;
+ Reg = asmjit::x86::edx;
}
- if (Reg == CX86Ops::x86_Unknown)
+ if (!Reg.isValid())
{
Reg = Free8BitX86Reg();
- if (Reg < 0)
+ if (!Reg.isValid())
{
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free 8-bit register");
g_Notify->BreakPoint(__FILE__, __LINE__);
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
}
}
@@ -1011,11 +1008,11 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
{
WriteTrace(TraceRegisterCache, TraceError, "Register is protected");
g_Notify->BreakPoint(__FILE__, __LINE__);
- return CX86Ops::x86_Unknown;
+ return x86Reg_Unknown;
}
SetX86Protected(GetIndexFromX86Reg(Reg), true);
- CX86Ops::x86Reg NewReg = FreeX86Reg();
+ asmjit::x86::Gp NewReg = FreeX86Reg();
for (uint32_t i = 1; i < 32; i++)
{
if (!IsMapped(i))
@@ -1024,7 +1021,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
}
if (GetMipsRegMapLo(i) == Reg)
{
- if (NewReg == CX86Ops::x86_Unknown)
+ if (!NewReg.isValid())
{
UnMap_GPR(i, true);
break;
@@ -1042,7 +1039,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
}
if (Is64Bit(i) && GetMipsRegMapHi(i) == Reg)
{
- if (NewReg == CX86Ops::x86_Unknown)
+ if (!NewReg.isValid())
{
UnMap_GPR(i, true);
break;
@@ -1118,8 +1115,9 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
}
}
}
- SetX86Mapped(GetIndexFromX86Reg(Reg), Temp_Mapped);
- SetX86Protected(GetIndexFromX86Reg(Reg), true);
+ x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
+ SetX86Mapped(RegIndex, Temp_Mapped);
+ SetX86Protected(RegIndex, true);
for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{
int32_t MapOrder = GetX86MapOrder((x86RegIndex)i);
@@ -1128,7 +1126,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
SetX86MapOrder((x86RegIndex)i, MapOrder + 1);
}
}
- SetX86MapOrder(GetIndexFromX86Reg(Reg), 1);
+ SetX86MapOrder(RegIndex, 1);
return Reg;
}
@@ -1253,7 +1251,7 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
FixRoundModel(FpuRoundingModel(i));
RegPos = StackTopPos();
- CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false);
+ asmjit::x86::Gp TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
switch (m_x86fpu_State[StackTopPos()])
{
case FPU_Dword:
@@ -1356,9 +1354,9 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegMapLo(Reg));
if (Is64Bit(Reg))
{
- SetMipsRegMapLo(Reg, CX86Ops::x86_Unknown);
+ SetMipsRegMapLo(Reg, x86Reg_Unknown);
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapHi(Reg));
- SetMipsRegMapHi(Reg, CX86Ops::x86_Unknown);
+ SetMipsRegMapHi(Reg, x86Reg_Unknown);
}
else
{
@@ -1374,49 +1372,49 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
}
}
- SetMipsRegMapLo(Reg, CX86Ops::x86_Unknown);
+ SetMipsRegMapLo(Reg, x86Reg_Unknown);
}
SetMipsRegState(Reg, STATE_UNKNOWN);
}
-CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg()
+asmjit::x86::Gp CX86RegInfo::UnMap_TempReg()
{
- CX86Ops::x86Reg Reg = CX86Ops::x86_Unknown;
+ asmjit::x86::Gp Reg;
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
{
- Reg = CX86Ops::x86_EAX;
+ Reg = asmjit::x86::eax;
}
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
{
- Reg = CX86Ops::x86_EBX;
+ Reg = asmjit::x86::ebx;
}
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
{
- Reg = CX86Ops::x86_ECX;
+ Reg = asmjit::x86::ecx;
}
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
{
- Reg = CX86Ops::x86_EDX;
+ Reg = asmjit::x86::edx;
}
else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI))
{
- Reg = CX86Ops::x86_ESI;
+ Reg = asmjit::x86::esi;
}
else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI))
{
- Reg = CX86Ops::x86_EDI;
+ Reg = asmjit::x86::edi;
}
else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP))
{
- Reg = CX86Ops::x86_EBP;
+ Reg = asmjit::x86::ebp;
}
else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP))
{
- Reg = CX86Ops::x86_ESP;
+ Reg = asmjit::x86::esp;
}
- if (Reg != CX86Ops::x86_Unknown)
+ if (Reg.isValid())
{
if (GetX86Mapped(GetIndexFromX86Reg(Reg)) == Temp_Mapped)
{
@@ -1427,7 +1425,7 @@ CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg()
return Reg;
}
-bool CX86RegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg)
+bool CX86RegInfo::UnMap_X86reg(const asmjit::x86::Gp & Reg)
{
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
if (GetX86Mapped(RegIndex) == NotMapped)
@@ -1512,21 +1510,21 @@ void CX86RegInfo::WriteBackRegisters()
{
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
{
- m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
+ m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true;
}
if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000))
{
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
bEsiSign = true;
}
if ((GetMipsRegLo(count) & 0x80000000) != 0)
{
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_ESI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
}
else
{
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
}
}
@@ -1536,11 +1534,11 @@ void CX86RegInfo::WriteBackRegisters()
{
if (!bEdiZero)
{
- m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
+ m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true;
}
}
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
@@ -1548,11 +1546,11 @@ void CX86RegInfo::WriteBackRegisters()
{
if (!bEsiSign)
{
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
bEsiSign = true;
}
}
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_ESI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
}
else
{
@@ -1566,10 +1564,10 @@ void CX86RegInfo::WriteBackRegisters()
{
if (!bEdiZero)
{
- m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
+ m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true;
}
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
}
if (GetMipsRegLo(count) == 0)
@@ -1578,11 +1576,11 @@ void CX86RegInfo::WriteBackRegisters()
{
if (!bEdiZero)
{
- m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
+ m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true;
}
}
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
}
else
{
@@ -1593,22 +1591,22 @@ void CX86RegInfo::WriteBackRegisters()
case CX86RegInfo::STATE_CONST_64:
if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0)
{
- m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI);
+ m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true;
}
if (GetMipsRegLo(count) == 0xFFFFFFFF || GetMipsRegHi(count) == 0xFFFFFFFF)
{
- m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF);
+ m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
bEsiSign = true;
}
if (GetMipsRegHi(count) == 0)
{
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_ESI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
}
else
{
@@ -1617,11 +1615,11 @@ void CX86RegInfo::WriteBackRegisters()
if (GetMipsRegLo(count) == 0)
{
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
- m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_ESI);
+ m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
}
else
{
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h b/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h
index bd1506a33..30109b763 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h
@@ -2,6 +2,7 @@
#if defined(__i386__) || defined(_M_IX86)
#include
+#include
#include
#include
#include
@@ -19,8 +20,8 @@ enum x86RegIndex
x86RegIndex_Size,
};
-x86RegIndex GetIndexFromX86Reg(const CX86Ops::x86Reg & Reg);
-CX86Ops::x86Reg GetX86RegFromIndex(x86RegIndex Index);
+x86RegIndex GetIndexFromX86Reg(const asmjit::x86::Gp & Reg);
+asmjit::x86::Gp GetX86RegFromIndex(x86RegIndex Index);
class CX86RegInfo :
public CRegBase,
@@ -69,26 +70,26 @@ public:
void UnMap_FPR(int32_t Reg, bool WriteBackValue);
CX86Ops::x86FpuValues StackPosition(int32_t Reg);
- CX86Ops::x86Reg FreeX86Reg();
- CX86Ops::x86Reg Free8BitX86Reg();
+ asmjit::x86::Gp FreeX86Reg();
+ asmjit::x86::Gp Free8BitX86Reg();
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
- CX86Ops::x86Reg Get_MemoryStack() const;
- CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true);
- CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit);
+ asmjit::x86::Gp Get_MemoryStack() const;
+ asmjit::x86::Gp Map_MemoryStack(asmjit::x86::Gp Reg, bool bMapRegister, bool LoadValue = true);
+ asmjit::x86::Gp Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit);
void ProtectGPR(uint32_t MipsReg);
void UnProtectGPR(uint32_t MipsReg);
void ResetX86Protection();
- CX86Ops::x86Reg UnMap_TempReg();
+ asmjit::x86::Gp UnMap_TempReg();
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
- bool UnMap_X86reg(CX86Ops::x86Reg Reg);
+ bool UnMap_X86reg(const asmjit::x86::Gp & Reg);
void WriteBackRegisters();
- CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const
+ asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg) const
{
return m_RegMapLo[Reg];
}
- CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const
+ asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg) const
{
return m_RegMapHi[Reg];
}
@@ -106,11 +107,11 @@ public:
return m_x86reg_MappedTo[Reg];
}
- void SetMipsRegMapLo(int32_t GetMipsReg, CX86Ops::x86Reg Reg)
+ void SetMipsRegMapLo(int32_t GetMipsReg, const asmjit::x86::Gp & Reg)
{
m_RegMapLo[GetMipsReg] = Reg;
}
- void SetMipsRegMapHi(int32_t GetMipsReg, CX86Ops::x86Reg Reg)
+ void SetMipsRegMapHi(int32_t GetMipsReg, const asmjit::x86::Gp & Reg)
{
m_RegMapHi[GetMipsReg] = Reg;
}
@@ -150,11 +151,11 @@ private:
CCodeBlock & m_CodeBlock;
CX86Ops & m_Assembler;
- CX86Ops::x86Reg UnMap_8BitTempReg();
+ asmjit::x86::Gp UnMap_8BitTempReg();
// r4k
- CX86Ops::x86Reg m_RegMapHi[32];
- CX86Ops::x86Reg m_RegMapLo[32];
+ asmjit::x86::Gp m_RegMapHi[32];
+ asmjit::x86::Gp m_RegMapLo[32];
REG_MAPPED m_x86reg_MappedTo[x86RegIndex_Size];
uint32_t m_x86reg_MapOrder[x86RegIndex_Size];
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp b/Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
index df55f88f9..5fc0a8ee1 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
@@ -37,32 +37,32 @@ void CX86Ops::AdcConstToVariable(void * Variable, const char * VariableName, uin
AddCode8(Constant);
}
-void CX86Ops::AdcConstToX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::AdcConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
CodeLog(" adc %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- AddCode16((uint16_t)(0xD081 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xD081 + (RegValue(Reg) * 0x100)));
AddCode32(Const);
}
else
{
- AddCode16((uint16_t)(0xD083 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xD083 + (RegValue(Reg) * 0x100)));
AddCode8((uint8_t)Const);
}
}
-void CX86Ops::AdcVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::AdcVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" adc %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- AddCode16((uint16_t)(0x0513 + (Reg * 0x800)));
+ AddCode16((uint16_t)(0x0513 + (RegValue(Reg) * 0x800)));
AddCode32((uint32_t)Variable);
}
-void CX86Ops::AdcX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::AdcX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
CodeLog(" adc %s, %s", x86_Name(Destination), x86_Name(Source));
- AddCode16((uint16_t)(0xC013 + (Source * 0x100) + (Destination * 0x800)));
+ AddCode16((uint16_t)(0xC013 + (RegValue(Source) * 0x100) + (RegValue(Destination) * 0x800)));
}
void CX86Ops::AddConstToVariable(void * Variable, const char * VariableName, uint32_t Const)
@@ -73,7 +73,7 @@ void CX86Ops::AddConstToVariable(void * Variable, const char * VariableName, uin
AddCode32(Const);
}
-void CX86Ops::AddConstToX86Reg(x86Reg Reg, uint32_t Const, bool NeedCarry)
+void CX86Ops::AddConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const, bool NeedCarry)
{
if (Const == 0)
{
@@ -89,35 +89,35 @@ void CX86Ops::AddConstToX86Reg(x86Reg Reg, uint32_t Const, bool NeedCarry)
else if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
CodeLog(" add %s, %Xh", x86_Name(Reg), Const);
- AddCode16((uint16_t)(0xC081 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xC081 + (RegValue(Reg) * 0x100)));
AddCode32(Const);
}
else
{
CodeLog(" add %s, %Xh", x86_Name(Reg), Const);
- AddCode16((uint16_t)(0xC083 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xC083 + (RegValue(Reg) * 0x100)));
AddCode8((uint8_t)Const);
}
}
-void CX86Ops::AddVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::AddVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" add %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- AddCode16((uint16_t)(0x0503 + (Reg * 0x800)));
+ AddCode16((uint16_t)(0x0503 + (RegValue(Reg) * 0x800)));
AddCode32((uint32_t)Variable);
}
-void CX86Ops::AddX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg)
+void CX86Ops::AddX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg)
{
CodeLog(" add dword ptr [%s], %s", VariableName, x86_Name(Reg));
- AddCode16((uint16_t)(0x0501 + (Reg * 0x800)));
+ AddCode16((uint16_t)(0x0501 + (RegValue(Reg) * 0x800)));
AddCode32((uint32_t)Variable);
}
-void CX86Ops::AddX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::AddX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
CodeLog(" add %s, %s", x86_Name(Destination), x86_Name(Source));
- AddCode16((uint16_t)(0xC003 + (Source * 0x100) + (Destination * 0x800)));
+ AddCode16((uint16_t)(0xC003 + (RegValue(Source) * 0x100) + (RegValue(Destination) * 0x800)));
}
void CX86Ops::AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const)
@@ -128,41 +128,41 @@ void CX86Ops::AndConstToVariable(void * Variable, const char * VariableName, uin
AddCode32(Const);
}
-void CX86Ops::AndConstToX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::AndConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
CodeLog(" and %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- AddCode16((uint16_t)(0xE081 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xE081 + (RegValue(Reg) * 0x100)));
AddCode32(Const);
}
else
{
- AddCode16((uint16_t)(0xE083 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xE083 + (RegValue(Reg) * 0x100)));
AddCode8((uint8_t)Const);
}
}
-void CX86Ops::AndVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiply)
+void CX86Ops::AndVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiply)
{
CodeLog(" and %s, dword ptr [%s+%s*%i]", x86_Name(Reg), VariableName, x86_Name(AddrReg), Multiply);
- AddCode16((uint16_t)(0x0423 + (Reg * 0x800)));
- AddCode8((uint8_t)(0x05 + CalcMultiplyCode(Multiply) + (AddrReg * 0x8)));
+ AddCode16((uint16_t)(0x0423 + (RegValue(Reg) * 0x800)));
+ AddCode8((uint8_t)(0x05 + CalcMultiplyCode(Multiply) + (RegValue(AddrReg) * 0x8)));
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::AndVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::AndVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" and %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- AddCode16((uint16_t)(0x0523 + (Reg * 0x800)));
+ AddCode16((uint16_t)(0x0523 + (RegValue(Reg) * 0x800)));
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::AndX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::AndX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
CodeLog(" and %s, %s", x86_Name(Destination), x86_Name(Source));
- AddCode16((uint16_t)(0xC021 + (Destination * 0x100) + (Source * 0x800)));
+ AddCode16((uint16_t)(0xC021 + (RegValue(Destination) * 0x100) + (RegValue(Source) * 0x800)));
}
void CX86Ops::BreakPointNotification(const char * FileName, int32_t LineNumber)
@@ -182,7 +182,7 @@ void CX86Ops::X86BreakPoint(const char * FileName, int32_t LineNumber)
PushImm32(stdstr_f("%d", LineNumber).c_str(), LineNumber);
PushImm32(FileName, (uint32_t)FileName);
CallFunc((uint32_t)BreakPointNotification, "BreakPointNotification");
- AddConstToX86Reg(x86_ESP, 8);
+ AddConstToX86Reg(asmjit::x86::esp, 8);
Popad();
}
@@ -196,7 +196,7 @@ void CX86Ops::CallFunc(uint32_t FunctPtr, const char * FunctName)
#ifdef _MSC_VER
void CX86Ops::CallThis(uint32_t ThisPtr, uint32_t FunctPtr, char * FunctName, uint32_t /*StackSize*/)
{
- MoveConstToX86reg(CX86Ops::x86_ECX, ThisPtr);
+ MoveConstToX86reg(asmjit::x86::ecx, ThisPtr);
CallFunc(FunctPtr, FunctName);
}
#else
@@ -204,7 +204,7 @@ void CX86Ops::CallThis(uint32_t ThisPtr, uint32_t FunctPtr, char * FunctName, ui
{
PushImm32(ThisPtr);
CallFunc(FunctPtr, FunctName);
- AddConstToX86Reg(CX86Ops::x86_ESP, StackSize);
+ AddConstToX86Reg(CX86Ops::asmjit::x86::esp, StackSize);
}
#endif
@@ -216,7 +216,7 @@ void CX86Ops::CompConstToVariable(void * Variable, const char * VariableName, ui
AddCode32(Const);
}
-void CX86Ops::CompConstToX86reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::CompConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
if (Const == 0)
{
@@ -227,47 +227,47 @@ void CX86Ops::CompConstToX86reg(x86Reg Reg, uint32_t Const)
CodeLog(" cmp %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- AddCode16((uint16_t)(0xF881 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xF881 + (RegValue(Reg) * 0x100)));
AddCode32(Const);
}
else
{
- AddCode16((uint16_t)(0xF883 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xF883 + (RegValue(Reg) * 0x100)));
AddCode8((uint8_t)Const);
}
}
}
-void CX86Ops::CompConstToX86regPointer(x86Reg Reg, uint32_t Const)
+void CX86Ops::CompConstToX86regPointer(const asmjit::x86::Gp & Reg, uint32_t Const)
{
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
CodeLog(" cmp dword ptr [%s], %Xh", x86_Name(Reg), Const);
- AddCode16((uint16_t)(0x3881 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0x3881 + (RegValue(Reg) * 0x100)));
AddCode32(Const);
}
else
{
CodeLog(" cmp byte ptr [%s], %Xh", x86_Name(Reg), Const);
- AddCode16((uint16_t)(0x3883 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0x3883 + (RegValue(Reg) * 0x100)));
AddCode8((uint8_t)Const);
}
}
-void CX86Ops::CompX86regToVariable(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" cmp %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- AddCode16((uint16_t)(0x053B + (Reg * 0x800)));
+ AddCode16((uint16_t)(0x053B + (RegValue(Reg) * 0x800)));
AddCode32((uint32_t)Variable);
}
-void CX86Ops::CompX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::CompX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
CodeLog(" cmp %s, %s", x86_Name(Destination), x86_Name(Source));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command = 0x003B; break;
case x86_EBX: x86Command = 0x033B; break;
@@ -280,7 +280,7 @@ void CX86Ops::CompX86RegToX86Reg(x86Reg Destination, x86Reg Source)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -294,11 +294,11 @@ void CX86Ops::CompX86RegToX86Reg(x86Reg Destination, x86Reg Source)
AddCode16(x86Command);
}
-void CX86Ops::DecX86reg(x86Reg Reg)
+void CX86Ops::DecX86reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" dec %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xC8FF); break;
case x86_EBX: AddCode16(0xCBFF); break;
@@ -313,10 +313,10 @@ void CX86Ops::DecX86reg(x86Reg Reg)
}
}
-void CX86Ops::DivX86reg(x86Reg Reg)
+void CX86Ops::DivX86reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" div %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EBX: AddCode16(0xf3F7); break;
case x86_ECX: AddCode16(0xf1F7); break;
@@ -330,11 +330,11 @@ void CX86Ops::DivX86reg(x86Reg Reg)
}
}
-void CX86Ops::idivX86reg(x86Reg Reg)
+void CX86Ops::idivX86reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" idiv %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EBX: AddCode16(0xfbF7); break;
case x86_ECX: AddCode16(0xf9F7); break;
@@ -348,11 +348,11 @@ void CX86Ops::idivX86reg(x86Reg Reg)
}
}
-void CX86Ops::imulX86reg(x86Reg Reg)
+void CX86Ops::imulX86reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" imul %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE8F7); break;
case x86_EBX: AddCode16(0xEBF7); break;
@@ -367,11 +367,11 @@ void CX86Ops::imulX86reg(x86Reg Reg)
}
}
-void CX86Ops::IncX86reg(x86Reg Reg)
+void CX86Ops::IncX86reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" inc %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xC0FF); break;
case x86_EBX: AddCode16(0xC3FF); break;
@@ -505,11 +505,11 @@ void CX86Ops::JlLabel32(const char * Label, uint32_t Value)
AddCode32(Value);
}
-void CX86Ops::JmpDirectReg(x86Reg Reg)
+void CX86Ops::JmpDirectReg(const asmjit::x86::Gp & Reg)
{
CodeLog(" jmp %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE0ff); break;
case x86_EBX: AddCode16(0xE3ff); break;
@@ -529,11 +529,11 @@ void CX86Ops::JmpIndirectLabel32(const char * Label, uint32_t location)
AddCode32(location);
}
-void CX86Ops::JmpIndirectReg(x86Reg Reg)
+void CX86Ops::JmpIndirectReg(const asmjit::x86::Gp & Reg)
{
CodeLog(" jmp dword ptr [%s]", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x20ff); break;
case x86_EBX: AddCode16(0x23ff); break;
@@ -638,7 +638,7 @@ void CX86Ops::JzLabel32(const char * Label, uint32_t Value)
AddCode32(Value);
}
-void CX86Ops::LeaRegReg(x86Reg RegDest, x86Reg RegSrc, uint32_t Const, Multipler multiplier)
+void CX86Ops::LeaRegReg(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, uint32_t Const, Multipler multiplier)
{
if (Const != 0)
{
@@ -650,26 +650,26 @@ void CX86Ops::LeaRegReg(x86Reg RegDest, x86Reg RegSrc, uint32_t Const, Multipler
}
AddCode8(0x8D);
- AddCode8((uint8_t)(0x04 + (RegDest * 8)));
- AddCode8((uint8_t)(0x05 + (RegSrc * 8) + CalcMultiplyCode(multiplier)));
+ AddCode8((uint8_t)(0x04 + (RegValue(RegDest) * 8)));
+ AddCode8((uint8_t)(0x05 + (RegValue(RegSrc) * 8) + CalcMultiplyCode(multiplier)));
AddCode32(Const);
}
-void CX86Ops::LeaRegReg2(x86Reg RegDest, x86Reg RegSrc, x86Reg RegSrc2, Multipler multiplier)
+void CX86Ops::LeaRegReg2(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, const asmjit::x86::Gp & RegSrc2, Multipler multiplier)
{
CodeLog(" lea %s, [%s+%s*%i]", x86_Name(RegDest), x86_Name(RegSrc), x86_Name(RegSrc2), multiplier);
- if (RegSrc2 == x86_ESP || RegSrc2 == x86_EBP)
+ if (RegSrc2 == asmjit::x86::esp || RegSrc2 == asmjit::x86::ebp)
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
AddCode8(0x8D);
- AddCode8((uint8_t)(0x04 + (RegDest * 0x8)));
- AddCode8((uint8_t)(0x05 + (RegSrc * 0x8) + RegSrc2 + CalcMultiplyCode(multiplier)));
+ AddCode8((uint8_t)(0x04 + (RegValue(RegDest) * 0x8)));
+ AddCode8((uint8_t)(0x05 + (RegValue(RegSrc) * 0x8) + RegValue(RegSrc2) + CalcMultiplyCode(multiplier)));
}
-void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t offset)
+void CX86Ops::LeaSourceAndOffset(const asmjit::x86::Gp & x86DestReg, const asmjit::x86::Gp & x86SourceReg, int32_t offset)
{
uint16_t x86Command = 0;
@@ -678,7 +678,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t
// if ((offset & 0xFFFFFF80) != 0 && (offset & 0xFFFFFF80) != 0xFFFFFF80) {
if (1)
{
- switch (x86DestReg)
+ switch (RegValue(x86DestReg))
{
case x86_EAX: x86Command = 0x808D; break;
case x86_EBX: x86Command = 0x988D; break;
@@ -691,7 +691,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (x86SourceReg)
+ switch (RegValue(x86SourceReg))
{
case x86_EAX: x86Command += 0x0000; break;
case x86_EBX: x86Command += 0x0300; break;
@@ -709,7 +709,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t
}
else
{
- switch (x86DestReg)
+ switch (RegValue(x86DestReg))
{
case x86_EAX: x86Command = 0x408D; break;
case x86_EBX: x86Command = 0x588D; break;
@@ -722,7 +722,7 @@ void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (x86SourceReg)
+ switch (RegValue(x86SourceReg))
{
case x86_EAX: x86Command += 0x0000; break;
case x86_EBX: x86Command += 0x0300; break;
@@ -757,7 +757,7 @@ void CX86Ops::MoveConstHalfToVariable(void * Variable, const char * VariableName
AddCode16(Const);
}
-void CX86Ops::MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint16_t Const)
+void CX86Ops::MoveConstHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint16_t Const)
{
uint8_t Param = 0;
@@ -766,7 +766,7 @@ void CX86Ops::MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uin
AddCode8(0x66);
AddCode16(0x04C7);
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -778,7 +778,7 @@ void CX86Ops::MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uin
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -795,10 +795,10 @@ void CX86Ops::MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uin
AddCode16(Const);
}
-void CX86Ops::MoveConstToMemoryDisp(x86Reg AddrReg, uint32_t Disp, uint32_t Const)
+void CX86Ops::MoveConstToMemoryDisp(const asmjit::x86::Gp & AddrReg, uint32_t Disp, uint32_t Const)
{
CodeLog(" mov dword ptr [%s+%Xh], %Xh", x86_Name(AddrReg), Disp, Const);
- switch (AddrReg)
+ switch (RegValue(AddrReg))
{
case x86_EAX: AddCode16(0x80C7); break;
case x86_EBX: AddCode16(0x83C7); break;
@@ -823,14 +823,14 @@ void CX86Ops::MoveConstToVariable(void * Variable, const char * VariableName, ui
AddCode32(Const);
}
-void CX86Ops::MoveConstToX86Pointer(x86Reg X86Pointer, uint32_t Const)
+void CX86Ops::MoveConstToX86Pointer(const asmjit::x86::Gp & X86Pointer, uint32_t Const)
{
CodeLog(" mov dword ptr [%s], %Xh", x86_Name(X86Pointer), Const);
- AddCode16((uint16_t)(0x00C7 + (X86Pointer * 0x100)));
+ AddCode16((uint16_t)(0x00C7 + (RegValue(X86Pointer) * 0x100)));
AddCode32(Const);
}
-void CX86Ops::MoveConstToX86reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
if (Const == 0)
{
@@ -839,12 +839,12 @@ void CX86Ops::MoveConstToX86reg(x86Reg Reg, uint32_t Const)
else
{
CodeLog(" mov %s, %Xh", x86_Name(Reg), Const);
- AddCode16((uint16_t)(0xC0C7 + (Reg * 0x100)));
+ AddCode16((uint16_t)(0xC0C7 + (RegValue(Reg) * 0x100)));
AddCode32(Const);
}
}
-void CX86Ops::MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint8_t Const)
+void CX86Ops::MoveConstByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t Const)
{
uint8_t Param = 0;
@@ -852,7 +852,7 @@ void CX86Ops::MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uin
AddCode16(0x04C6);
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -864,7 +864,7 @@ void CX86Ops::MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uin
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -881,7 +881,7 @@ void CX86Ops::MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uin
AddCode8(Const);
}
-void CX86Ops::MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_t Const)
+void CX86Ops::MoveConstToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint32_t Const)
{
uint8_t Param = 0;
@@ -889,7 +889,7 @@ void CX86Ops::MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_
AddCode16(0x04C7);
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -901,7 +901,7 @@ void CX86Ops::MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -918,14 +918,14 @@ void CX86Ops::MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_
AddCode32(Const);
}
-void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2)
+void CX86Ops::MoveSxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2)
{
uint8_t Param = 0;
CodeLog(" movsx %s, byte ptr [%s+%s]", x86_Name(Reg), x86_Name(AddrReg1), x86_Name(AddrReg2));
AddCode16(0xBE0F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x04); break;
case x86_EBX: AddCode8(0x1C); break;
@@ -939,7 +939,7 @@ void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -951,7 +951,7 @@ void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -967,14 +967,14 @@ void CX86Ops::MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
AddCode8(Param);
}
-void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2)
+void CX86Ops::MoveSxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2)
{
uint8_t Param = 0;
CodeLog(" movsx %s, word ptr [%s+%s]", x86_Name(Reg), x86_Name(AddrReg1), x86_Name(AddrReg2));
AddCode16(0xBF0F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x04); break;
case x86_EBX: AddCode8(0x1C); break;
@@ -988,7 +988,7 @@ void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1000,7 +1000,7 @@ void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1016,13 +1016,13 @@ void CX86Ops::MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
AddCode8(Param);
}
-void CX86Ops::MoveSxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::MoveSxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" movsx %s, byte ptr [%s]", x86_Name(Reg), VariableName);
AddCode16(0xbe0f);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x05); break;
case x86_EBX: AddCode8(0x1D); break;
@@ -1038,13 +1038,13 @@ void CX86Ops::MoveSxVariableToX86regByte(x86Reg Reg, void * Variable, const char
AddCode32((uint32_t)Variable);
}
-void CX86Ops::MoveSxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::MoveSxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" movsx %s, word ptr [%s]", x86_Name(Reg), VariableName);
AddCode16(0xbf0f);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x05); break;
case x86_EBX: AddCode8(0x1D); break;
@@ -1060,10 +1060,10 @@ void CX86Ops::MoveSxVariableToX86regHalf(x86Reg Reg, void * Variable, const char
AddCode32((uint32_t)Variable);
}
-void CX86Ops::MoveVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::MoveVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" mov %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x058B); break;
case x86_EBX: AddCode16(0x1D8B); break;
@@ -1079,13 +1079,13 @@ void CX86Ops::MoveVariableToX86reg(x86Reg Reg, void * Variable, const char * Var
AddCode32((uint32_t)Variable);
}
-void CX86Ops::MoveVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiplier)
+void CX86Ops::MoveVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiplier)
{
CodeLog(" mov %s, dword ptr [%s+%s*%i]", x86_Name(Reg), VariableName, x86_Name(AddrReg), Multiplier);
AddCode8(0x8B);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x04); break;
case x86_EBX: AddCode8(0x1C); break;
@@ -1103,7 +1103,7 @@ void CX86Ops::MoveVariableDispToX86Reg(x86Reg Reg, void * Variable, const char *
uint8_t x = CalcMultiplyCode(Multiplier);
// Format xx|000000
- switch (AddrReg)
+ switch (RegValue(AddrReg))
{
case x86_EAX: AddCode8((uint8_t)(0x05 | x)); break;
case x86_EBX: AddCode8((uint8_t)(0x1D | x)); break;
@@ -1120,11 +1120,11 @@ void CX86Ops::MoveVariableDispToX86Reg(x86Reg Reg, void * Variable, const char *
AddCode32((uint32_t)Variable);
}
-void CX86Ops::MoveX86regByteToVariable(void * Variable, const char * VariableName, x86Reg Reg)
+void CX86Ops::MoveX86regByteToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg)
{
CodeLog(" mov byte ptr [%s], %s", VariableName, x86_ByteName(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0588); break;
case x86_EBX: AddCode16(0x1D88); break;
@@ -1136,13 +1136,13 @@ void CX86Ops::MoveX86regByteToVariable(void * Variable, const char * VariableNam
AddCode32((uint32_t)Variable);
}
-void CX86Ops::MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg)
+void CX86Ops::MoveX86regByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg)
{
uint8_t Param = 0;
CodeLog(" mov byte ptr [%s+%s],%s", x86_Name(AddrReg1), x86_Name(AddrReg2), x86_ByteName(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0488); break;
case x86_EBX: AddCode16(0x1C88); break;
@@ -1156,7 +1156,7 @@ void CX86Ops::MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x8
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1168,7 +1168,7 @@ void CX86Ops::MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x8
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1184,11 +1184,11 @@ void CX86Ops::MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x8
AddCode8(Param);
}
-void CX86Ops::MoveX86regHalfToVariable(void * Variable, const char * VariableName, x86Reg Reg)
+void CX86Ops::MoveX86regHalfToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg)
{
CodeLog(" mov word ptr [%s], %s", VariableName, x86_HalfName(Reg));
AddCode8(0x66);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0589); break;
case x86_EBX: AddCode16(0x1D89); break;
@@ -1204,14 +1204,14 @@ void CX86Ops::MoveX86regHalfToVariable(void * Variable, const char * VariableNam
AddCode32((uint32_t)Variable);
}
-void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg)
+void CX86Ops::MoveX86regHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg)
{
uint8_t Param = 0;
CodeLog(" mov word ptr [%s+%s],%s", x86_Name(AddrReg1), x86_Name(AddrReg2), x86_HalfName(Reg));
AddCode8(0x66);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0489); break;
case x86_EBX: AddCode16(0x1C89); break;
@@ -1225,7 +1225,7 @@ void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x8
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1237,7 +1237,7 @@ void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x8
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1253,13 +1253,13 @@ void CX86Ops::MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x8
AddCode8(Param);
}
-void CX86Ops::MoveX86PointerToX86reg(x86Reg Reg, x86Reg X86Pointer)
+void CX86Ops::MoveX86PointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer)
{
uint16_t x86Command = 0;
CodeLog(" mov %s, dword ptr [%s]", x86_Name(Reg), x86_Name(X86Pointer));
- switch (X86Pointer)
+ switch (RegValue(X86Pointer))
{
case x86_EAX: x86Command = 0x008B; break;
case x86_EBX: x86Command = 0x038B; break;
@@ -1271,7 +1271,7 @@ void CX86Ops::MoveX86PointerToX86reg(x86Reg Reg, x86Reg X86Pointer)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: x86Command += 0x0000; break;
case x86_EBX: x86Command += 0x1800; break;
@@ -1287,13 +1287,13 @@ void CX86Ops::MoveX86PointerToX86reg(x86Reg Reg, x86Reg X86Pointer)
AddCode16(x86Command);
}
-void CX86Ops::MoveX86PointerToX86regDisp(x86Reg Reg, x86Reg X86Pointer, uint8_t Disp)
+void CX86Ops::MoveX86PointerToX86regDisp(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer, uint8_t Disp)
{
uint16_t x86Command = 0;
CodeLog(" mov %s, dword ptr [%s] + %d", x86_Name(Reg), x86_Name(X86Pointer), Disp);
- switch (X86Pointer)
+ switch (RegValue(X86Pointer))
{
case x86_EAX: x86Command = 0x408B; break;
case x86_EBX: x86Command = 0x438B; break;
@@ -1305,7 +1305,7 @@ void CX86Ops::MoveX86PointerToX86regDisp(x86Reg Reg, x86Reg X86Pointer, uint8_t
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: x86Command += 0x0000; break;
case x86_EBX: x86Command += 0x1800; break;
@@ -1322,13 +1322,13 @@ void CX86Ops::MoveX86PointerToX86regDisp(x86Reg Reg, x86Reg X86Pointer, uint8_t
AddCode8(Disp);
}
-void CX86Ops::MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2)
+void CX86Ops::MoveX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2)
{
uint8_t Param = 0;
CodeLog(" mov %s, dword ptr [%s+%s]", x86_Name(Reg), x86_Name(AddrReg1), x86_Name(AddrReg2));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x048B); break;
case x86_EBX: AddCode16(0x1C8B); break;
@@ -1342,7 +1342,7 @@ void CX86Ops::MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg Addr
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1354,7 +1354,7 @@ void CX86Ops::MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg Addr
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1370,13 +1370,13 @@ void CX86Ops::MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg Addr
AddCode8(Param);
}
-void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2, uint8_t offset)
+void CX86Ops::MoveX86regPointerToX86regDisp8(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t offset)
{
uint8_t Param = 0;
CodeLog(" mov %s, dword ptr [%s+%s]", x86_Name(Reg), x86_Name(AddrReg1), x86_Name(AddrReg2));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x448B); break;
case x86_EBX: AddCode16(0x5C8B); break;
@@ -1390,7 +1390,7 @@ void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1402,7 +1402,7 @@ void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1419,12 +1419,12 @@ void CX86Ops::MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg
AddCode8(offset);
}
-void CX86Ops::MoveX86regToMemory(x86Reg AddrReg, uint32_t Disp, x86Reg Reg)
+void CX86Ops::MoveX86regToMemory(const asmjit::x86::Gp & AddrReg, uint32_t Disp, const asmjit::x86::Gp & Reg)
{
uint16_t x86Command = 0;
CodeLog(" mov dword ptr [%s+%X], %s", x86_Name(AddrReg), Disp, x86_Name(Reg));
- switch (AddrReg)
+ switch (RegValue(AddrReg))
{
case x86_EAX: x86Command = 0x0089; break;
case x86_EBX: x86Command = 0x0389; break;
@@ -1437,7 +1437,7 @@ void CX86Ops::MoveX86regToMemory(x86Reg AddrReg, uint32_t Disp, x86Reg Reg)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: x86Command += 0x8000; break;
case x86_EBX: x86Command += 0x9800; break;
@@ -1454,10 +1454,10 @@ void CX86Ops::MoveX86regToMemory(x86Reg AddrReg, uint32_t Disp, x86Reg Reg)
AddCode32(Disp);
}
-void CX86Ops::MoveX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg)
+void CX86Ops::MoveX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg)
{
CodeLog(" mov dword ptr [%s], %s", VariableName, x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0589); break;
case x86_EBX: AddCode16(0x1D89); break;
@@ -1473,7 +1473,7 @@ void CX86Ops::MoveX86regToVariable(void * Variable, const char * VariableName, x
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::MoveX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
@@ -1483,7 +1483,7 @@ void CX86Ops::MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source)
}
CodeLog(" mov %s, %s", x86_Name(Destination), x86_Name(Source));
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command = 0x0089; break;
case x86_EBX: x86Command = 0x0389; break;
@@ -1497,7 +1497,7 @@ void CX86Ops::MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -1513,13 +1513,13 @@ void CX86Ops::MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source)
AddCode16(x86Command);
}
-void CX86Ops::MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg)
+void CX86Ops::MoveX86regToX86Pointer(const asmjit::x86::Gp & X86Pointer, const asmjit::x86::Gp & Reg)
{
uint16_t x86Command = 0;
CodeLog(" mov dword ptr [%s], %s", x86_Name(X86Pointer), x86_Name(Reg));
- switch (X86Pointer)
+ switch (RegValue(X86Pointer))
{
case x86_EAX: x86Command = 0x0089; break;
case x86_EBX: x86Command = 0x0389; break;
@@ -1531,7 +1531,7 @@ void CX86Ops::MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: x86Command += 0x0000; break;
case x86_EBX: x86Command += 0x1800; break;
@@ -1547,13 +1547,13 @@ void CX86Ops::MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg)
AddCode16(x86Command);
}
-void CX86Ops::MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg)
+void CX86Ops::MoveX86regToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg)
{
uint8_t Param = 0;
CodeLog(" mov dword ptr [%s+%s],%s", x86_Name(AddrReg1), x86_Name(AddrReg2), x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0489); break;
case x86_EBX: AddCode16(0x1C89); break;
@@ -1567,7 +1567,7 @@ void CX86Ops::MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1579,7 +1579,7 @@ void CX86Ops::MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1595,14 +1595,14 @@ void CX86Ops::MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg
AddCode8(Param);
}
-void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2)
+void CX86Ops::MoveZxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2)
{
uint8_t Param = 0;
CodeLog(" movzx %s, byte ptr [%s+%s]", x86_Name(Reg), x86_Name(AddrReg1), x86_Name(AddrReg2));
AddCode16(0xB60F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x04); break;
case x86_EBX: AddCode8(0x1C); break;
@@ -1616,7 +1616,7 @@ void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1628,7 +1628,7 @@ void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1644,14 +1644,14 @@ void CX86Ops::MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
AddCode8(Param);
}
-void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2)
+void CX86Ops::MoveZxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2)
{
uint8_t Param = 0;
CodeLog(" movzx %s, word ptr [%s+%s]", x86_Name(Reg), x86_Name(AddrReg1), x86_Name(AddrReg2));
AddCode16(0xB70F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x04); break;
case x86_EBX: AddCode8(0x1C); break;
@@ -1665,7 +1665,7 @@ void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg1)
+ switch (RegValue(AddrReg1))
{
case x86_EAX: Param = 0x00; break;
case x86_EBX: Param = 0x03; break;
@@ -1677,7 +1677,7 @@ void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (AddrReg2)
+ switch (RegValue(AddrReg2))
{
case x86_EAX: Param += 0x00; break;
case x86_EBX: Param += 0x18; break;
@@ -1693,13 +1693,13 @@ void CX86Ops::MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Re
AddCode8(Param);
}
-void CX86Ops::MoveZxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::MoveZxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" movzx %s, byte ptr [%s]", x86_Name(Reg), VariableName);
AddCode16(0xb60f);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x05); break;
case x86_EBX: AddCode8(0x1D); break;
@@ -1715,13 +1715,13 @@ void CX86Ops::MoveZxVariableToX86regByte(x86Reg Reg, void * Variable, const char
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::MoveZxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::MoveZxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" movzx %s, word ptr [%s]", x86_Name(Reg), VariableName);
AddCode16(0xb70f);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x05); break;
case x86_EBX: AddCode8(0x1D); break;
@@ -1737,10 +1737,10 @@ void CX86Ops::MoveZxVariableToX86regHalf(x86Reg Reg, void * Variable, const char
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::MulX86reg(x86Reg Reg)
+void CX86Ops::MulX86reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" mul %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE0F7); break;
case x86_EBX: AddCode16(0xE3F7); break;
@@ -1755,10 +1755,10 @@ void CX86Ops::MulX86reg(x86Reg Reg)
}
}
-void CX86Ops::NotX86Reg(x86Reg Reg)
+void CX86Ops::NotX86Reg(const asmjit::x86::Gp & Reg)
{
CodeLog(" not %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xD0F7); break;
case x86_EBX: AddCode16(0xD3F7); break;
@@ -1781,7 +1781,7 @@ void CX86Ops::OrConstToVariable(void * Variable, const char * VariableName, uint
AddCode32(Const);
}
-void CX86Ops::OrConstToX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::OrConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
if (Const == 0)
{
@@ -1790,7 +1790,7 @@ void CX86Ops::OrConstToX86Reg(x86Reg Reg, uint32_t Const)
CodeLog(" or %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xC881); break;
case x86_EBX: AddCode16(0xCB81); break;
@@ -1807,7 +1807,7 @@ void CX86Ops::OrConstToX86Reg(x86Reg Reg, uint32_t Const)
}
else
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xC883); break;
case x86_EBX: AddCode16(0xCB83); break;
@@ -1824,10 +1824,10 @@ void CX86Ops::OrConstToX86Reg(x86Reg Reg, uint32_t Const)
}
}
-void CX86Ops::OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::OrVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" or %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x050B); break;
case x86_EBX: AddCode16(0x1D0B); break;
@@ -1843,10 +1843,10 @@ void CX86Ops::OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * Varia
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg)
+void CX86Ops::OrX86RegToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg)
{
CodeLog(" or dword ptr [%s], %s", VariableName, x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0509); break;
case x86_EBX: AddCode16(0x1D09); break;
@@ -1862,12 +1862,12 @@ void CX86Ops::OrX86RegToVariable(void * Variable, const char * VariableName, x86
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::OrX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::OrX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
CodeLog(" or %s, %s", x86_Name(Destination), x86_Name(Source));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command = 0x000B; break;
case x86_EBX: x86Command = 0x030B; break;
@@ -1880,7 +1880,7 @@ void CX86Ops::OrX86RegToX86Reg(x86Reg Destination, x86Reg Source)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -1908,11 +1908,11 @@ void CX86Ops::Pushad(void)
AddCode8(0x60);
}
-void CX86Ops::Push(x86Reg Reg)
+void CX86Ops::Push(const asmjit::x86::Gp & Reg)
{
CodeLog(" push %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x50); break;
case x86_EBX: AddCode8(0x53); break;
@@ -1927,11 +1927,11 @@ void CX86Ops::Push(x86Reg Reg)
}
}
-void CX86Ops::Pop(x86Reg Reg)
+void CX86Ops::Pop(const asmjit::x86::Gp & Reg)
{
CodeLog(" pop %s", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0x58); break;
case x86_EBX: AddCode8(0x5B); break;
@@ -1971,11 +1971,11 @@ void CX86Ops::Ret(void)
AddCode8(0xC3);
}
-void CX86Ops::Seta(x86Reg Reg)
+void CX86Ops::Seta(const asmjit::x86::Gp & Reg)
{
CodeLog(" seta %s", x86_ByteName(Reg));
AddCode16(0x970F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -1994,11 +1994,11 @@ void CX86Ops::SetaVariable(void * Variable, const char * VariableName)
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::Setae(x86Reg Reg)
+void CX86Ops::Setae(const asmjit::x86::Gp & Reg)
{
CodeLog(" setae %s", x86_ByteName(Reg));
AddCode16(0x930F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -2009,11 +2009,11 @@ void CX86Ops::Setae(x86Reg Reg)
}
}
-void CX86Ops::Setb(x86Reg Reg)
+void CX86Ops::Setb(const asmjit::x86::Gp & Reg)
{
CodeLog(" setb %s", x86_ByteName(Reg));
AddCode16(0x920F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -2032,11 +2032,11 @@ void CX86Ops::SetbVariable(void * Variable, const char * VariableName)
AddCode32((uint32_t)(Variable));
}
-void CX86Ops::Setg(x86Reg Reg)
+void CX86Ops::Setg(const asmjit::x86::Gp & Reg)
{
CodeLog(" setg %s", x86_ByteName(Reg));
AddCode16(0x9F0F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -2055,11 +2055,11 @@ void CX86Ops::SetgVariable(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::Setl(x86Reg Reg)
+void CX86Ops::Setl(const asmjit::x86::Gp & Reg)
{
CodeLog(" setl %s", x86_ByteName(Reg));
AddCode16(0x9C0F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -2078,11 +2078,11 @@ void CX86Ops::SetlVariable(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::Setz(x86Reg Reg)
+void CX86Ops::Setz(const asmjit::x86::Gp & Reg)
{
CodeLog(" setz %s", x86_ByteName(Reg));
AddCode16(0x940F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -2093,11 +2093,11 @@ void CX86Ops::Setz(x86Reg Reg)
}
}
-void CX86Ops::Setnz(x86Reg Reg)
+void CX86Ops::Setnz(const asmjit::x86::Gp & Reg)
{
CodeLog(" setnz %s", x86_ByteName(Reg));
AddCode16(0x950F);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xC0); break;
case x86_EBX: AddCode8(0xC3); break;
@@ -2108,14 +2108,14 @@ void CX86Ops::Setnz(x86Reg Reg)
}
}
-void CX86Ops::ShiftLeftDouble(x86Reg Destination, x86Reg Source)
+void CX86Ops::ShiftLeftDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint8_t s = 0xC0;
CodeLog(" shld %s, %s, cl", x86_Name(Destination), x86_Name(Source));
AddCode16(0xA50F);
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: s |= 0x00; break;
case x86_EBX: s |= 0x03; break;
@@ -2129,7 +2129,7 @@ void CX86Ops::ShiftLeftDouble(x86Reg Destination, x86Reg Source)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: s |= 0x00 << 3; break;
case x86_EBX: s |= 0x03 << 3; break;
@@ -2146,14 +2146,14 @@ void CX86Ops::ShiftLeftDouble(x86Reg Destination, x86Reg Source)
AddCode8(s);
}
-void CX86Ops::ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate)
+void CX86Ops::ShiftLeftDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate)
{
uint8_t s = 0xC0;
CodeLog(" shld %s, %s, %Xh", x86_Name(Destination), x86_Name(Source), Immediate);
AddCode16(0xA40F);
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: s |= 0x00; break;
case x86_EBX: s |= 0x03; break;
@@ -2167,7 +2167,7 @@ void CX86Ops::ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Im
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: s |= 0x00 << 3; break;
case x86_EBX: s |= 0x03 << 3; break;
@@ -2185,10 +2185,10 @@ void CX86Ops::ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Im
AddCode8(Immediate);
}
-void CX86Ops::ShiftLeftSign(x86Reg Reg)
+void CX86Ops::ShiftLeftSign(const asmjit::x86::Gp & Reg)
{
CodeLog(" shl %s, cl", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE0D3); break;
case x86_EBX: AddCode16(0xE3D3); break;
@@ -2203,10 +2203,10 @@ void CX86Ops::ShiftLeftSign(x86Reg Reg)
}
}
-void CX86Ops::ShiftLeftSignImmed(x86Reg Reg, uint8_t Immediate)
+void CX86Ops::ShiftLeftSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate)
{
CodeLog(" shl %s, %Xh", x86_Name(Reg), Immediate);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE0C1); break;
case x86_EBX: AddCode16(0xE3C1); break;
@@ -2222,10 +2222,10 @@ void CX86Ops::ShiftLeftSignImmed(x86Reg Reg, uint8_t Immediate)
AddCode8(Immediate);
}
-void CX86Ops::ShiftRightSign(x86Reg Reg)
+void CX86Ops::ShiftRightSign(const asmjit::x86::Gp & Reg)
{
CodeLog(" sar %s, cl", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xF8D3); break;
case x86_EBX: AddCode16(0xFBD3); break;
@@ -2240,10 +2240,10 @@ void CX86Ops::ShiftRightSign(x86Reg Reg)
}
}
-void CX86Ops::ShiftRightSignImmed(x86Reg Reg, uint8_t Immediate)
+void CX86Ops::ShiftRightSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate)
{
CodeLog(" sar %s, %Xh", x86_Name(Reg), Immediate);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xF8C1); break;
case x86_EBX: AddCode16(0xFBC1); break;
@@ -2259,10 +2259,10 @@ void CX86Ops::ShiftRightSignImmed(x86Reg Reg, uint8_t Immediate)
AddCode8(Immediate);
}
-void CX86Ops::ShiftRightUnsign(x86Reg Reg)
+void CX86Ops::ShiftRightUnsign(const asmjit::x86::Gp & Reg)
{
CodeLog(" shr %s, cl", x86_Name(Reg));
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE8D3); break;
case x86_EBX: AddCode16(0xEBD3); break;
@@ -2277,14 +2277,14 @@ void CX86Ops::ShiftRightUnsign(x86Reg Reg)
}
}
-void CX86Ops::ShiftRightDouble(x86Reg Destination, x86Reg Source)
+void CX86Ops::ShiftRightDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint8_t s = 0xC0;
CodeLog(" shrd %s, %s, cl", x86_Name(Destination), x86_Name(Source));
AddCode16(0xAD0F);
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: s |= 0x00; break;
case x86_EBX: s |= 0x03; break;
@@ -2298,7 +2298,7 @@ void CX86Ops::ShiftRightDouble(x86Reg Destination, x86Reg Source)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: s |= 0x00 << 3; break;
case x86_EBX: s |= 0x03 << 3; break;
@@ -2315,14 +2315,14 @@ void CX86Ops::ShiftRightDouble(x86Reg Destination, x86Reg Source)
AddCode8(s);
}
-void CX86Ops::ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate)
+void CX86Ops::ShiftRightDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate)
{
uint8_t s = 0xC0;
CodeLog(" shrd %s, %s, %Xh", x86_Name(Destination), x86_Name(Source), Immediate);
AddCode16(0xAC0F);
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: s |= 0x00; break;
case x86_EBX: s |= 0x03; break;
@@ -2336,7 +2336,7 @@ void CX86Ops::ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t I
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: s |= 0x00 << 3; break;
case x86_EBX: s |= 0x03 << 3; break;
@@ -2354,10 +2354,10 @@ void CX86Ops::ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t I
AddCode8(Immediate);
}
-void CX86Ops::ShiftRightUnsignImmed(x86Reg Reg, uint8_t Immediate)
+void CX86Ops::ShiftRightUnsignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate)
{
CodeLog(" shr %s, %Xh", x86_Name(Reg), Immediate);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE8C1); break;
case x86_EBX: AddCode16(0xEBC1); break;
@@ -2373,12 +2373,12 @@ void CX86Ops::ShiftRightUnsignImmed(x86Reg Reg, uint8_t Immediate)
AddCode8(Immediate);
}
-void CX86Ops::SbbConstFromX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::SbbConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
CodeLog(" sbb %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xD881); break;
case x86_EBX: AddCode16(0xDB81); break;
@@ -2395,7 +2395,7 @@ void CX86Ops::SbbConstFromX86Reg(x86Reg Reg, uint32_t Const)
}
else
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xD883); break;
case x86_EBX: AddCode16(0xDB83); break;
@@ -2412,10 +2412,10 @@ void CX86Ops::SbbConstFromX86Reg(x86Reg Reg, uint32_t Const)
}
}
-void CX86Ops::SbbVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::SbbVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" sbb %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x051B); break;
case x86_EBX: AddCode16(0x1D1B); break;
@@ -2431,11 +2431,11 @@ void CX86Ops::SbbVariableFromX86reg(x86Reg Reg, void * Variable, const char * Va
AddCode32((uint32_t)Variable);
}
-void CX86Ops::SbbX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::SbbX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
CodeLog(" sbb %s, %s", x86_Name(Destination), x86_Name(Source));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command = 0x001B; break;
case x86_EBX: x86Command = 0x031B; break;
@@ -2448,7 +2448,7 @@ void CX86Ops::SbbX86RegToX86Reg(x86Reg Destination, x86Reg Source)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -2473,12 +2473,12 @@ void CX86Ops::SubConstFromVariable(uint32_t Const, void * Variable, const char *
AddCode32(Const);
}
-void CX86Ops::SubConstFromX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::SubConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
CodeLog(" sub %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE881); break;
case x86_EBX: AddCode16(0xEB81); break;
@@ -2495,7 +2495,7 @@ void CX86Ops::SubConstFromX86Reg(x86Reg Reg, uint32_t Const)
}
else
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xE883); break;
case x86_EBX: AddCode16(0xEB83); break;
@@ -2512,11 +2512,11 @@ void CX86Ops::SubConstFromX86Reg(x86Reg Reg, uint32_t Const)
}
}
-void CX86Ops::SubVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::SubVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" sub %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x052B); break;
case x86_EBX: AddCode16(0x1D2B); break;
@@ -2532,12 +2532,12 @@ void CX86Ops::SubVariableFromX86reg(x86Reg Reg, void * Variable, const char * Va
AddCode32((uint32_t)Variable);
}
-void CX86Ops::SubX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::SubX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
CodeLog(" sub %s, %s", x86_Name(Destination), x86_Name(Source));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command = 0x002B; break;
case x86_EBX: x86Command = 0x032B; break;
@@ -2551,7 +2551,7 @@ void CX86Ops::SubX86RegToX86Reg(x86Reg Destination, x86Reg Source)
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -2567,11 +2567,11 @@ void CX86Ops::SubX86RegToX86Reg(x86Reg Destination, x86Reg Source)
AddCode16(x86Command);
}
-void CX86Ops::TestConstToX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::TestConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
CodeLog(" test %s, 0x%X", x86_Name(Reg), Const);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode8(0xA9); break;
case x86_EBX: AddCode16(0xC3F7); break;
@@ -2595,11 +2595,11 @@ void CX86Ops::TestVariable(void * Variable, const char * VariableName, uint32_t
AddCode32(Const);
}
-void CX86Ops::TestX86RegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::TestX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
CodeLog(" test %s, %s", x86_Name(Destination), x86_Name(Source));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command = 0x0085; break;
case x86_EBX: x86Command = 0x0385; break;
@@ -2612,7 +2612,7 @@ void CX86Ops::TestX86RegToX86Reg(x86Reg Destination, x86Reg Source)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -2628,11 +2628,11 @@ void CX86Ops::TestX86RegToX86Reg(x86Reg Destination, x86Reg Source)
AddCode16(x86Command);
}
-void CX86Ops::TestX86ByteRegToX86Reg(x86Reg Destination, x86Reg Source)
+void CX86Ops::TestX86ByteRegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source)
{
uint16_t x86Command = 0;
CodeLog(" test %s, %s", x86_ByteName(Destination), x86_ByteName(Source));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_AL: x86Command = 0x0084; break;
case x86_BL: x86Command = 0x0384; break;
@@ -2641,7 +2641,7 @@ void CX86Ops::TestX86ByteRegToX86Reg(x86Reg Destination, x86Reg Source)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_AL: x86Command += 0xC000; break;
case x86_BL: x86Command += 0xD800; break;
@@ -2653,12 +2653,12 @@ void CX86Ops::TestX86ByteRegToX86Reg(x86Reg Destination, x86Reg Source)
AddCode16(x86Command);
}
-void CX86Ops::XorConstToX86Reg(x86Reg Reg, uint32_t Const)
+void CX86Ops::XorConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const)
{
CodeLog(" xor %s, %Xh", x86_Name(Reg), Const);
if ((Const & 0xFFFFFF80) != 0 && (Const & 0xFFFFFF80) != 0xFFFFFF80)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xF081); break;
case x86_EBX: AddCode16(0xF381); break;
@@ -2675,7 +2675,7 @@ void CX86Ops::XorConstToX86Reg(x86Reg Reg, uint32_t Const)
}
else
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0xF083); break;
case x86_EBX: AddCode16(0xF383); break;
@@ -2692,13 +2692,13 @@ void CX86Ops::XorConstToX86Reg(x86Reg Reg, uint32_t Const)
}
}
-void CX86Ops::XorX86RegToX86Reg(x86Reg Source, x86Reg Destination)
+void CX86Ops::XorX86RegToX86Reg(const asmjit::x86::Gp & Source, const asmjit::x86::Gp & Destination)
{
uint16_t x86Command = 0;
CodeLog(" xor %s, %s", x86_Name(Source), x86_Name(Destination));
- switch (Source)
+ switch (RegValue(Source))
{
case x86_EAX: x86Command = 0x0031; break;
case x86_EBX: x86Command = 0x0331; break;
@@ -2711,7 +2711,7 @@ void CX86Ops::XorX86RegToX86Reg(x86Reg Source, x86Reg Destination)
default:
g_Notify->BreakPoint(__FILE__, __LINE__);
}
- switch (Destination)
+ switch (RegValue(Destination))
{
case x86_EAX: x86Command += 0xC000; break;
case x86_EBX: x86Command += 0xD800; break;
@@ -2727,11 +2727,11 @@ void CX86Ops::XorX86RegToX86Reg(x86Reg Source, x86Reg Destination)
AddCode16(x86Command);
}
-void CX86Ops::XorVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName)
+void CX86Ops::XorVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName)
{
CodeLog(" Xor %s, dword ptr [%s]", x86_Name(Reg), VariableName);
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: AddCode16(0x0533); break;
case x86_EBX: AddCode16(0x1D33); break;
@@ -2760,10 +2760,10 @@ void CX86Ops::fpuAddDword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuAddDwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuAddDwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fadd ST(0), dword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x00D8); break;
case x86_EBX: AddCode16(0x03D8); break;
@@ -2784,10 +2784,10 @@ void CX86Ops::fpuAddQword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuAddQwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuAddQwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fadd ST(0), qword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x00DC); break;
case x86_EBX: AddCode16(0x03DC); break;
@@ -2847,12 +2847,12 @@ void CX86Ops::fpuComDword(void * Variable, const char * VariableName, bool Pop)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuComDwordRegPointer(x86Reg x86Pointer, bool Pop)
+void CX86Ops::fpuComDwordRegPointer(const asmjit::x86::Gp & x86Pointer, bool Pop)
{
uint16_t x86Command;
CodeLog(" fcom%s ST(0), dword ptr [%s]", m_fpupop[Pop], x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: x86Command = 0x10D8; break;
case x86_EBX: x86Command = 0x13D8; break;
@@ -2879,12 +2879,12 @@ void CX86Ops::fpuComQword(void * Variable, const char * VariableName, bool Pop)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuComQwordRegPointer(x86Reg x86Pointer, bool Pop)
+void CX86Ops::fpuComQwordRegPointer(const asmjit::x86::Gp & x86Pointer, bool Pop)
{
uint16_t x86Command;
CodeLog(" fcom%s ST(0), qword ptr [%s]", m_fpupop[Pop], x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: x86Command = 0x10DC; break;
case x86_EBX: x86Command = 0x13DC; break;
@@ -2932,10 +2932,10 @@ void CX86Ops::fpuDivDword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuDivDwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuDivDwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fdiv ST(0), dword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x30D8); break;
case x86_EBX: AddCode16(0x33D8); break;
@@ -2956,10 +2956,10 @@ void CX86Ops::fpuDivQword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuDivQwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuDivQwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fdiv ST(0), qword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x30DC); break;
case x86_EBX: AddCode16(0x33DC); break;
@@ -3078,12 +3078,12 @@ void CX86Ops::fpuLoadDword(int32_t & StackPos, void * Variable, const char * Var
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fld dword ptr [%s]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
AddCode8(0xD9);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode8(0x00); break;
case x86_EBX: AddCode8(0x03); break;
@@ -3096,11 +3096,11 @@ void CX86Ops::fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
}
}
-void CX86Ops::fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadDwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fld dword ptr [%s+N64mem]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode16(0x80D9); break;
case x86_EBX: AddCode16(0x83D9); break;
@@ -3115,11 +3115,11 @@ void CX86Ops::fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg x86reg)
AddCode32((uint32_t)g_MMU->Rdram());
}
-void CX86Ops::fpuLoadInt32bFromN64Mem(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadInt32bFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fild dword ptr [%s+N64mem]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode16(0x80DB); break;
case x86_EBX: AddCode16(0x83DB); break;
@@ -3142,12 +3142,12 @@ void CX86Ops::fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const cha
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fild dword ptr [%s]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
AddCode8(0xDB);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode8(0x00); break;
case x86_EBX: AddCode8(0x03); break;
@@ -3168,12 +3168,12 @@ void CX86Ops::fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const cha
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fild qword ptr [%s]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
AddCode8(0xDF);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode8(0x28); break;
case x86_EBX: AddCode8(0x2B); break;
@@ -3194,12 +3194,12 @@ void CX86Ops::fpuLoadQword(int32_t & StackPos, void * Variable, const char * Var
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fld qword ptr [%s]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
AddCode8(0xDD);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode8(0x00); break;
case x86_EBX: AddCode8(0x03); break;
@@ -3212,11 +3212,11 @@ void CX86Ops::fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg)
}
}
-void CX86Ops::fpuLoadQwordFromN64Mem(int32_t & StackPos, x86Reg x86reg)
+void CX86Ops::fpuLoadQwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & x86reg)
{
CodeLog(" fld qword ptr [%s+N64mem]", x86_Name(x86reg));
StackPos = (StackPos - 1) & 7;
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode16(0x80DD); break;
case x86_EBX: AddCode16(0x83DD); break;
@@ -3258,10 +3258,10 @@ void CX86Ops::fpuMulDword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuMulDwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuMulDwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fmul ST(0), dword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x08D8); break;
case x86_EBX: AddCode16(0x0BD8); break;
@@ -3282,10 +3282,10 @@ void CX86Ops::fpuMulQword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuMulQwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuMulQwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fmul ST(0), qword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x08DC); break;
case x86_EBX: AddCode16(0x0BDC); break;
@@ -3375,7 +3375,7 @@ void CX86Ops::fpuStoreDword(int32_t & StackPos, void * Variable, const char * Va
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
+void CX86Ops::fpuStoreDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg, bool pop)
{
uint8_t Command = 0;
@@ -3388,7 +3388,7 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool po
AddCode8(0xD9);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: Command = 0x10; break;
case x86_EBX: Command = 0x13; break;
@@ -3403,7 +3403,7 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool po
AddCode8(pop ? (Command + 0x8) : Command);
}
-void CX86Ops::fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg x86reg, bool Pop)
+void CX86Ops::fpuStoreDwordToN64Mem(int32_t & StackPos, const asmjit::x86::Gp & x86reg, bool Pop)
{
int s = Pop ? 0x0800 : 0;
@@ -3414,7 +3414,7 @@ void CX86Ops::fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg x86reg, bool Pop)
StackPos = (StackPos + 1) & 7;
}
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: AddCode16((uint16_t)(0x90D9 | s)); break;
case x86_EBX: AddCode16((uint16_t)(0x93D9 | s)); break;
@@ -3442,7 +3442,7 @@ void CX86Ops::fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const ch
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
+void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg, bool pop)
{
uint8_t Command = 0;
@@ -3455,7 +3455,7 @@ void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg x86reg,
AddCode8(0xDB);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: Command = 0x10; break;
case x86_EBX: Command = 0x13; break;
@@ -3488,7 +3488,7 @@ void CX86Ops::fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const ch
}
}
-void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
+void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg, bool pop)
{
uint8_t Command = 0;
@@ -3501,7 +3501,7 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg,
AddCode8(0xDF);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: Command = 0x30; break;
case x86_EBX: Command = 0x33; break;
@@ -3516,7 +3516,7 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg,
AddCode8(pop ? (Command + 0x8) : Command);
}
-void CX86Ops::fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool pop)
+void CX86Ops::fpuStoreQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & x86reg, bool pop)
{
uint8_t Command = 0;
@@ -3529,7 +3529,7 @@ void CX86Ops::fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg x86reg, bool po
AddCode8(0xDD);
- switch (x86reg)
+ switch (RegValue(x86reg))
{
case x86_EAX: Command = 0x10; break;
case x86_EBX: Command = 0x13; break;
@@ -3557,10 +3557,10 @@ void CX86Ops::fpuSubDword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuSubDwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuSubDwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fsub ST(0), dword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x20D8); break;
case x86_EBX: AddCode16(0x23D8); break;
@@ -3588,10 +3588,10 @@ void CX86Ops::fpuSubQword(void * Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
-void CX86Ops::fpuSubQwordRegPointer(x86Reg x86Pointer)
+void CX86Ops::fpuSubQwordRegPointer(const asmjit::x86::Gp & x86Pointer)
{
CodeLog(" fsub ST(0), qword ptr [%s]", x86_Name(x86Pointer));
- switch (x86Pointer)
+ switch (RegValue(x86Pointer))
{
case x86_EAX: AddCode16(0x20DC); break;
case x86_EBX: AddCode16(0x23DC); break;
@@ -3650,9 +3650,9 @@ void CX86Ops::fpuSubRegPop(x86FpuValues x86reg)
}
}
-const char * CX86Ops::x86_Name(x86Reg Reg)
+const char * CX86Ops::x86_Name(const asmjit::x86::Gp & Reg)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: return "eax";
case x86_EBX: return "ebx";
@@ -3668,9 +3668,9 @@ const char * CX86Ops::x86_Name(x86Reg Reg)
return "???";
}
-const char * CX86Ops::x86_ByteName(x86Reg Reg)
+const char * CX86Ops::x86_ByteName(const asmjit::x86::Gp & Reg)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_AL: return "al";
case x86_BL: return "bl";
@@ -3686,9 +3686,9 @@ const char * CX86Ops::x86_ByteName(x86Reg Reg)
return "???";
}
-const char * CX86Ops::x86_HalfName(x86Reg Reg)
+const char * CX86Ops::x86_HalfName(const asmjit::x86::Gp & Reg)
{
- switch (Reg)
+ switch (RegValue(Reg))
{
case x86_EAX: return "ax";
case x86_EBX: return "bx";
@@ -3722,12 +3722,12 @@ const char * CX86Ops::fpu_Name(x86FpuValues Reg)
return "???";
}
-bool CX86Ops::Is8BitReg(x86Reg Reg)
+bool CX86Ops::Is8BitReg(const asmjit::x86::Gp & Reg)
{
- return (Reg == x86_EAX) ||
- (Reg == x86_EBX) ||
- (Reg == x86_ECX) ||
- (Reg == x86_EDX);
+ return (Reg == asmjit::x86::eax) ||
+ (Reg == asmjit::x86::ebx) ||
+ (Reg == asmjit::x86::ecx) ||
+ (Reg == asmjit::x86::edx);
}
uint8_t CX86Ops::CalcMultiplyCode(Multipler Multiply)
@@ -3809,6 +3809,76 @@ void CX86Ops::AddCode32(uint32_t value)
*g_RecompPos += 4;
}
+CX86Ops::x86Reg CX86Ops::RegValue(const asmjit::x86::Gp & Reg)
+{
+ if (Reg == asmjit::x86::eax)
+ {
+ return x86_EAX;
+ }
+ else if (Reg == asmjit::x86::ebx)
+ {
+ return x86_EBX;
+ }
+ else if (Reg == asmjit::x86::ecx)
+ {
+ return x86_ECX;
+ }
+ else if (Reg == asmjit::x86::edx)
+ {
+ return x86_EDX;
+ }
+ else if (Reg == asmjit::x86::esi)
+ {
+ return x86_ESI;
+ }
+ else if (Reg == asmjit::x86::edi)
+ {
+ return x86_EDI;
+ }
+ else if (Reg == asmjit::x86::esp)
+ {
+ return x86_ESP;
+ }
+ else if (Reg == asmjit::x86::ebp)
+ {
+ return x86_EBP;
+ }
+ else if (Reg == asmjit::x86::al)
+ {
+ return x86_AL;
+ }
+ else if (Reg == asmjit::x86::bl)
+ {
+ return x86_BL;
+ }
+ else if (Reg == asmjit::x86::cl)
+ {
+ return x86_CL;
+ }
+ else if (Reg == asmjit::x86::dl)
+ {
+ return x86_DL;
+ }
+ else if (Reg == asmjit::x86::ah)
+ {
+ return x86_AH;
+ }
+ else if (Reg == asmjit::x86::bh)
+ {
+ return x86_BH;
+ }
+ else if (Reg == asmjit::x86::ch)
+ {
+ return x86_CH;
+ }
+ else if (Reg == asmjit::x86::dh)
+ {
+ return x86_DH;
+ }
+ g_Notify->BreakPoint(__FILE__, __LINE__);
+ return x86_EAX;
+}
+
void CX86Ops::CodeLog(_Printf_format_string_ const char * Text, ...)
{
if (!CDebugSettings::bRecordRecompilerAsm())
diff --git a/Source/Project64-core/N64System/Recompiler/x86/x86ops.h b/Source/Project64-core/N64System/Recompiler/x86/x86ops.h
index 6372ab587..7d4505331 100644
--- a/Source/Project64-core/N64System/Recompiler/x86/x86ops.h
+++ b/Source/Project64-core/N64System/Recompiler/x86/x86ops.h
@@ -1,5 +1,6 @@
#pragma once
#if defined(__i386__) || defined(_M_IX86)
+#include
#if !defined(_MSC_VER) && !defined(_Printf_format_string_)
#define _Printf_format_string_
@@ -7,31 +8,11 @@
class CCodeBlock;
+static constexpr asmjit::x86::Gp x86Reg_Unknown = asmjit::x86::Gp();
+
class CX86Ops
{
public:
- enum x86Reg
- {
- x86_EAX = 0,
- x86_EBX = 3,
- x86_ECX = 1,
- x86_EDX = 2,
- x86_ESI = 6,
- x86_EDI = 7,
- x86_EBP = 5,
- x86_ESP = 4,
- x86_Unknown = -1,
-
- x86_AL = 0,
- x86_BL = 3,
- x86_CL = 1,
- x86_DL = 2,
- x86_AH = 4,
- x86_BH = 7,
- x86_CH = 5,
- x86_DH = 6
- };
-
enum x86FpuValues
{
x86_ST_Unknown = -1,
@@ -53,9 +34,9 @@ public:
Multip_x8 = 8
};
- static const char * x86_Name(x86Reg Reg);
- static const char * x86_ByteName(x86Reg Reg);
- static const char * x86_HalfName(x86Reg Reg);
+ static const char * x86_Name(const asmjit::x86::Gp & Reg);
+ static const char * x86_ByteName(const asmjit::x86::Gp & Reg);
+ static const char * x86_HalfName(const asmjit::x86::Gp & Reg);
static const char * fpu_Name(x86FpuValues Reg);
CX86Ops(CCodeBlock & CodeBlock);
@@ -65,33 +46,33 @@ public:
void WriteX86Label(const char * Label);
void AdcConstToVariable(void * Variable, const char * VariableName, uint8_t Constant);
- void AdcConstToX86Reg(x86Reg Reg, uint32_t Const);
- void AdcVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
- void AdcX86RegToX86Reg(x86Reg Destination, x86Reg Source);
+ void AdcConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void AdcVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void AdcX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void AddConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
- void AddConstToX86Reg(x86Reg Reg, uint32_t Const, bool NeedCarry = false);
- void AddVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
- void AddX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg);
- void AddX86RegToX86Reg(x86Reg Destination, x86Reg Source);
+ void AddConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const, bool NeedCarry = false);
+ void AddVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void AddX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
+ void AddX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
- void AndConstToX86Reg(x86Reg Reg, uint32_t Const);
- void AndVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName);
- void AndVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiply);
- void AndX86RegToX86Reg(x86Reg Destination, x86Reg Source);
+ void AndConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void AndVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void AndVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiply);
+ void AndX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void X86HardBreakPoint();
void X86BreakPoint(const char * FileName, int32_t LineNumber);
void CallFunc(uint32_t FunctPtr, const char * FunctName);
void CallThis(uint32_t ThisPtr, uint32_t FunctPtr, char * FunctName, uint32_t StackSize);
void CompConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
- void CompConstToX86reg(x86Reg Reg, uint32_t Const);
- void CompConstToX86regPointer(x86Reg Reg, uint32_t Const);
- void CompX86regToVariable(x86Reg Reg, void * Variable, const char * VariableName);
- void CompX86RegToX86Reg(x86Reg Destination, x86Reg Source);
- void DecX86reg(x86Reg Reg);
- void DivX86reg(x86Reg Reg);
- void idivX86reg(x86Reg Reg);
- void imulX86reg(x86Reg Reg);
- void IncX86reg(x86Reg Reg);
+ void CompConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void CompConstToX86regPointer(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void CompX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void DecX86reg(const asmjit::x86::Gp & Reg);
+ void DivX86reg(const asmjit::x86::Gp & Reg);
+ void idivX86reg(const asmjit::x86::Gp & Reg);
+ void imulX86reg(const asmjit::x86::Gp & Reg);
+ void IncX86reg(const asmjit::x86::Gp & Reg);
void JaeLabel8(const char * Label, uint8_t Value);
void JaeLabel32(const char * Label, uint32_t Value);
void JaLabel8(const char * Label, uint8_t Value);
@@ -109,9 +90,9 @@ public:
void JleLabel32(const char * Label, uint32_t Value);
void JlLabel8(const char * Label, uint8_t Value);
void JlLabel32(const char * Label, uint32_t Value);
- void JmpDirectReg(x86Reg Reg);
+ void JmpDirectReg(const asmjit::x86::Gp & Reg);
void JmpIndirectLabel32(const char * Label, uint32_t location);
- void JmpIndirectReg(x86Reg Reg);
+ void JmpIndirectReg(const asmjit::x86::Gp & Reg);
void JmpLabel8(const char * Label, uint8_t Value);
void JmpLabel32(const char * Label, uint32_t Value);
void JneLabel8(const char * Label, uint8_t Value);
@@ -124,107 +105,107 @@ public:
void JsLabel32(const char * Label, uint32_t Value);
void JzLabel8(const char * Label, uint8_t Value);
void JzLabel32(const char * Label, uint32_t Value);
- void LeaRegReg(x86Reg RegDest, x86Reg RegSrc, uint32_t Const, Multipler multiplier);
- void LeaRegReg2(x86Reg RegDest, x86Reg RegSrc, x86Reg RegSrc2, Multipler multiplier);
- void LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t offset);
+ void LeaRegReg(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, uint32_t Const, Multipler multiplier);
+ void LeaRegReg2(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, const asmjit::x86::Gp & RegSrc2, Multipler multiplier);
+ void LeaSourceAndOffset(const asmjit::x86::Gp & x86DestReg, const asmjit::x86::Gp & x86SourceReg, int32_t offset);
void MoveConstByteToVariable(void * Variable, const char * VariableName, uint8_t Const);
- void MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint8_t Const);
+ void MoveConstByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t Const);
void MoveConstHalfToVariable(void * Variable, const char * VariableName, uint16_t Const);
- void MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint16_t Const);
- void MoveConstToMemoryDisp(x86Reg AddrReg, uint32_t Disp, uint32_t Const);
+ void MoveConstHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint16_t Const);
+ void MoveConstToMemoryDisp(const asmjit::x86::Gp & AddrReg, uint32_t Disp, uint32_t Const);
void MoveConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
- void MoveConstToX86Pointer(x86Reg X86Pointer, uint32_t Const);
- void MoveConstToX86reg(x86Reg Reg, uint32_t Const);
- void MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_t Const);
- void MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
- void MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
- void MoveSxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName);
- void MoveSxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName);
- void MoveVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiplier);
- void MoveVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
- void MoveX86PointerToX86reg(x86Reg Reg, x86Reg X86Pointer);
- void MoveX86PointerToX86regDisp(x86Reg Reg, x86Reg X86Pointer, uint8_t Disp);
- void MoveX86regByteToVariable(void * Variable, const char * VariableName, x86Reg Reg);
- void MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg);
- void MoveX86regHalfToVariable(void * Variable, const char * VariableName, x86Reg Reg);
- void MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg);
- void MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
- void MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2, uint8_t offset);
- void MoveX86regToMemory(x86Reg AddrReg, uint32_t Disp, x86Reg Reg);
- void MoveX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg);
- void MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source);
- void MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg);
- void MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg);
- void MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
- void MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2);
- void MoveZxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName);
- void MoveZxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName);
- void MulX86reg(x86Reg Reg);
- void NotX86Reg(x86Reg Reg);
+ void MoveConstToX86Pointer(const asmjit::x86::Gp & X86Pointer, uint32_t Const);
+ void MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void MoveConstToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint32_t Const);
+ void MoveSxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
+ void MoveSxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
+ void MoveSxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void MoveSxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void MoveVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiplier);
+ void MoveVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void MoveX86PointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer);
+ void MoveX86PointerToX86regDisp(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer, uint8_t Disp);
+ void MoveX86regByteToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
+ void MoveX86regByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
+ void MoveX86regHalfToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
+ void MoveX86regHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
+ void MoveX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
+ void MoveX86regPointerToX86regDisp8(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t offset);
+ void MoveX86regToMemory(const asmjit::x86::Gp & AddrReg, uint32_t Disp, const asmjit::x86::Gp & Reg);
+ void MoveX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
+ void MoveX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void MoveX86regToX86Pointer(const asmjit::x86::Gp & X86Pointer, const asmjit::x86::Gp & Reg);
+ void MoveX86regToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
+ void MoveZxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
+ void MoveZxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
+ void MoveZxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void MoveZxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void MulX86reg(const asmjit::x86::Gp & Reg);
+ void NotX86Reg(const asmjit::x86::Gp & Reg);
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
- void OrConstToX86Reg(x86Reg Reg, uint32_t Const);
- void OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName);
- void OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg);
- void OrX86RegToX86Reg(x86Reg Destination, x86Reg Source);
- void Push(x86Reg Reg);
+ void OrConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void OrVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void OrX86RegToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
+ void OrX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void Push(const asmjit::x86::Gp & Reg);
void Pushad();
void PushImm32(uint32_t Value);
void PushImm32(const char * String, uint32_t Value);
- void Pop(x86Reg Reg);
+ void Pop(const asmjit::x86::Gp & Reg);
void Popad();
void Ret();
- void Seta(x86Reg Reg);
- void Setae(x86Reg Reg);
+ void Seta(const asmjit::x86::Gp & Reg);
+ void Setae(const asmjit::x86::Gp & Reg);
void SetaVariable(void * Variable, const char * VariableName);
- void Setb(x86Reg Reg);
+ void Setb(const asmjit::x86::Gp & Reg);
void SetbVariable(void * Variable, const char * VariableName);
- void Setg(x86Reg Reg);
+ void Setg(const asmjit::x86::Gp & Reg);
void SetgVariable(void * Variable, const char * VariableName);
- void Setl(x86Reg Reg);
+ void Setl(const asmjit::x86::Gp & Reg);
void SetlVariable(void * Variable, const char * VariableName);
- void Setz(x86Reg Reg);
- void Setnz(x86Reg Reg);
- void ShiftLeftDouble(x86Reg Destination, x86Reg Source);
- void ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate);
- void ShiftLeftSign(x86Reg Reg);
- void ShiftLeftSignImmed(x86Reg Reg, uint8_t Immediate);
- void ShiftRightDouble(x86Reg Destination, x86Reg Source);
- void ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate);
- void ShiftRightSign(x86Reg Reg);
- void ShiftRightSignImmed(x86Reg Reg, uint8_t Immediate);
- void ShiftRightUnsign(x86Reg Reg);
- void ShiftRightUnsignImmed(x86Reg Reg, uint8_t Immediate);
- void SbbConstFromX86Reg(x86Reg Reg, uint32_t Const);
- void SbbVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName);
- void SbbX86RegToX86Reg(x86Reg Destination, x86Reg Source);
+ void Setz(const asmjit::x86::Gp & Reg);
+ void Setnz(const asmjit::x86::Gp & Reg);
+ void ShiftLeftDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void ShiftLeftDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate);
+ void ShiftLeftSign(const asmjit::x86::Gp & Reg);
+ void ShiftLeftSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
+ void ShiftRightDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void ShiftRightDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate);
+ void ShiftRightSign(const asmjit::x86::Gp & Reg);
+ void ShiftRightSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
+ void ShiftRightUnsign(const asmjit::x86::Gp & Reg);
+ void ShiftRightUnsignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
+ void SbbConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void SbbVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void SbbX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName);
- void SubConstFromX86Reg(x86Reg Reg, uint32_t Const);
- void SubVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName);
- void SubX86RegToX86Reg(x86Reg Destination, x86Reg Source);
- void TestConstToX86Reg(x86Reg Reg, uint32_t Const);
+ void SubConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void SubVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
+ void SubX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void TestConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void TestVariable(void * Variable, const char * VariableName, uint32_t Const);
- void TestX86RegToX86Reg(x86Reg Destination, x86Reg Source);
- void TestX86ByteRegToX86Reg(x86Reg Destination, x86Reg Source);
- void XorConstToX86Reg(x86Reg Reg, uint32_t Const);
- void XorX86RegToX86Reg(x86Reg Source, x86Reg Destination);
- void XorVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName);
+ void TestX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void TestX86ByteRegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
+ void XorConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
+ void XorX86RegToX86Reg(const asmjit::x86::Gp & Source, const asmjit::x86::Gp & Destination);
+ void XorVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void fpuAbs();
void fpuAddDword(void * Variable, const char * VariableName);
- void fpuAddDwordRegPointer(x86Reg x86Pointer);
+ void fpuAddDwordRegPointer(const asmjit::x86::Gp & x86Pointer);
void fpuAddQword(void * Variable, const char * VariableName);
- void fpuAddQwordRegPointer(x86Reg X86Pointer);
+ void fpuAddQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuAddReg(x86FpuValues Reg);
void fpuAddRegPop(int32_t & StackPos, x86FpuValues Reg);
void fpuComDword(void * Variable, const char * VariableName, bool Pop);
- void fpuComDwordRegPointer(x86Reg X86Pointer, bool Pop);
+ void fpuComDwordRegPointer(const asmjit::x86::Gp & X86Pointer, bool Pop);
void fpuComQword(void * Variable, const char * VariableName, bool Pop);
- void fpuComQwordRegPointer(x86Reg X86Pointer, bool Pop);
+ void fpuComQwordRegPointer(const asmjit::x86::Gp & X86Pointer, bool Pop);
void fpuComReg(x86FpuValues Reg, bool Pop);
void fpuDivDword(void * Variable, const char * VariableName);
- void fpuDivDwordRegPointer(x86Reg X86Pointer);
+ void fpuDivDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuDivQword(void * Variable, const char * VariableName);
- void fpuDivQwordRegPointer(x86Reg X86Pointer);
+ void fpuDivQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuDivReg(x86FpuValues Reg);
void fpuDivRegPop(x86FpuValues Reg);
void fpuExchange(x86FpuValues Reg);
@@ -233,21 +214,21 @@ public:
void fpuIncStack(int32_t & StackPos);
void fpuLoadControl(void * Variable, const char * VariableName);
void fpuLoadDword(int32_t & StackPos, void * Variable, const char * VariableName);
- void fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
- void fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg Reg);
- void fpuLoadInt32bFromN64Mem(int32_t & StackPos, x86Reg Reg);
+ void fpuLoadDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
+ void fpuLoadDwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
+ void fpuLoadInt32bFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName);
- void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
+ void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName);
- void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
+ void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadQword(int32_t & StackPos, void * Variable, const char * VariableName);
- void fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg Reg);
- void fpuLoadQwordFromN64Mem(int32_t & StackPos, x86Reg Reg);
+ void fpuLoadQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
+ void fpuLoadQwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadReg(int32_t & StackPos, x86FpuValues Reg);
void fpuMulDword(void * Variable, const char * VariableName);
- void fpuMulDwordRegPointer(x86Reg X86Pointer);
+ void fpuMulDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuMulQword(void * Variable, const char * VariableName);
- void fpuMulQwordRegPointer(x86Reg X86Pointer);
+ void fpuMulQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuMulReg(x86FpuValues Reg);
void fpuMulRegPop(x86FpuValues Reg);
void fpuNeg();
@@ -255,24 +236,24 @@ public:
void fpuSqrt();
void fpuStoreControl(void * Variable, const char * VariableName);
void fpuStoreDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
- void fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
- void fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg Reg, bool Pop);
+ void fpuStoreDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
+ void fpuStoreDwordToN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool Pop);
void fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
- void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
+ void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
void fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
- void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
- void fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop);
+ void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
+ void fpuStoreQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
void fpuStoreStatus();
void fpuSubDword(void * Variable, const char * VariableName);
- void fpuSubDwordRegPointer(x86Reg X86Pointer);
+ void fpuSubDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuSubDwordReverse(void * Variable, const char * VariableName);
void fpuSubQword(void * Variable, const char * VariableName);
- void fpuSubQwordRegPointer(x86Reg X86Pointer);
+ void fpuSubQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuSubQwordReverse(void * Variable, const char * VariableName);
void fpuSubReg(x86FpuValues Reg);
void fpuSubRegPop(x86FpuValues Reg);
- static bool Is8BitReg(x86Reg Reg);
+ static bool Is8BitReg(const asmjit::x86::Gp & Reg);
static uint8_t CalcMultiplyCode(Multipler Multiply);
static uint32_t GetAddressOf(int32_t value, ...);
@@ -284,6 +265,28 @@ private:
CX86Ops(const CX86Ops &);
CX86Ops & operator=(const CX86Ops &);
+ enum x86Reg
+ {
+ x86_EAX = 0,
+ x86_EBX = 3,
+ x86_ECX = 1,
+ x86_EDX = 2,
+ x86_ESI = 6,
+ x86_EDI = 7,
+ x86_EBP = 5,
+ x86_ESP = 4,
+
+ x86_AL = 0,
+ x86_BL = 3,
+ x86_CL = 1,
+ x86_DL = 2,
+ x86_AH = 4,
+ x86_BH = 7,
+ x86_CH = 5,
+ x86_DH = 6
+ };
+
+ static x86Reg RegValue(const asmjit::x86::Gp & Reg);
void CodeLog(_Printf_format_string_ const char * Text, ...);
static void BreakPointNotification(const char * FileName, int32_t LineNumber);
diff --git a/Source/Project64-core/Project64-core.vcxproj b/Source/Project64-core/Project64-core.vcxproj
index 49155b696..9083f3415 100644
--- a/Source/Project64-core/Project64-core.vcxproj
+++ b/Source/Project64-core/Project64-core.vcxproj
@@ -38,6 +38,9 @@
/ignore:4221%(AdditionalOptions)
+
+ $(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)
+
@@ -220,6 +223,7 @@
+
diff --git a/Source/Project64-core/Project64-core.vcxproj.filters b/Source/Project64-core/Project64-core.vcxproj.filters
index 7f3390d8b..756ba3871 100644
--- a/Source/Project64-core/Project64-core.vcxproj.filters
+++ b/Source/Project64-core/Project64-core.vcxproj.filters
@@ -833,6 +833,9 @@
Header Files\N64 System\Recompiler\Aarch64
+
+ Header Files\N64 System\Recompiler
+
diff --git a/Source/Project64/Project64.vcxproj b/Source/Project64/Project64.vcxproj
index 1e23540a1..5efd15b2f 100644
--- a/Source/Project64/Project64.vcxproj
+++ b/Source/Project64/Project64.vcxproj
@@ -49,6 +49,9 @@
IF NOT EXIST "$(SolutionDir)Config\Project64.cfg" (copy "$(SolutionDir)Config\Project64.cfg.development" "$(SolutionDir)Config\Project64.cfg")
+
+ $(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)
+