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Core: Switch to use asmjit registers in recompiler

This commit is contained in:
zilmar 2022-11-07 21:03:32 +10:30
parent 0e1a72a0b1
commit 529812fdca
11 changed files with 1183 additions and 1087 deletions
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1
Source/Android/Bridge/Bridge.vcxproj
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@ -27,6 +27,7 @@
<ItemDefinitionGroup> <ItemDefinitionGroup>
<ClCompile> <ClCompile>
<PrecompiledHeader>NotUsing</PrecompiledHeader> <PrecompiledHeader>NotUsing</PrecompiledHeader>
<AdditionalIncludeDirectories>$(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
</ClCompile> </ClCompile>
</ItemDefinitionGroup> </ItemDefinitionGroup>
<ItemGroup> <ItemGroup>

12
Source/Project64-core/N64System/Recompiler/asmjit.h Normal file
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@ -0,0 +1,12 @@
#pragma once
#define ASMJIT_STATIC
#ifdef new
#pragma push_macro("new")
#undef new
#include <asmjit\asmjit.h>
#pragma pop_macro("new")
#else
#include <asmjit\asmjit.h>
#endif

950
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
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File diff suppressed because it is too large Load Diff

49
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
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@ -4,6 +4,7 @@
#include <Project64-core/N64System/Interpreter/InterpreterOps.h> #include <Project64-core/N64System/Interpreter/InterpreterOps.h>
#include <Project64-core/N64System/Mips/R4300iOpcode.h> #include <Project64-core/N64System/Mips/R4300iOpcode.h>
#include <Project64-core/N64System/Mips/Register.h> #include <Project64-core/N64System/Mips/Register.h>
#include <Project64-core/N64System/Recompiler/asmjit.h>
#include <Project64-core/N64System/Recompiler/ExitInfo.h> #include <Project64-core/N64System/Recompiler/ExitInfo.h>
#include <Project64-core/N64System/Recompiler/JumpInfo.h> #include <Project64-core/N64System/Recompiler/JumpInfo.h>
#include <Project64-core/N64System/Recompiler/RecompilerOps.h> #include <Project64-core/N64System/Recompiler/RecompilerOps.h>
@ -210,9 +211,9 @@ public:
void FoundMemoryBreakpoint(); void FoundMemoryBreakpoint();
void PreReadInstruction(); void PreReadInstruction();
void PreWriteInstruction(); void PreWriteInstruction();
void TestWriteBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName); void TestWriteBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
void TestReadBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName); void TestReadBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
void TestBreakpoint(CX86Ops::x86Reg AddressReg, uint32_t FunctAddress, const char * FunctName); void TestBreakpoint(const asmjit::x86::Gp & AddressReg, uint32_t FunctAddress, const char * FunctName);
void EnterCodeBlock(); void EnterCodeBlock();
void ExitCodeBlock(); void ExitCodeBlock();
void CompileExitCode(); void CompileExitCode();
@ -236,9 +237,9 @@ public:
void PostCompileOpcode(void); void PostCompileOpcode(void);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason); void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason);
void CompileReadTLBMiss(uint32_t VirtualAddress, CX86Ops::x86Reg LookUpReg); void CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg);
void CompileReadTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg); void CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
void CompileWriteTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg); void CompileWriteTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg);
void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles); void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles);
void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true); void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet); void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);
@ -283,11 +284,11 @@ public:
{ {
return m_RegWorkingSet.GetMipsRegHi_S(Reg); return m_RegWorkingSet.GetMipsRegHi_S(Reg);
} }
CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg)
{ {
return m_RegWorkingSet.GetMipsRegMapLo(Reg); return m_RegWorkingSet.GetMipsRegMapLo(Reg);
} }
CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg)
{ {
return m_RegWorkingSet.GetMipsRegMapHi(Reg); return m_RegWorkingSet.GetMipsRegMapHi(Reg);
} }
@ -362,11 +363,11 @@ public:
m_RegWorkingSet.UnMap_FPR(Reg, WriteBackValue); m_RegWorkingSet.UnMap_FPR(Reg, WriteBackValue);
} }
CX86Ops::x86Reg FreeX86Reg() const asmjit::x86::Gp & FreeX86Reg()
{ {
return m_RegWorkingSet.FreeX86Reg(); return m_RegWorkingSet.FreeX86Reg();
} }
CX86Ops::x86Reg Free8BitX86Reg() const asmjit::x86::Gp & Free8BitX86Reg()
{ {
return m_RegWorkingSet.Free8BitX86Reg(); return m_RegWorkingSet.Free8BitX86Reg();
} }
@ -378,15 +379,15 @@ public:
{ {
m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad); m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad);
} }
CX86Ops::x86Reg Get_MemoryStack() asmjit::x86::Gp Get_MemoryStack()
{ {
return m_RegWorkingSet.Get_MemoryStack(); return m_RegWorkingSet.Get_MemoryStack();
} }
CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true) asmjit::x86::Gp Map_MemoryStack(const asmjit::x86::Gp & Reg, bool bMapRegister, bool LoadValue = true)
{ {
return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue); return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue);
} }
CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit) asmjit::x86::Gp Map_TempReg(const asmjit::x86::Gp & Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
{ {
return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord, Reg8Bit); return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord, Reg8Bit);
} }
@ -402,7 +403,7 @@ public:
{ {
m_RegWorkingSet.ResetX86Protection(); m_RegWorkingSet.ResetX86Protection();
} }
CX86Ops::x86Reg UnMap_TempReg() const asmjit::x86::Gp & UnMap_TempReg()
{ {
return m_RegWorkingSet.UnMap_TempReg(); return m_RegWorkingSet.UnMap_TempReg();
} }
@ -410,7 +411,7 @@ public:
{ {
m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue); m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue);
} }
bool UnMap_X86reg(CX86Ops::x86Reg Reg) bool UnMap_X86reg(const asmjit::x86::Gp & Reg)
{ {
return m_RegWorkingSet.UnMap_X86reg(Reg); return m_RegWorkingSet.UnMap_X86reg(Reg);
} }
@ -425,19 +426,19 @@ private:
CX86RecompilerOps(const CX86RecompilerOps &); CX86RecompilerOps(const CX86RecompilerOps &);
CX86RecompilerOps & operator=(const CX86RecompilerOps &); CX86RecompilerOps & operator=(const CX86RecompilerOps &);
CX86Ops::x86Reg BaseOffsetAddress(bool UseBaseRegister); asmjit::x86::Gp BaseOffsetAddress(bool UseBaseRegister);
void CompileLoadMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint8_t ValueSize, bool SignExtend); void CompileLoadMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend);
void CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint64_t Value, uint8_t ValueSize); void CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint64_t Value, uint8_t ValueSize);
void SB_Const(uint32_t Value, uint32_t Addr); void SB_Const(uint32_t Value, uint32_t Addr);
void SB_Register(CX86Ops::x86Reg Reg, uint32_t Addr); void SB_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
void SH_Const(uint32_t Value, uint32_t Addr); void SH_Const(uint32_t Value, uint32_t Addr);
void SH_Register(CX86Ops::x86Reg Reg, uint32_t Addr); void SH_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
void SW_Const(uint32_t Value, uint32_t Addr); void SW_Const(uint32_t Value, uint32_t Addr);
void SW_Register(CX86Ops::x86Reg Reg, uint32_t Addr); void SW_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);
void LB_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend); void LB_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend);
void LH_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend); void LH_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr, bool SignExtend);
void LW_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr); void LW_KnownAddress(const asmjit::x86::Gp & Reg, uint32_t VAddr);
void LW(bool ResultSigned, bool bRecordLLBit); void LW(bool ResultSigned, bool bRecordLLBit);
void SW(bool bCheckLLbit); void SW(bool bCheckLLbit);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * Label, uint32_t Value)); void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo & ExitRegSet, ExitReason Reason, bool CompileNow, void (CX86Ops::*x86Jmp)(const char * Label, uint32_t Value));

276
Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
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@ -14,38 +14,35 @@ uint32_t CX86RegInfo::m_fpuControl = 0;
const char * Format_Name[] = {"Unknown", "dword", "qword", "float", "double"}; const char * Format_Name[] = {"Unknown", "dword", "qword", "float", "double"};
x86RegIndex GetIndexFromX86Reg(const CX86Ops::x86Reg & Reg) x86RegIndex GetIndexFromX86Reg(const asmjit::x86::Gp & Reg)
{ {
switch (Reg) if (Reg == asmjit::x86::eax) { return x86RegIndex_EAX; }
{ if (Reg == asmjit::x86::ebx) { return x86RegIndex_EBX; }
case CX86Ops::x86_EAX: return x86RegIndex_EAX; if (Reg == asmjit::x86::ecx) { return x86RegIndex_ECX; }
case CX86Ops::x86_EBX: return x86RegIndex_EBX; if (Reg == asmjit::x86::edx) { return x86RegIndex_EDX; }
case CX86Ops::x86_ECX: return x86RegIndex_ECX; if (Reg == asmjit::x86::esi) { return x86RegIndex_ESI; }
case CX86Ops::x86_EDX: return x86RegIndex_EDX; if (Reg == asmjit::x86::edi) { return x86RegIndex_EDI; }
case CX86Ops::x86_ESI: return x86RegIndex_ESI; if (Reg == asmjit::x86::ebp) { return x86RegIndex_EBP; }
case CX86Ops::x86_EDI: return x86RegIndex_EDI; if (Reg == asmjit::x86::esp) { return x86RegIndex_ESP; }
case CX86Ops::x86_EBP: return x86RegIndex_EBP;
case CX86Ops::x86_ESP: return x86RegIndex_ESP;
}
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return x86RegIndex_EAX; return x86RegIndex_EAX;
} }
CX86Ops::x86Reg GetX86RegFromIndex(x86RegIndex Index) asmjit::x86::Gp GetX86RegFromIndex(x86RegIndex Index)
{ {
switch (Index) switch (Index)
{ {
case x86RegIndex_EAX: return CX86Ops::x86_EAX; case x86RegIndex_EAX: return asmjit::x86::eax;
case x86RegIndex_ECX: return CX86Ops::x86_ECX; case x86RegIndex_EBX: return asmjit::x86::ebx;
case x86RegIndex_EDX: return CX86Ops::x86_EDX; case x86RegIndex_ECX: return asmjit::x86::ecx;
case x86RegIndex_EBX: return CX86Ops::x86_EBX; case x86RegIndex_EDX: return asmjit::x86::edx;
case x86RegIndex_ESP: return CX86Ops::x86_ESP; case x86RegIndex_ESP: return asmjit::x86::esp;
case x86RegIndex_EBP: return CX86Ops::x86_EBP; case x86RegIndex_EBP: return asmjit::x86::ebp;
case x86RegIndex_ESI: return CX86Ops::x86_ESI; case x86RegIndex_ESI: return asmjit::x86::esi;
case x86RegIndex_EDI: return CX86Ops::x86_EDI; case x86RegIndex_EDI: return asmjit::x86::edi;
} }
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) : CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
@ -56,8 +53,8 @@ CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
{ {
for (int32_t i = 0; i < 32; i++) for (int32_t i = 0; i < 32; i++)
{ {
m_RegMapLo[i] = CX86Ops::x86_Unknown; m_RegMapLo[i] = x86Reg_Unknown;
m_RegMapHi[i] = CX86Ops::x86_Unknown; m_RegMapHi[i] = x86Reg_Unknown;
} }
for (int32_t i = 0; i < x86RegIndex_Size; i++) for (int32_t i = 0; i < x86RegIndex_Size; i++)
{ {
@ -208,7 +205,7 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
m_fpuControl = 0; m_fpuControl = 0;
m_Assembler.fpuStoreControl(&m_fpuControl, "m_fpuControl"); m_Assembler.fpuStoreControl(&m_fpuControl, "m_fpuControl");
CX86Ops::x86Reg reg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false); asmjit::x86::Gp reg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(reg, &m_fpuControl, "m_fpuControl"); m_Assembler.MoveVariableToX86reg(reg, &m_fpuControl, "m_fpuControl");
m_Assembler.AndConstToX86Reg(reg, 0xF3FF); m_Assembler.AndConstToX86Reg(reg, 0xF3FF);
@ -223,14 +220,14 @@ void CX86RegInfo::FixRoundModel(FPU_ROUND RoundMethod)
0x00000100, //_RC_DOWN 0x00000100, //_RC_DOWN
}; };
CX86Ops::x86Reg RoundReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false); asmjit::x86::Gp RoundReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(RoundReg, &g_Reg->m_RoundingModel, "m_RoundingModel"); m_Assembler.MoveVariableToX86reg(RoundReg, &g_Reg->m_RoundingModel, "m_RoundingModel");
m_Assembler.MoveVariableDispToX86Reg(RoundReg, (void *)&msRound[0], "msRound", RoundReg, CX86Ops::Multip_x4); m_Assembler.MoveVariableDispToX86Reg(RoundReg, (void *)&msRound[0], "msRound", RoundReg, CX86Ops::Multip_x4);
m_Assembler.ShiftLeftSignImmed(RoundReg, 2); m_Assembler.ShiftLeftSignImmed(RoundReg, 2);
m_Assembler.OrX86RegToX86Reg(reg, RoundReg); m_Assembler.OrX86RegToX86Reg(reg, RoundReg);
#else #else
CX86Ops::x86Reg RoundReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false); asmjit::x86::Gp RoundReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
m_Assembler.MoveVariableToX86reg(RoundReg, _RoundingModel, "_RoundingModel"); m_Assembler.MoveVariableToX86reg(RoundReg, _RoundingModel, "_RoundingModel");
m_Assembler.OrX86RegToX86Reg(reg, RoundReg); m_Assembler.OrX86RegToX86Reg(reg, RoundReg);
#endif #endif
@ -435,7 +432,7 @@ void CX86RegInfo::Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Forma
} }
} }
m_CodeBlock.Log(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]); m_CodeBlock.Log(" regcache: allocate ST(0) to %s", CRegName::FPR[Reg]);
CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false); asmjit::x86::Gp TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
switch (Format) switch (Format)
{ {
case FPU_Dword: case FPU_Dword:
@ -480,35 +477,35 @@ CX86Ops::x86FpuValues CX86RegInfo::StackPosition(int32_t Reg)
return CX86Ops::x86_ST_Unknown; return CX86Ops::x86_ST_Unknown;
} }
CX86Ops::x86Reg CX86RegInfo::FreeX86Reg() asmjit::x86::Gp CX86RegInfo::FreeX86Reg()
{ {
if (GetX86Mapped(x86RegIndex_EDI) == NotMapped && !GetX86Protected(x86RegIndex_EDI)) if (GetX86Mapped(x86RegIndex_EDI) == NotMapped && !GetX86Protected(x86RegIndex_EDI))
{ {
return CX86Ops::x86_EDI; return asmjit::x86::edi;
} }
if (GetX86Mapped(x86RegIndex_ESI) == NotMapped && !GetX86Protected(x86RegIndex_ESI)) if (GetX86Mapped(x86RegIndex_ESI) == NotMapped && !GetX86Protected(x86RegIndex_ESI))
{ {
return CX86Ops::x86_ESI; return asmjit::x86::esi;
} }
if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX)) if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX))
{ {
return CX86Ops::x86_EBX; return asmjit::x86::ebx;
} }
if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX)) if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX))
{ {
return CX86Ops::x86_EAX; return asmjit::x86::eax;
} }
if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX)) if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX))
{ {
return CX86Ops::x86_EDX; return asmjit::x86::edx;
} }
if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX)) if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX))
{ {
return CX86Ops::x86_ECX; return asmjit::x86::ecx;
} }
CX86Ops::x86Reg Reg = UnMap_TempReg(); asmjit::x86::Gp Reg = UnMap_TempReg();
if (Reg != CX86Ops::x86_Unknown) if (Reg.isValid())
{ {
return Reg; return Reg;
} }
@ -537,14 +534,15 @@ CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
} }
} }
CX86Ops::x86Reg StackReg = CX86Ops::x86_Unknown; asmjit::x86::Gp StackReg;
for (int i = 0; i < x86RegIndex_Size; i++) for (int i = 0; i < x86RegIndex_Size; i++)
{ {
if (MapCount[i] > 0 && GetX86Mapped(MapReg[i]) != Stack_Mapped) if (MapCount[i] > 0 && GetX86Mapped(MapReg[i]) != Stack_Mapped)
{ {
if (UnMap_X86reg((CX86Ops::x86Reg)MapReg[i])) Reg = GetX86RegFromIndex(MapReg[i]);
if (UnMap_X86reg(Reg))
{ {
return (CX86Ops::x86Reg)MapReg[i]; return Reg;
} }
} }
if (GetX86Mapped(MapReg[i]) == Stack_Mapped) if (GetX86Mapped(MapReg[i]) == Stack_Mapped)
@ -552,42 +550,42 @@ CX86Ops::x86Reg CX86RegInfo::FreeX86Reg()
StackReg = GetX86RegFromIndex(MapReg[i]); StackReg = GetX86RegFromIndex(MapReg[i]);
} }
} }
if (StackReg != CX86Ops::x86_Unknown) if (StackReg.isValid())
{ {
UnMap_X86reg(StackReg); UnMap_X86reg(StackReg);
return StackReg; return StackReg;
} }
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg() asmjit::x86::Gp CX86RegInfo::Free8BitX86Reg()
{ {
if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX)) if (GetX86Mapped(x86RegIndex_EBX) == NotMapped && !GetX86Protected(x86RegIndex_EBX))
{ {
return CX86Ops::x86_EBX; return asmjit::x86::ebx;
} }
if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX)) if (GetX86Mapped(x86RegIndex_EAX) == NotMapped && !GetX86Protected(x86RegIndex_EAX))
{ {
return CX86Ops::x86_EAX; return asmjit::x86::eax;
} }
if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX)) if (GetX86Mapped(x86RegIndex_EDX) == NotMapped && !GetX86Protected(x86RegIndex_EDX))
{ {
return CX86Ops::x86_EDX; return asmjit::x86::edx;
} }
if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX)) if (GetX86Mapped(x86RegIndex_ECX) == NotMapped && !GetX86Protected(x86RegIndex_ECX))
{ {
return CX86Ops::x86_ECX; return asmjit::x86::ecx;
} }
CX86Ops::x86Reg Reg = UnMap_8BitTempReg(); asmjit::x86::Gp Reg = UnMap_8BitTempReg();
if (Reg > 0) if (Reg.isValid())
{ {
return Reg; return Reg;
} }
uint32_t MapCount[10]; uint32_t MapCount[x86RegIndex_Size];
x86RegIndex MapReg[10]; x86RegIndex MapReg[x86RegIndex_Size];
for (uint32_t i = 0; i < x86RegIndex_Size; i++) for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{ {
MapCount[i] = GetX86MapOrder((x86RegIndex)i); MapCount[i] = GetX86MapOrder((x86RegIndex)i);
@ -595,7 +593,7 @@ CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
} }
for (uint32_t i = 0; i < x86RegIndex_Size; i++) for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{ {
for (uint32_t z = 0; z < x86RegIndex_Size; z++) for (uint32_t z = 0; z < x86RegIndex_Size - 1; z++)
{ {
if (MapCount[z] < MapCount[z + 1]) if (MapCount[z] < MapCount[z + 1])
{ {
@ -612,20 +610,20 @@ CX86Ops::x86Reg CX86RegInfo::Free8BitX86Reg()
{ {
if (MapCount[i] > 0) if (MapCount[i] > 0)
{ {
if (!CX86Ops::Is8BitReg((CX86Ops::x86Reg)i)) if (!CX86Ops::Is8BitReg(GetX86RegFromIndex((x86RegIndex)i)))
{ {
continue; continue;
} }
if (UnMap_X86reg((CX86Ops::x86Reg)i)) if (UnMap_X86reg(GetX86RegFromIndex((x86RegIndex)i)))
{ {
return (CX86Ops::x86Reg)i; return GetX86RegFromIndex((x86RegIndex)i);
} }
} }
} }
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg() asmjit::x86::Gp CX86RegInfo::UnMap_8BitTempReg()
{ {
for (uint32_t i = 0; i < x86RegIndex_Size; i++) for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{ {
@ -643,10 +641,10 @@ CX86Ops::x86Reg CX86RegInfo::UnMap_8BitTempReg()
} }
} }
} }
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
CX86Ops::x86Reg CX86RegInfo::Get_MemoryStack() const asmjit::x86::Gp CX86RegInfo::Get_MemoryStack() const
{ {
for (int32_t i = 0, n = x86RegIndex_Size; i < n; i++) for (int32_t i = 0, n = x86RegIndex_Size; i < n; i++)
{ {
@ -655,32 +653,32 @@ CX86Ops::x86Reg CX86RegInfo::Get_MemoryStack() const
return GetX86RegFromIndex((x86RegIndex)i); return GetX86RegFromIndex((x86RegIndex)i);
} }
} }
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue) asmjit::x86::Gp CX86RegInfo::Map_MemoryStack(asmjit::x86::Gp Reg, bool bMapRegister, bool LoadValue)
{ {
CX86Ops::x86Reg CurrentMap = Get_MemoryStack(); asmjit::x86::Gp CurrentMap = Get_MemoryStack();
if (!bMapRegister) if (!bMapRegister)
{ {
// If not mapping then just return what the current mapping is // If not mapping then just return what the current mapping is
return CurrentMap; return CurrentMap;
} }
if (CurrentMap != CX86Ops::x86_Unknown && CurrentMap == Reg) if (CurrentMap.isValid() && CurrentMap == Reg)
{ {
// Already mapped to correct register // Already mapped to correct register
return CurrentMap; return CurrentMap;
} }
// Map a register // Map a register
if (Reg == CX86Ops::x86_Unknown) if (!Reg.isValid())
{ {
if (CurrentMap != CX86Ops::x86_Unknown) if (CurrentMap.isValid())
{ {
return CurrentMap; return CurrentMap;
} }
Reg = FreeX86Reg(); Reg = FreeX86Reg();
if (Reg == CX86Ops::x86_Unknown) if (!Reg.isValid())
{ {
g_Notify->DisplayError("Map_MemoryStack\n\nOut of registers"); g_Notify->DisplayError("Map_MemoryStack\n\nOut of registers");
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
@ -696,7 +694,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegis
// Move to a register/allocate register // Move to a register/allocate register
UnMap_X86reg(Reg); UnMap_X86reg(Reg);
if (CurrentMap != CX86Ops::x86_Unknown) if (CurrentMap.isValid())
{ {
m_CodeBlock.Log(" regcache: change allocation of memory stack from %s to %s", CX86Ops::x86_Name(CurrentMap), CX86Ops::x86_Name(Reg)); m_CodeBlock.Log(" regcache: change allocation of memory stack from %s to %s", CX86Ops::x86_Name(CurrentMap), CX86Ops::x86_Name(Reg));
SetX86Mapped(GetIndexFromX86Reg(Reg), CX86RegInfo::Stack_Mapped); SetX86Mapped(GetIndexFromX86Reg(Reg), CX86RegInfo::Stack_Mapped);
@ -717,7 +715,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegis
void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad) void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad)
{ {
CX86Ops::x86Reg Reg; asmjit::x86::Gp Reg;
if (MipsReg == 0) if (MipsReg == 0)
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
@ -727,7 +725,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
if (IsUnknown(MipsReg) || IsConst(MipsReg)) if (IsUnknown(MipsReg) || IsConst(MipsReg))
{ {
Reg = FreeX86Reg(); Reg = FreeX86Reg();
if (Reg < 0) if (Reg.isNone())
{ {
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -751,12 +749,11 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
} }
Reg = GetMipsRegMapLo(MipsReg); Reg = GetMipsRegMapLo(MipsReg);
} }
for (uint32_t i = 0; i < x86RegIndex_Size; i++) for (int i = 0; i < sizeof(m_x86reg_MapOrder) / sizeof(m_x86reg_MapOrder[0]); i++)
{ {
uint32_t MapOrder = GetX86MapOrder((x86RegIndex)i); if (m_x86reg_MapOrder[i] > 0)
if (MapOrder > 0)
{ {
SetX86MapOrder((x86RegIndex)i, MapOrder); m_x86reg_MapOrder[i] += 1;
} }
} }
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg); x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
@ -792,7 +789,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad) void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
{ {
CX86Ops::x86Reg x86Hi = CX86Ops::x86_Unknown, x86lo = CX86Ops::x86_Unknown; asmjit::x86::Gp x86Hi, x86lo;
if (MipsReg == 0) if (MipsReg == 0)
{ {
if (HaveDebugger()) if (HaveDebugger())
@ -806,7 +803,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
if (IsUnknown(MipsReg) || IsConst(MipsReg)) if (IsUnknown(MipsReg) || IsConst(MipsReg))
{ {
x86Hi = FreeX86Reg(); x86Hi = FreeX86Reg();
if (x86Hi < 0) if (!x86Hi.isValid())
{ {
if (HaveDebugger()) if (HaveDebugger())
{ {
@ -817,7 +814,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
SetX86Protected(GetIndexFromX86Reg(x86Hi), true); SetX86Protected(GetIndexFromX86Reg(x86Hi), true);
x86lo = FreeX86Reg(); x86lo = FreeX86Reg();
if (x86lo < 0) if (!x86lo.isValid())
{ {
g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers"); g_Notify->DisplayError("Map_GPR_64bit\n\nOut of registers");
return; return;
@ -834,7 +831,7 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
{ {
SetX86Protected(GetIndexFromX86Reg(x86lo), true); SetX86Protected(GetIndexFromX86Reg(x86lo), true);
x86Hi = FreeX86Reg(); x86Hi = FreeX86Reg();
if (x86Hi == CX86Ops::x86_Unknown) if (!x86Hi.isValid())
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return; return;
@ -927,81 +924,81 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
SetMipsRegState(MipsReg, STATE_MAPPED_64); SetMipsRegState(MipsReg, STATE_MAPPED_64);
} }
CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit) asmjit::x86::Gp CX86RegInfo::Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
{ {
if (!Reg8Bit && Reg == CX86Ops::x86_Unknown) if (!Reg8Bit && !Reg.isValid())
{ {
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX)) if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
{ {
Reg = CX86Ops::x86_EAX; Reg = asmjit::x86::eax;
} }
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX)) else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
{ {
Reg = CX86Ops::x86_EBX; Reg = asmjit::x86::ebx;
} }
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX)) else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
{ {
Reg = CX86Ops::x86_ECX; Reg = asmjit::x86::ecx;
} }
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX)) else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
{ {
Reg = CX86Ops::x86_EDX; Reg = asmjit::x86::edx;
} }
else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI)) else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI))
{ {
Reg = CX86Ops::x86_ESI; Reg = asmjit::x86::esi;
} }
else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI)) else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI))
{ {
Reg = CX86Ops::x86_EDI; Reg = asmjit::x86::edi;
} }
else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP)) else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP))
{ {
Reg = CX86Ops::x86_EBP; Reg = asmjit::x86::ebp;
} }
else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP)) else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP))
{ {
Reg = CX86Ops::x86_ESP; Reg = asmjit::x86::esp;
} }
if (Reg == CX86Ops::x86_Unknown) if (!Reg.isValid())
{ {
Reg = FreeX86Reg(); Reg = FreeX86Reg();
if (Reg == CX86Ops::x86_Unknown) if (!Reg.isValid())
{ {
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register"); WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
} }
} }
else if (Reg8Bit && Reg == CX86Ops::x86_Unknown) else if (Reg8Bit && !Reg.isValid())
{ {
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX)) if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
{ {
Reg = CX86Ops::x86_EAX; Reg = asmjit::x86::eax;
} }
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX)) else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
{ {
Reg = CX86Ops::x86_EBX; Reg = asmjit::x86::ebx;
} }
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX)) else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
{ {
Reg = CX86Ops::x86_ECX; Reg = asmjit::x86::ecx;
} }
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX)) else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
{ {
Reg = CX86Ops::x86_EDX; Reg = asmjit::x86::edx;
} }
if (Reg == CX86Ops::x86_Unknown) if (!Reg.isValid())
{ {
Reg = Free8BitX86Reg(); Reg = Free8BitX86Reg();
if (Reg < 0) if (!Reg.isValid())
{ {
WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free 8-bit register"); WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free 8-bit register");
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
} }
} }
@ -1011,11 +1008,11 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
{ {
WriteTrace(TraceRegisterCache, TraceError, "Register is protected"); WriteTrace(TraceRegisterCache, TraceError, "Register is protected");
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
return CX86Ops::x86_Unknown; return x86Reg_Unknown;
} }
SetX86Protected(GetIndexFromX86Reg(Reg), true); SetX86Protected(GetIndexFromX86Reg(Reg), true);
CX86Ops::x86Reg NewReg = FreeX86Reg(); asmjit::x86::Gp NewReg = FreeX86Reg();
for (uint32_t i = 1; i < 32; i++) for (uint32_t i = 1; i < 32; i++)
{ {
if (!IsMapped(i)) if (!IsMapped(i))
@ -1024,7 +1021,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
} }
if (GetMipsRegMapLo(i) == Reg) if (GetMipsRegMapLo(i) == Reg)
{ {
if (NewReg == CX86Ops::x86_Unknown) if (!NewReg.isValid())
{ {
UnMap_GPR(i, true); UnMap_GPR(i, true);
break; break;
@ -1042,7 +1039,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
} }
if (Is64Bit(i) && GetMipsRegMapHi(i) == Reg) if (Is64Bit(i) && GetMipsRegMapHi(i) == Reg)
{ {
if (NewReg == CX86Ops::x86_Unknown) if (!NewReg.isValid())
{ {
UnMap_GPR(i, true); UnMap_GPR(i, true);
break; break;
@ -1118,8 +1115,9 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
} }
} }
} }
SetX86Mapped(GetIndexFromX86Reg(Reg), Temp_Mapped); x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
SetX86Protected(GetIndexFromX86Reg(Reg), true); SetX86Mapped(RegIndex, Temp_Mapped);
SetX86Protected(RegIndex, true);
for (uint32_t i = 0; i < x86RegIndex_Size; i++) for (uint32_t i = 0; i < x86RegIndex_Size; i++)
{ {
int32_t MapOrder = GetX86MapOrder((x86RegIndex)i); int32_t MapOrder = GetX86MapOrder((x86RegIndex)i);
@ -1128,7 +1126,7 @@ CX86Ops::x86Reg CX86RegInfo::Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, b
SetX86MapOrder((x86RegIndex)i, MapOrder + 1); SetX86MapOrder((x86RegIndex)i, MapOrder + 1);
} }
} }
SetX86MapOrder(GetIndexFromX86Reg(Reg), 1); SetX86MapOrder(RegIndex, 1);
return Reg; return Reg;
} }
@ -1253,7 +1251,7 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
FixRoundModel(FpuRoundingModel(i)); FixRoundModel(FpuRoundingModel(i));
RegPos = StackTopPos(); RegPos = StackTopPos();
CX86Ops::x86Reg TempReg = Map_TempReg(CX86Ops::x86_Unknown, -1, false, false); asmjit::x86::Gp TempReg = Map_TempReg(x86Reg_Unknown, -1, false, false);
switch (m_x86fpu_State[StackTopPos()]) switch (m_x86fpu_State[StackTopPos()])
{ {
case FPU_Dword: case FPU_Dword:
@ -1356,9 +1354,9 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegMapLo(Reg)); m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegMapLo(Reg));
if (Is64Bit(Reg)) if (Is64Bit(Reg))
{ {
SetMipsRegMapLo(Reg, CX86Ops::x86_Unknown); SetMipsRegMapLo(Reg, x86Reg_Unknown);
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapHi(Reg)); m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapHi(Reg));
SetMipsRegMapHi(Reg, CX86Ops::x86_Unknown); SetMipsRegMapHi(Reg, x86Reg_Unknown);
} }
else else
{ {
@ -1374,49 +1372,49 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0); m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
} }
} }
SetMipsRegMapLo(Reg, CX86Ops::x86_Unknown); SetMipsRegMapLo(Reg, x86Reg_Unknown);
} }
SetMipsRegState(Reg, STATE_UNKNOWN); SetMipsRegState(Reg, STATE_UNKNOWN);
} }
CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg() asmjit::x86::Gp CX86RegInfo::UnMap_TempReg()
{ {
CX86Ops::x86Reg Reg = CX86Ops::x86_Unknown; asmjit::x86::Gp Reg;
if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX)) if (GetX86Mapped(x86RegIndex_EAX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EAX))
{ {
Reg = CX86Ops::x86_EAX; Reg = asmjit::x86::eax;
} }
else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX)) else if (GetX86Mapped(x86RegIndex_EBX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBX))
{ {
Reg = CX86Ops::x86_EBX; Reg = asmjit::x86::ebx;
} }
else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX)) else if (GetX86Mapped(x86RegIndex_ECX) == Temp_Mapped && !GetX86Protected(x86RegIndex_ECX))
{ {
Reg = CX86Ops::x86_ECX; Reg = asmjit::x86::ecx;
} }
else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX)) else if (GetX86Mapped(x86RegIndex_EDX) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDX))
{ {
Reg = CX86Ops::x86_EDX; Reg = asmjit::x86::edx;
} }
else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI)) else if (GetX86Mapped(x86RegIndex_ESI) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESI))
{ {
Reg = CX86Ops::x86_ESI; Reg = asmjit::x86::esi;
} }
else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI)) else if (GetX86Mapped(x86RegIndex_EDI) == Temp_Mapped && !GetX86Protected(x86RegIndex_EDI))
{ {
Reg = CX86Ops::x86_EDI; Reg = asmjit::x86::edi;
} }
else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP)) else if (GetX86Mapped(x86RegIndex_EBP) == Temp_Mapped && !GetX86Protected(x86RegIndex_EBP))
{ {
Reg = CX86Ops::x86_EBP; Reg = asmjit::x86::ebp;
} }
else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP)) else if (GetX86Mapped(x86RegIndex_ESP) == Temp_Mapped && !GetX86Protected(x86RegIndex_ESP))
{ {
Reg = CX86Ops::x86_ESP; Reg = asmjit::x86::esp;
} }
if (Reg != CX86Ops::x86_Unknown) if (Reg.isValid())
{ {
if (GetX86Mapped(GetIndexFromX86Reg(Reg)) == Temp_Mapped) if (GetX86Mapped(GetIndexFromX86Reg(Reg)) == Temp_Mapped)
{ {
@ -1427,7 +1425,7 @@ CX86Ops::x86Reg CX86RegInfo::UnMap_TempReg()
return Reg; return Reg;
} }
bool CX86RegInfo::UnMap_X86reg(CX86Ops::x86Reg Reg) bool CX86RegInfo::UnMap_X86reg(const asmjit::x86::Gp & Reg)
{ {
x86RegIndex RegIndex = GetIndexFromX86Reg(Reg); x86RegIndex RegIndex = GetIndexFromX86Reg(Reg);
if (GetX86Mapped(RegIndex) == NotMapped) if (GetX86Mapped(RegIndex) == NotMapped)
@ -1512,21 +1510,21 @@ void CX86RegInfo::WriteBackRegisters()
{ {
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000))) if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
{ {
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI); m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true; bEdiZero = true;
} }
if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000)) if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000))
{ {
m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF); m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
bEsiSign = true; bEsiSign = true;
} }
if ((GetMipsRegLo(count) & 0x80000000) != 0) if ((GetMipsRegLo(count) & 0x80000000) != 0)
{ {
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_ESI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
} }
else else
{ {
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
} }
} }
@ -1536,11 +1534,11 @@ void CX86RegInfo::WriteBackRegisters()
{ {
if (!bEdiZero) if (!bEdiZero)
{ {
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI); m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true; bEdiZero = true;
} }
} }
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
} }
else if (GetMipsRegLo(count) == 0xFFFFFFFF) else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{ {
@ -1548,11 +1546,11 @@ void CX86RegInfo::WriteBackRegisters()
{ {
if (!bEsiSign) if (!bEsiSign)
{ {
m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF); m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
bEsiSign = true; bEsiSign = true;
} }
} }
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_ESI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
} }
else else
{ {
@ -1566,10 +1564,10 @@ void CX86RegInfo::WriteBackRegisters()
{ {
if (!bEdiZero) if (!bEdiZero)
{ {
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI); m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true; bEdiZero = true;
} }
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
} }
if (GetMipsRegLo(count) == 0) if (GetMipsRegLo(count) == 0)
@ -1578,11 +1576,11 @@ void CX86RegInfo::WriteBackRegisters()
{ {
if (!bEdiZero) if (!bEdiZero)
{ {
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI); m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true; bEdiZero = true;
} }
} }
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
} }
else else
{ {
@ -1593,22 +1591,22 @@ void CX86RegInfo::WriteBackRegisters()
case CX86RegInfo::STATE_CONST_64: case CX86RegInfo::STATE_CONST_64:
if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0) if (GetMipsRegLo(count) == 0 || GetMipsRegHi(count) == 0)
{ {
m_Assembler.XorX86RegToX86Reg(CX86Ops::x86_EDI, CX86Ops::x86_EDI); m_Assembler.XorX86RegToX86Reg(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true; bEdiZero = true;
} }
if (GetMipsRegLo(count) == 0xFFFFFFFF || GetMipsRegHi(count) == 0xFFFFFFFF) if (GetMipsRegLo(count) == 0xFFFFFFFF || GetMipsRegHi(count) == 0xFFFFFFFF)
{ {
m_Assembler.MoveConstToX86reg(CX86Ops::x86_ESI, 0xFFFFFFFF); m_Assembler.MoveConstToX86reg(asmjit::x86::esi, 0xFFFFFFFF);
bEsiSign = true; bEsiSign = true;
} }
if (GetMipsRegHi(count) == 0) if (GetMipsRegHi(count) == 0)
{ {
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_EDI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
} }
else if (GetMipsRegLo(count) == 0xFFFFFFFF) else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{ {
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], CX86Ops::x86_ESI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
} }
else else
{ {
@ -1617,11 +1615,11 @@ void CX86RegInfo::WriteBackRegisters()
if (GetMipsRegLo(count) == 0) if (GetMipsRegLo(count) == 0)
{ {
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_EDI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
} }
else if (GetMipsRegLo(count) == 0xFFFFFFFF) else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{ {
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], CX86Ops::x86_ESI); m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
} }
else else
{ {

33
Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h
View File

@ -2,6 +2,7 @@
#if defined(__i386__) || defined(_M_IX86) #if defined(__i386__) || defined(_M_IX86)
#include <Project64-core/N64System/Mips/Register.h> #include <Project64-core/N64System/Mips/Register.h>
#include <Project64-core/N64System/Recompiler/asmjit.h>
#include <Project64-core/N64System/Recompiler/RegBase.h> #include <Project64-core/N64System/Recompiler/RegBase.h>
#include <Project64-core/N64System/Recompiler/x86/x86ops.h> #include <Project64-core/N64System/Recompiler/x86/x86ops.h>
#include <Project64-core/Settings/DebugSettings.h> #include <Project64-core/Settings/DebugSettings.h>
@ -19,8 +20,8 @@ enum x86RegIndex
x86RegIndex_Size, x86RegIndex_Size,
}; };
x86RegIndex GetIndexFromX86Reg(const CX86Ops::x86Reg & Reg); x86RegIndex GetIndexFromX86Reg(const asmjit::x86::Gp & Reg);
CX86Ops::x86Reg GetX86RegFromIndex(x86RegIndex Index); asmjit::x86::Gp GetX86RegFromIndex(x86RegIndex Index);
class CX86RegInfo : class CX86RegInfo :
public CRegBase, public CRegBase,
@ -69,26 +70,26 @@ public:
void UnMap_FPR(int32_t Reg, bool WriteBackValue); void UnMap_FPR(int32_t Reg, bool WriteBackValue);
CX86Ops::x86FpuValues StackPosition(int32_t Reg); CX86Ops::x86FpuValues StackPosition(int32_t Reg);
CX86Ops::x86Reg FreeX86Reg(); asmjit::x86::Gp FreeX86Reg();
CX86Ops::x86Reg Free8BitX86Reg(); asmjit::x86::Gp Free8BitX86Reg();
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad); void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad); void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
CX86Ops::x86Reg Get_MemoryStack() const; asmjit::x86::Gp Get_MemoryStack() const;
CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true); asmjit::x86::Gp Map_MemoryStack(asmjit::x86::Gp Reg, bool bMapRegister, bool LoadValue = true);
CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit); asmjit::x86::Gp Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit);
void ProtectGPR(uint32_t MipsReg); void ProtectGPR(uint32_t MipsReg);
void UnProtectGPR(uint32_t MipsReg); void UnProtectGPR(uint32_t MipsReg);
void ResetX86Protection(); void ResetX86Protection();
CX86Ops::x86Reg UnMap_TempReg(); asmjit::x86::Gp UnMap_TempReg();
void UnMap_GPR(uint32_t Reg, bool WriteBackValue); void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
bool UnMap_X86reg(CX86Ops::x86Reg Reg); bool UnMap_X86reg(const asmjit::x86::Gp & Reg);
void WriteBackRegisters(); void WriteBackRegisters();
CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg) const
{ {
return m_RegMapLo[Reg]; return m_RegMapLo[Reg];
} }
CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg) const
{ {
return m_RegMapHi[Reg]; return m_RegMapHi[Reg];
} }
@ -106,11 +107,11 @@ public:
return m_x86reg_MappedTo[Reg]; return m_x86reg_MappedTo[Reg];
} }
void SetMipsRegMapLo(int32_t GetMipsReg, CX86Ops::x86Reg Reg) void SetMipsRegMapLo(int32_t GetMipsReg, const asmjit::x86::Gp & Reg)
{ {
m_RegMapLo[GetMipsReg] = Reg; m_RegMapLo[GetMipsReg] = Reg;
} }
void SetMipsRegMapHi(int32_t GetMipsReg, CX86Ops::x86Reg Reg) void SetMipsRegMapHi(int32_t GetMipsReg, const asmjit::x86::Gp & Reg)
{ {
m_RegMapHi[GetMipsReg] = Reg; m_RegMapHi[GetMipsReg] = Reg;
} }
@ -150,11 +151,11 @@ private:
CCodeBlock & m_CodeBlock; CCodeBlock & m_CodeBlock;
CX86Ops & m_Assembler; CX86Ops & m_Assembler;
CX86Ops::x86Reg UnMap_8BitTempReg(); asmjit::x86::Gp UnMap_8BitTempReg();
// r4k // r4k
CX86Ops::x86Reg m_RegMapHi[32]; asmjit::x86::Gp m_RegMapHi[32];
CX86Ops::x86Reg m_RegMapLo[32]; asmjit::x86::Gp m_RegMapLo[32];
REG_MAPPED m_x86reg_MappedTo[x86RegIndex_Size]; REG_MAPPED m_x86reg_MappedTo[x86RegIndex_Size];
uint32_t m_x86reg_MapOrder[x86RegIndex_Size]; uint32_t m_x86reg_MapOrder[x86RegIndex_Size];

658
Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
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File diff suppressed because it is too large Load Diff

281
Source/Project64-core/N64System/Recompiler/x86/x86ops.h
View File

@ -1,5 +1,6 @@
#pragma once #pragma once
#if defined(__i386__) || defined(_M_IX86) #if defined(__i386__) || defined(_M_IX86)
#include <Project64-core/N64System/Recompiler/asmjit.h>
#if !defined(_MSC_VER) && !defined(_Printf_format_string_) #if !defined(_MSC_VER) && !defined(_Printf_format_string_)
#define _Printf_format_string_ #define _Printf_format_string_
@ -7,31 +8,11 @@
class CCodeBlock; class CCodeBlock;
static constexpr asmjit::x86::Gp x86Reg_Unknown = asmjit::x86::Gp();
class CX86Ops class CX86Ops
{ {
public: public:
enum x86Reg
{
x86_EAX = 0,
x86_EBX = 3,
x86_ECX = 1,
x86_EDX = 2,
x86_ESI = 6,
x86_EDI = 7,
x86_EBP = 5,
x86_ESP = 4,
x86_Unknown = -1,
x86_AL = 0,
x86_BL = 3,
x86_CL = 1,
x86_DL = 2,
x86_AH = 4,
x86_BH = 7,
x86_CH = 5,
x86_DH = 6
};
enum x86FpuValues enum x86FpuValues
{ {
x86_ST_Unknown = -1, x86_ST_Unknown = -1,
@ -53,9 +34,9 @@ public:
Multip_x8 = 8 Multip_x8 = 8
}; };
static const char * x86_Name(x86Reg Reg); static const char * x86_Name(const asmjit::x86::Gp & Reg);
static const char * x86_ByteName(x86Reg Reg); static const char * x86_ByteName(const asmjit::x86::Gp & Reg);
static const char * x86_HalfName(x86Reg Reg); static const char * x86_HalfName(const asmjit::x86::Gp & Reg);
static const char * fpu_Name(x86FpuValues Reg); static const char * fpu_Name(x86FpuValues Reg);
CX86Ops(CCodeBlock & CodeBlock); CX86Ops(CCodeBlock & CodeBlock);
@ -65,33 +46,33 @@ public:
void WriteX86Label(const char * Label); void WriteX86Label(const char * Label);
void AdcConstToVariable(void * Variable, const char * VariableName, uint8_t Constant); void AdcConstToVariable(void * Variable, const char * VariableName, uint8_t Constant);
void AdcConstToX86Reg(x86Reg Reg, uint32_t Const); void AdcConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void AdcVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName); void AdcVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void AdcX86RegToX86Reg(x86Reg Destination, x86Reg Source); void AdcX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void AddConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void AddConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void AddConstToX86Reg(x86Reg Reg, uint32_t Const, bool NeedCarry = false); void AddConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const, bool NeedCarry = false);
void AddVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName); void AddVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void AddX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg); void AddX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
void AddX86RegToX86Reg(x86Reg Destination, x86Reg Source); void AddX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void AndConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void AndConstToX86Reg(x86Reg Reg, uint32_t Const); void AndConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void AndVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName); void AndVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void AndVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiply); void AndVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiply);
void AndX86RegToX86Reg(x86Reg Destination, x86Reg Source); void AndX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void X86HardBreakPoint(); void X86HardBreakPoint();
void X86BreakPoint(const char * FileName, int32_t LineNumber); void X86BreakPoint(const char * FileName, int32_t LineNumber);
void CallFunc(uint32_t FunctPtr, const char * FunctName); void CallFunc(uint32_t FunctPtr, const char * FunctName);
void CallThis(uint32_t ThisPtr, uint32_t FunctPtr, char * FunctName, uint32_t StackSize); void CallThis(uint32_t ThisPtr, uint32_t FunctPtr, char * FunctName, uint32_t StackSize);
void CompConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void CompConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void CompConstToX86reg(x86Reg Reg, uint32_t Const); void CompConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void CompConstToX86regPointer(x86Reg Reg, uint32_t Const); void CompConstToX86regPointer(const asmjit::x86::Gp & Reg, uint32_t Const);
void CompX86regToVariable(x86Reg Reg, void * Variable, const char * VariableName); void CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void CompX86RegToX86Reg(x86Reg Destination, x86Reg Source); void CompX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void DecX86reg(x86Reg Reg); void DecX86reg(const asmjit::x86::Gp & Reg);
void DivX86reg(x86Reg Reg); void DivX86reg(const asmjit::x86::Gp & Reg);
void idivX86reg(x86Reg Reg); void idivX86reg(const asmjit::x86::Gp & Reg);
void imulX86reg(x86Reg Reg); void imulX86reg(const asmjit::x86::Gp & Reg);
void IncX86reg(x86Reg Reg); void IncX86reg(const asmjit::x86::Gp & Reg);
void JaeLabel8(const char * Label, uint8_t Value); void JaeLabel8(const char * Label, uint8_t Value);
void JaeLabel32(const char * Label, uint32_t Value); void JaeLabel32(const char * Label, uint32_t Value);
void JaLabel8(const char * Label, uint8_t Value); void JaLabel8(const char * Label, uint8_t Value);
@ -109,9 +90,9 @@ public:
void JleLabel32(const char * Label, uint32_t Value); void JleLabel32(const char * Label, uint32_t Value);
void JlLabel8(const char * Label, uint8_t Value); void JlLabel8(const char * Label, uint8_t Value);
void JlLabel32(const char * Label, uint32_t Value); void JlLabel32(const char * Label, uint32_t Value);
void JmpDirectReg(x86Reg Reg); void JmpDirectReg(const asmjit::x86::Gp & Reg);
void JmpIndirectLabel32(const char * Label, uint32_t location); void JmpIndirectLabel32(const char * Label, uint32_t location);
void JmpIndirectReg(x86Reg Reg); void JmpIndirectReg(const asmjit::x86::Gp & Reg);
void JmpLabel8(const char * Label, uint8_t Value); void JmpLabel8(const char * Label, uint8_t Value);
void JmpLabel32(const char * Label, uint32_t Value); void JmpLabel32(const char * Label, uint32_t Value);
void JneLabel8(const char * Label, uint8_t Value); void JneLabel8(const char * Label, uint8_t Value);
@ -124,107 +105,107 @@ public:
void JsLabel32(const char * Label, uint32_t Value); void JsLabel32(const char * Label, uint32_t Value);
void JzLabel8(const char * Label, uint8_t Value); void JzLabel8(const char * Label, uint8_t Value);
void JzLabel32(const char * Label, uint32_t Value); void JzLabel32(const char * Label, uint32_t Value);
void LeaRegReg(x86Reg RegDest, x86Reg RegSrc, uint32_t Const, Multipler multiplier); void LeaRegReg(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, uint32_t Const, Multipler multiplier);
void LeaRegReg2(x86Reg RegDest, x86Reg RegSrc, x86Reg RegSrc2, Multipler multiplier); void LeaRegReg2(const asmjit::x86::Gp & RegDest, const asmjit::x86::Gp & RegSrc, const asmjit::x86::Gp & RegSrc2, Multipler multiplier);
void LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t offset); void LeaSourceAndOffset(const asmjit::x86::Gp & x86DestReg, const asmjit::x86::Gp & x86SourceReg, int32_t offset);
void MoveConstByteToVariable(void * Variable, const char * VariableName, uint8_t Const); void MoveConstByteToVariable(void * Variable, const char * VariableName, uint8_t Const);
void MoveConstByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint8_t Const); void MoveConstByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t Const);
void MoveConstHalfToVariable(void * Variable, const char * VariableName, uint16_t Const); void MoveConstHalfToVariable(void * Variable, const char * VariableName, uint16_t Const);
void MoveConstHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint16_t Const); void MoveConstHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint16_t Const);
void MoveConstToMemoryDisp(x86Reg AddrReg, uint32_t Disp, uint32_t Const); void MoveConstToMemoryDisp(const asmjit::x86::Gp & AddrReg, uint32_t Disp, uint32_t Const);
void MoveConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void MoveConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void MoveConstToX86Pointer(x86Reg X86Pointer, uint32_t Const); void MoveConstToX86Pointer(const asmjit::x86::Gp & X86Pointer, uint32_t Const);
void MoveConstToX86reg(x86Reg Reg, uint32_t Const); void MoveConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void MoveConstToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, uint32_t Const); void MoveConstToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint32_t Const);
void MoveSxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2); void MoveSxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
void MoveSxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2); void MoveSxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
void MoveSxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName); void MoveSxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void MoveSxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName); void MoveSxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void MoveVariableDispToX86Reg(x86Reg Reg, void * Variable, const char * VariableName, x86Reg AddrReg, Multipler Multiplier); void MoveVariableDispToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName, const asmjit::x86::Gp & AddrReg, Multipler Multiplier);
void MoveVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName); void MoveVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void MoveX86PointerToX86reg(x86Reg Reg, x86Reg X86Pointer); void MoveX86PointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer);
void MoveX86PointerToX86regDisp(x86Reg Reg, x86Reg X86Pointer, uint8_t Disp); void MoveX86PointerToX86regDisp(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & X86Pointer, uint8_t Disp);
void MoveX86regByteToVariable(void * Variable, const char * VariableName, x86Reg Reg); void MoveX86regByteToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
void MoveX86regByteToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg); void MoveX86regByteToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
void MoveX86regHalfToVariable(void * Variable, const char * VariableName, x86Reg Reg); void MoveX86regHalfToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
void MoveX86regHalfToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg); void MoveX86regHalfToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
void MoveX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2); void MoveX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
void MoveX86regPointerToX86regDisp8(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2, uint8_t offset); void MoveX86regPointerToX86regDisp8(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, uint8_t offset);
void MoveX86regToMemory(x86Reg AddrReg, uint32_t Disp, x86Reg Reg); void MoveX86regToMemory(const asmjit::x86::Gp & AddrReg, uint32_t Disp, const asmjit::x86::Gp & Reg);
void MoveX86regToVariable(void * Variable, const char * VariableName, x86Reg Reg); void MoveX86regToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
void MoveX86RegToX86Reg(x86Reg Destination, x86Reg Source); void MoveX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void MoveX86regToX86Pointer(x86Reg X86Pointer, x86Reg Reg); void MoveX86regToX86Pointer(const asmjit::x86::Gp & X86Pointer, const asmjit::x86::Gp & Reg);
void MoveX86regToX86regPointer(x86Reg AddrReg1, x86Reg AddrReg2, x86Reg Reg); void MoveX86regToX86regPointer(const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2, const asmjit::x86::Gp & Reg);
void MoveZxByteX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2); void MoveZxByteX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
void MoveZxHalfX86regPointerToX86reg(x86Reg Reg, x86Reg AddrReg1, x86Reg AddrReg2); void MoveZxHalfX86regPointerToX86reg(const asmjit::x86::Gp & Reg, const asmjit::x86::Gp & AddrReg1, const asmjit::x86::Gp & AddrReg2);
void MoveZxVariableToX86regByte(x86Reg Reg, void * Variable, const char * VariableName); void MoveZxVariableToX86regByte(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void MoveZxVariableToX86regHalf(x86Reg Reg, void * Variable, const char * VariableName); void MoveZxVariableToX86regHalf(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void MulX86reg(x86Reg Reg); void MulX86reg(const asmjit::x86::Gp & Reg);
void NotX86Reg(x86Reg Reg); void NotX86Reg(const asmjit::x86::Gp & Reg);
void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void OrConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void OrConstToX86Reg(x86Reg Reg, uint32_t Const); void OrConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void OrVariableToX86Reg(x86Reg Reg, void * Variable, const char * VariableName); void OrVariableToX86Reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void OrX86RegToVariable(void * Variable, const char * VariableName, x86Reg Reg); void OrX86RegToVariable(void * Variable, const char * VariableName, const asmjit::x86::Gp & Reg);
void OrX86RegToX86Reg(x86Reg Destination, x86Reg Source); void OrX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void Push(x86Reg Reg); void Push(const asmjit::x86::Gp & Reg);
void Pushad(); void Pushad();
void PushImm32(uint32_t Value); void PushImm32(uint32_t Value);
void PushImm32(const char * String, uint32_t Value); void PushImm32(const char * String, uint32_t Value);
void Pop(x86Reg Reg); void Pop(const asmjit::x86::Gp & Reg);
void Popad(); void Popad();
void Ret(); void Ret();
void Seta(x86Reg Reg); void Seta(const asmjit::x86::Gp & Reg);
void Setae(x86Reg Reg); void Setae(const asmjit::x86::Gp & Reg);
void SetaVariable(void * Variable, const char * VariableName); void SetaVariable(void * Variable, const char * VariableName);
void Setb(x86Reg Reg); void Setb(const asmjit::x86::Gp & Reg);
void SetbVariable(void * Variable, const char * VariableName); void SetbVariable(void * Variable, const char * VariableName);
void Setg(x86Reg Reg); void Setg(const asmjit::x86::Gp & Reg);
void SetgVariable(void * Variable, const char * VariableName); void SetgVariable(void * Variable, const char * VariableName);
void Setl(x86Reg Reg); void Setl(const asmjit::x86::Gp & Reg);
void SetlVariable(void * Variable, const char * VariableName); void SetlVariable(void * Variable, const char * VariableName);
void Setz(x86Reg Reg); void Setz(const asmjit::x86::Gp & Reg);
void Setnz(x86Reg Reg); void Setnz(const asmjit::x86::Gp & Reg);
void ShiftLeftDouble(x86Reg Destination, x86Reg Source); void ShiftLeftDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void ShiftLeftDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate); void ShiftLeftDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate);
void ShiftLeftSign(x86Reg Reg); void ShiftLeftSign(const asmjit::x86::Gp & Reg);
void ShiftLeftSignImmed(x86Reg Reg, uint8_t Immediate); void ShiftLeftSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
void ShiftRightDouble(x86Reg Destination, x86Reg Source); void ShiftRightDouble(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void ShiftRightDoubleImmed(x86Reg Destination, x86Reg Source, uint8_t Immediate); void ShiftRightDoubleImmed(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source, uint8_t Immediate);
void ShiftRightSign(x86Reg Reg); void ShiftRightSign(const asmjit::x86::Gp & Reg);
void ShiftRightSignImmed(x86Reg Reg, uint8_t Immediate); void ShiftRightSignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
void ShiftRightUnsign(x86Reg Reg); void ShiftRightUnsign(const asmjit::x86::Gp & Reg);
void ShiftRightUnsignImmed(x86Reg Reg, uint8_t Immediate); void ShiftRightUnsignImmed(const asmjit::x86::Gp & Reg, uint8_t Immediate);
void SbbConstFromX86Reg(x86Reg Reg, uint32_t Const); void SbbConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void SbbVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName); void SbbVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void SbbX86RegToX86Reg(x86Reg Destination, x86Reg Source); void SbbX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName); void SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName);
void SubConstFromX86Reg(x86Reg Reg, uint32_t Const); void SubConstFromX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void SubVariableFromX86reg(x86Reg Reg, void * Variable, const char * VariableName); void SubVariableFromX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void SubX86RegToX86Reg(x86Reg Destination, x86Reg Source); void SubX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void TestConstToX86Reg(x86Reg Reg, uint32_t Const); void TestConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void TestVariable(void * Variable, const char * VariableName, uint32_t Const); void TestVariable(void * Variable, const char * VariableName, uint32_t Const);
void TestX86RegToX86Reg(x86Reg Destination, x86Reg Source); void TestX86RegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void TestX86ByteRegToX86Reg(x86Reg Destination, x86Reg Source); void TestX86ByteRegToX86Reg(const asmjit::x86::Gp & Destination, const asmjit::x86::Gp & Source);
void XorConstToX86Reg(x86Reg Reg, uint32_t Const); void XorConstToX86Reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void XorX86RegToX86Reg(x86Reg Source, x86Reg Destination); void XorX86RegToX86Reg(const asmjit::x86::Gp & Source, const asmjit::x86::Gp & Destination);
void XorVariableToX86reg(x86Reg Reg, void * Variable, const char * VariableName); void XorVariableToX86reg(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void fpuAbs(); void fpuAbs();
void fpuAddDword(void * Variable, const char * VariableName); void fpuAddDword(void * Variable, const char * VariableName);
void fpuAddDwordRegPointer(x86Reg x86Pointer); void fpuAddDwordRegPointer(const asmjit::x86::Gp & x86Pointer);
void fpuAddQword(void * Variable, const char * VariableName); void fpuAddQword(void * Variable, const char * VariableName);
void fpuAddQwordRegPointer(x86Reg X86Pointer); void fpuAddQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuAddReg(x86FpuValues Reg); void fpuAddReg(x86FpuValues Reg);
void fpuAddRegPop(int32_t & StackPos, x86FpuValues Reg); void fpuAddRegPop(int32_t & StackPos, x86FpuValues Reg);
void fpuComDword(void * Variable, const char * VariableName, bool Pop); void fpuComDword(void * Variable, const char * VariableName, bool Pop);
void fpuComDwordRegPointer(x86Reg X86Pointer, bool Pop); void fpuComDwordRegPointer(const asmjit::x86::Gp & X86Pointer, bool Pop);
void fpuComQword(void * Variable, const char * VariableName, bool Pop); void fpuComQword(void * Variable, const char * VariableName, bool Pop);
void fpuComQwordRegPointer(x86Reg X86Pointer, bool Pop); void fpuComQwordRegPointer(const asmjit::x86::Gp & X86Pointer, bool Pop);
void fpuComReg(x86FpuValues Reg, bool Pop); void fpuComReg(x86FpuValues Reg, bool Pop);
void fpuDivDword(void * Variable, const char * VariableName); void fpuDivDword(void * Variable, const char * VariableName);
void fpuDivDwordRegPointer(x86Reg X86Pointer); void fpuDivDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuDivQword(void * Variable, const char * VariableName); void fpuDivQword(void * Variable, const char * VariableName);
void fpuDivQwordRegPointer(x86Reg X86Pointer); void fpuDivQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuDivReg(x86FpuValues Reg); void fpuDivReg(x86FpuValues Reg);
void fpuDivRegPop(x86FpuValues Reg); void fpuDivRegPop(x86FpuValues Reg);
void fpuExchange(x86FpuValues Reg); void fpuExchange(x86FpuValues Reg);
@ -233,21 +214,21 @@ public:
void fpuIncStack(int32_t & StackPos); void fpuIncStack(int32_t & StackPos);
void fpuLoadControl(void * Variable, const char * VariableName); void fpuLoadControl(void * Variable, const char * VariableName);
void fpuLoadDword(int32_t & StackPos, void * Variable, const char * VariableName); void fpuLoadDword(int32_t & StackPos, void * Variable, const char * VariableName);
void fpuLoadDwordFromX86Reg(int32_t & StackPos, x86Reg Reg); void fpuLoadDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadDwordFromN64Mem(int32_t & StackPos, x86Reg Reg); void fpuLoadDwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadInt32bFromN64Mem(int32_t & StackPos, x86Reg Reg); void fpuLoadInt32bFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName); void fpuLoadIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName);
void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg); void fpuLoadIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName); void fpuLoadIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName);
void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg); void fpuLoadIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadQword(int32_t & StackPos, void * Variable, const char * VariableName); void fpuLoadQword(int32_t & StackPos, void * Variable, const char * VariableName);
void fpuLoadQwordFromX86Reg(int32_t & StackPos, x86Reg Reg); void fpuLoadQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadQwordFromN64Mem(int32_t & StackPos, x86Reg Reg); void fpuLoadQwordFromN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg);
void fpuLoadReg(int32_t & StackPos, x86FpuValues Reg); void fpuLoadReg(int32_t & StackPos, x86FpuValues Reg);
void fpuMulDword(void * Variable, const char * VariableName); void fpuMulDword(void * Variable, const char * VariableName);
void fpuMulDwordRegPointer(x86Reg X86Pointer); void fpuMulDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuMulQword(void * Variable, const char * VariableName); void fpuMulQword(void * Variable, const char * VariableName);
void fpuMulQwordRegPointer(x86Reg X86Pointer); void fpuMulQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuMulReg(x86FpuValues Reg); void fpuMulReg(x86FpuValues Reg);
void fpuMulRegPop(x86FpuValues Reg); void fpuMulRegPop(x86FpuValues Reg);
void fpuNeg(); void fpuNeg();
@ -255,24 +236,24 @@ public:
void fpuSqrt(); void fpuSqrt();
void fpuStoreControl(void * Variable, const char * VariableName); void fpuStoreControl(void * Variable, const char * VariableName);
void fpuStoreDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop); void fpuStoreDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
void fpuStoreDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop); void fpuStoreDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
void fpuStoreDwordToN64Mem(int32_t & StackPos, x86Reg Reg, bool Pop); void fpuStoreDwordToN64Mem(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool Pop);
void fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop); void fpuStoreIntegerDword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop); void fpuStoreIntegerDwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
void fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop); void fpuStoreIntegerQword(int32_t & StackPos, void * Variable, const char * VariableName, bool pop);
void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop); void fpuStoreIntegerQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
void fpuStoreQwordFromX86Reg(int32_t & StackPos, x86Reg Reg, bool pop); void fpuStoreQwordFromX86Reg(int32_t & StackPos, const asmjit::x86::Gp & Reg, bool pop);
void fpuStoreStatus(); void fpuStoreStatus();
void fpuSubDword(void * Variable, const char * VariableName); void fpuSubDword(void * Variable, const char * VariableName);
void fpuSubDwordRegPointer(x86Reg X86Pointer); void fpuSubDwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuSubDwordReverse(void * Variable, const char * VariableName); void fpuSubDwordReverse(void * Variable, const char * VariableName);
void fpuSubQword(void * Variable, const char * VariableName); void fpuSubQword(void * Variable, const char * VariableName);
void fpuSubQwordRegPointer(x86Reg X86Pointer); void fpuSubQwordRegPointer(const asmjit::x86::Gp & X86Pointer);
void fpuSubQwordReverse(void * Variable, const char * VariableName); void fpuSubQwordReverse(void * Variable, const char * VariableName);
void fpuSubReg(x86FpuValues Reg); void fpuSubReg(x86FpuValues Reg);
void fpuSubRegPop(x86FpuValues Reg); void fpuSubRegPop(x86FpuValues Reg);
static bool Is8BitReg(x86Reg Reg); static bool Is8BitReg(const asmjit::x86::Gp & Reg);
static uint8_t CalcMultiplyCode(Multipler Multiply); static uint8_t CalcMultiplyCode(Multipler Multiply);
static uint32_t GetAddressOf(int32_t value, ...); static uint32_t GetAddressOf(int32_t value, ...);
@ -284,6 +265,28 @@ private:
CX86Ops(const CX86Ops &); CX86Ops(const CX86Ops &);
CX86Ops & operator=(const CX86Ops &); CX86Ops & operator=(const CX86Ops &);
enum x86Reg
{
x86_EAX = 0,
x86_EBX = 3,
x86_ECX = 1,
x86_EDX = 2,
x86_ESI = 6,
x86_EDI = 7,
x86_EBP = 5,
x86_ESP = 4,
x86_AL = 0,
x86_BL = 3,
x86_CL = 1,
x86_DL = 2,
x86_AH = 4,
x86_BH = 7,
x86_CH = 5,
x86_DH = 6
};
static x86Reg RegValue(const asmjit::x86::Gp & Reg);
void CodeLog(_Printf_format_string_ const char * Text, ...); void CodeLog(_Printf_format_string_ const char * Text, ...);
static void BreakPointNotification(const char * FileName, int32_t LineNumber); static void BreakPointNotification(const char * FileName, int32_t LineNumber);

4
Source/Project64-core/Project64-core.vcxproj
View File

@ -38,6 +38,9 @@
<Lib> <Lib>
<AdditionalOptions>/ignore:4221%(AdditionalOptions)</AdditionalOptions> <AdditionalOptions>/ignore:4221%(AdditionalOptions)</AdditionalOptions>
</Lib> </Lib>
<ClCompile>
<AdditionalIncludeDirectories>$(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
</ClCompile>
</ItemDefinitionGroup> </ItemDefinitionGroup>
<ItemGroup> <ItemGroup>
<ClCompile Include="3rdParty\7zip.cpp"> <ClCompile Include="3rdParty\7zip.cpp">
@ -220,6 +223,7 @@
<ClInclude Include="N64System\Recompiler\Arm\ArmOps.h" /> <ClInclude Include="N64System\Recompiler\Arm\ArmOps.h" />
<ClInclude Include="N64System\Recompiler\Arm\ArmRecompilerOps.h" /> <ClInclude Include="N64System\Recompiler\Arm\ArmRecompilerOps.h" />
<ClInclude Include="N64System\Recompiler\Arm\ArmRegInfo.h" /> <ClInclude Include="N64System\Recompiler\Arm\ArmRegInfo.h" />
<ClInclude Include="N64System\Recompiler\asmjit.h" />
<ClInclude Include="N64System\Recompiler\CodeBlock.h" /> <ClInclude Include="N64System\Recompiler\CodeBlock.h" />
<ClInclude Include="N64System\Recompiler\CodeSection.h" /> <ClInclude Include="N64System\Recompiler\CodeSection.h" />
<ClInclude Include="N64System\Recompiler\ExitInfo.h" /> <ClInclude Include="N64System\Recompiler\ExitInfo.h" />

3
Source/Project64-core/Project64-core.vcxproj.filters
View File

@ -833,6 +833,9 @@
<ClInclude Include="N64System\Recompiler\Aarch64\Aarch64RecompilerOps.h"> <ClInclude Include="N64System\Recompiler\Aarch64\Aarch64RecompilerOps.h">
<Filter>Header Files\N64 System\Recompiler\Aarch64</Filter> <Filter>Header Files\N64 System\Recompiler\Aarch64</Filter>
</ClInclude> </ClInclude>
<ClInclude Include="N64System\Recompiler\asmjit.h">
<Filter>Header Files\N64 System\Recompiler</Filter>
</ClInclude>
</ItemGroup> </ItemGroup>
<ItemGroup> <ItemGroup>
<None Include="Version.h.in"> <None Include="Version.h.in">

3
Source/Project64/Project64.vcxproj
View File

@ -49,6 +49,9 @@
<PreBuildEvent> <PreBuildEvent>
<Command>IF NOT EXIST "$(SolutionDir)Config\Project64.cfg" (copy "$(SolutionDir)Config\Project64.cfg.development" "$(SolutionDir)Config\Project64.cfg")</Command> <Command>IF NOT EXIST "$(SolutionDir)Config\Project64.cfg" (copy "$(SolutionDir)Config\Project64.cfg.development" "$(SolutionDir)Config\Project64.cfg")</Command>
</PreBuildEvent> </PreBuildEvent>
<ClCompile>
<AdditionalIncludeDirectories>$(SolutionDir)Source\3rdParty\asmjit\src;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
</ClCompile>
</ItemDefinitionGroup> </ItemDefinitionGroup>
<ItemGroup> <ItemGroup>
<ClCompile Include="UserInterface\About.cpp" /> <ClCompile Include="UserInterface\About.cpp" />