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Core: Make the FPU double ops to be modularized so it is a simple function call for an opcode

This commit is contained in:
zilmar 2024-03-14 18:12:58 +10:30
parent 10b41dfef0
commit 5133d47502
4 changed files with 53 additions and 80 deletions
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108
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

@ -8299,26 +8299,7 @@ void CX86RecompilerOps::COP1_D_ADD()
if (FpuExceptionInRecompiler()) if (FpuExceptionInRecompiler())
{ {
CompileInitFpuOperation(CRegInfo::RoundDefault); COP1_D_Opcode(&CX86Ops::Fadd);
if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.ft, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Any))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(Reg1, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(Reg2, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
m_Assembler.fadd(asmjit::x86::qword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);
m_Assembler.fpuStoreQwordFromX86Reg(m_RegWorkingSet.StackTopPos(), TempReg, false);
CompileCheckFPUResult64(TempReg);
m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
} }
else else
{ {
@ -8347,26 +8328,7 @@ void CX86RecompilerOps::COP1_D_SUB()
if (FpuExceptionInRecompiler()) if (FpuExceptionInRecompiler())
{ {
CompileInitFpuOperation(CRegInfo::RoundDefault); COP1_D_Opcode(&CX86Ops::Fsub);
if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.ft, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Any))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(Reg1, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(Reg2, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
m_Assembler.fsub(asmjit::x86::qword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);
m_Assembler.fpuStoreQwordFromX86Reg(m_RegWorkingSet.StackTopPos(), TempReg, false);
CompileCheckFPUResult64(TempReg);
m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
} }
else else
{ {
@ -8407,26 +8369,7 @@ void CX86RecompilerOps::COP1_D_MUL()
if (FpuExceptionInRecompiler()) if (FpuExceptionInRecompiler())
{ {
CompileInitFpuOperation(CRegInfo::RoundDefault); COP1_D_Opcode(&CX86Ops::Fmul);
if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.ft, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Any))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(Reg1, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(Reg2, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
m_Assembler.fmul(asmjit::x86::qword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);
m_Assembler.fpuStoreQwordFromX86Reg(m_RegWorkingSet.StackTopPos(), TempReg, false);
CompileCheckFPUResult64(TempReg);
m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
} }
else else
{ {
@ -8456,26 +8399,7 @@ void CX86RecompilerOps::COP1_D_DIV()
if (FpuExceptionInRecompiler()) if (FpuExceptionInRecompiler())
{ {
CompileInitFpuOperation(CRegInfo::RoundDefault); COP1_D_Opcode(&CX86Ops::Fdiv);
if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.ft, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Any))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(Reg1, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(Reg2, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, Reg1, CRegInfo::FPU_Double);
m_Assembler.fdiv(asmjit::x86::qword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);
m_Assembler.fpuStoreQwordFromX86Reg(m_RegWorkingSet.StackTopPos(), TempReg, false);
CompileCheckFPUResult64(TempReg);
m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
} }
else else
{ {
@ -10948,6 +10872,30 @@ void CX86RecompilerOps::CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmj
} }
} }
void CX86RecompilerOps::COP1_D_Opcode(void (CX86Ops::*Instruction)(const asmjit::x86::Mem &))
{
CompileInitFpuOperation(CRegInfo::RoundDefault);
if (m_RegWorkingSet.RegInStack(m_Opcode.fs, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.ft, CRegInfo::FPU_Any) ||
m_RegWorkingSet.RegInStack(m_Opcode.fd, CRegInfo::FPU_Any))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.fs, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
TempReg = m_RegWorkingSet.FPRValuePointer(m_Opcode.ft, CRegInfo::FPU_Double);
CompileCheckFPUInput(TempReg, FpuOpSize_64bit);
m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, m_Opcode.fs, CRegInfo::FPU_Double);
(m_Assembler.*Instruction)(asmjit::x86::qword_ptr(TempReg));
m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
m_Assembler.mov(TempReg, (uint64_t)&m_TempValue64);
m_Assembler.fpuStoreQwordFromX86Reg(m_RegWorkingSet.StackTopPos(), TempReg, false);
CompileCheckFPUResult64(TempReg);
m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
}
void CX86RecompilerOps::SB_Const(uint32_t Value, uint32_t VAddr) void CX86RecompilerOps::SB_Const(uint32_t Value, uint32_t VAddr)
{ {
if (VAddr < 0x80000000 || VAddr >= 0xC0000000) if (VAddr < 0x80000000 || VAddr >= 0xC0000000)

1
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
View File

@ -270,6 +270,7 @@ private:
asmjit::x86::Gp BaseOffsetAddress(bool UseBaseRegister); asmjit::x86::Gp BaseOffsetAddress(bool UseBaseRegister);
void CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend); void CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint8_t ValueSize, bool SignExtend);
void CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint64_t Value, uint8_t ValueSize); void CompileStoreMemoryValue(asmjit::x86::Gp AddressReg, asmjit::x86::Gp ValueReg, const asmjit::x86::Gp & ValueRegHi, uint64_t Value, uint8_t ValueSize);
void COP1_D_Opcode(void (CX86Ops::*Instruction)(const asmjit::x86::Mem &));
void SB_Const(uint32_t Value, uint32_t Addr); void SB_Const(uint32_t Value, uint32_t Addr);
void SB_Register(const asmjit::x86::Gp & Reg, uint32_t Addr); void SB_Register(const asmjit::x86::Gp & Reg, uint32_t Addr);

20
Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
View File

@ -233,6 +233,26 @@ void CX86Ops::CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable,
} }
} }
void CX86Ops::Fadd(const asmjit::x86::Mem & Mem)
{
fadd(Mem);
}
void CX86Ops::Fdiv(const asmjit::x86::Mem & Mem)
{
fdiv(Mem);
}
void CX86Ops::Fmul(const asmjit::x86::Mem & Mem)
{
fmul(Mem);
}
void CX86Ops::Fsub(const asmjit::x86::Mem & Mem)
{
fsub(Mem);
}
void CX86Ops::JaeLabel(const char * LabelName, asmjit::Label & JumpLabel) void CX86Ops::JaeLabel(const char * LabelName, asmjit::Label & JumpLabel)
{ {
AddSymbol(stdstr_f("L%d", JumpLabel.id()).c_str(), LabelName); AddSymbol(stdstr_f("L%d", JumpLabel.id()).c_str(), LabelName);

4
Source/Project64-core/N64System/Recompiler/x86/x86ops.h
View File

@ -44,6 +44,10 @@ public:
void CompConstToVariable(void * Variable, const char * VariableName, uint32_t Const); void CompConstToVariable(void * Variable, const char * VariableName, uint32_t Const);
void CompConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const); void CompConstToX86reg(const asmjit::x86::Gp & Reg, uint32_t Const);
void CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName); void CompX86regToVariable(const asmjit::x86::Gp & Reg, void * Variable, const char * VariableName);
void Fadd(const asmjit::x86::Mem & Mem);
void Fdiv(const asmjit::x86::Mem & Mem);
void Fmul(const asmjit::x86::Mem & Mem);
void Fsub(const asmjit::x86::Mem & Mem);
void JaeLabel(const char * LabelName, asmjit::Label & JumpLabel); void JaeLabel(const char * LabelName, asmjit::Label & JumpLabel);
void JaLabel(const char * LabelName, asmjit::Label & JumpLabel); void JaLabel(const char * LabelName, asmjit::Label & JumpLabel);
void JbLabel(const char * LabelName, asmjit::Label & JumpLabel); void JbLabel(const char * LabelName, asmjit::Label & JumpLabel);