Core: Remove the option to turn off tlb

This commit is contained in:
zilmar 2022-01-10 17:46:01 +10:30
parent 5d82837984
commit 30a40ea0a8
23 changed files with 287 additions and 1012 deletions

View File

@ -526,7 +526,6 @@ Internal Name=LAMBORGHINI
Status=Compatible Status=Compatible
32bit=Yes 32bit=Yes
RDRAM Size=4 RDRAM Size=4
Use TLB=No
[41B25DC4-1B726786-C:45] [41B25DC4-1B726786-C:45]
Good Name=Automobili Lamborghini (U) Good Name=Automobili Lamborghini (U)
@ -534,7 +533,6 @@ Internal Name=LAMBORGHINI
Status=Compatible Status=Compatible
32bit=Yes 32bit=Yes
RDRAM Size=4 RDRAM Size=4
Use TLB=No
//================ B ================ //================ B ================
[E340A49C-74318D41-C:4A] [E340A49C-74318D41-C:4A]
@ -4799,7 +4797,6 @@ SMM-Cache=0
SMM-FUNC=0 SMM-FUNC=0
SMM-PI DMA=0 SMM-PI DMA=0
SMM-TLB=0 SMM-TLB=0
Use TLB=No
[09CC4801-E42EE491-C:4A] [09CC4801-E42EE491-C:4A]
Good Name=Pilotwings 64 (J) Good Name=Pilotwings 64 (J)
@ -4813,7 +4810,6 @@ SMM-Cache=0
SMM-FUNC=0 SMM-FUNC=0
SMM-PI DMA=0 SMM-PI DMA=0
SMM-TLB=0 SMM-TLB=0
Use TLB=No
[C851961C-78FCAAFA-C:45] [C851961C-78FCAAFA-C:45]
Good Name=Pilotwings 64 (U) Good Name=Pilotwings 64 (U)
@ -4828,7 +4824,6 @@ SMM-Cache=0
SMM-FUNC=0 SMM-FUNC=0
SMM-PI DMA=0 SMM-PI DMA=0
SMM-TLB=0 SMM-TLB=0
Use TLB=No
[4A1CD153-D830AEF8-C:50] [4A1CD153-D830AEF8-C:50]
Good Name=Pokemon Puzzle League (E) Good Name=Pokemon Puzzle League (E)
@ -5339,7 +5334,6 @@ Status=Issues (core)
32bit=Yes 32bit=Yes
RDRAM Size=4 RDRAM Size=4
SMM-FUNC=0 SMM-FUNC=0
Use TLB=No
[0304C48E-AC4001B8-C:45] [0304C48E-AC4001B8-C:45]
Good Name=Rat Attack (U) (M6) Good Name=Rat Attack (U) (M6)
@ -5348,7 +5342,6 @@ Status=Issues (core)
32bit=Yes 32bit=Yes
RDRAM Size=4 RDRAM Size=4
SMM-FUNC=0 SMM-FUNC=0
Use TLB=No
[60D5E10B-8BEDED46-C:50] [60D5E10B-8BEDED46-C:50]
Good Name=Rayman 2 - The Great Escape (E) (M5) Good Name=Rayman 2 - The Great Escape (E) (M5)
@ -6301,7 +6294,6 @@ Internal Name=SUPER SPEED RACE 64
Status=Compatible Status=Compatible
32bit=Yes 32bit=Yes
RDRAM Size=4 RDRAM Size=4
Use TLB=No
[2CBB127F-09C2BFD8-C:50] [2CBB127F-09C2BFD8-C:50]
Good Name=Supercross 2000 (E) (M3) Good Name=Supercross 2000 (E) (M3)
@ -8110,7 +8102,6 @@ Status=Compatible
32bit=Yes 32bit=Yes
CPU Type=Interpreter CPU Type=Interpreter
RDRAM Size=4 RDRAM Size=4
Use TLB=No
[EDA1A0C7-58EE0464-C:0] [EDA1A0C7-58EE0464-C:0]
Good Name=Chaos 89 Demo (PD) Good Name=Chaos 89 Demo (PD)

View File

@ -273,7 +273,6 @@
#524# "Default save type:" #524# "Default save type:"
#525# "Counter factor:" #525# "Counter factor:"
#526# "Larger compile buffer" #526# "Larger compile buffer"
#527# "Use TLB"
#528# "Register caching" #528# "Register caching"
#529# "Delay SI interrupt" #529# "Delay SI interrupt"
#530# "Fast SP" #530# "Fast SP"

View File

@ -74,7 +74,6 @@ CJniBridegSettings::CJniBridegSettings()
// Default settings // Default settings
ADD_SETTING(Default_RDRamSize); ADD_SETTING(Default_RDRamSize);
ADD_SETTING(Default_UseHleGfx); ADD_SETTING(Default_UseHleGfx);
ADD_SETTING(Default_UseTlb);
ADD_SETTING(Default_ViRefreshRate); ADD_SETTING(Default_ViRefreshRate);
ADD_SETTING(Default_AiCountPerBytes); ADD_SETTING(Default_AiCountPerBytes);
ADD_SETTING(Default_CounterFactor); ADD_SETTING(Default_CounterFactor);
@ -92,7 +91,6 @@ CJniBridegSettings::CJniBridegSettings()
ADD_SETTING(Rdb_CpuType); ADD_SETTING(Rdb_CpuType);
ADD_SETTING(Rdb_RDRamSize); ADD_SETTING(Rdb_RDRamSize);
ADD_SETTING(Rdb_CounterFactor); ADD_SETTING(Rdb_CounterFactor);
ADD_SETTING(Rdb_UseTlb);
ADD_SETTING(Rdb_DelayDP); ADD_SETTING(Rdb_DelayDP);
ADD_SETTING(Rdb_DelaySi); ADD_SETTING(Rdb_DelaySi);
ADD_SETTING(Rdb_32Bit); ADD_SETTING(Rdb_32Bit);
@ -158,7 +156,6 @@ CJniBridegSettings::CJniBridegSettings()
ADD_SETTING(Game_LastSaveTime); ADD_SETTING(Game_LastSaveTime);
ADD_SETTING(Game_RDRamSize); ADD_SETTING(Game_RDRamSize);
ADD_SETTING(Game_CounterFactor); ADD_SETTING(Game_CounterFactor);
ADD_SETTING(Game_UseTlb);
ADD_SETTING(Game_DelayDP); ADD_SETTING(Game_DelayDP);
ADD_SETTING(Game_DelaySI); ADD_SETTING(Game_DelaySI);
ADD_SETTING(Game_FastSP); ADD_SETTING(Game_FastSP);

View File

@ -310,7 +310,6 @@ enum LanguageStringID
ROM_SAVE_TYPE = 524, ROM_SAVE_TYPE = 524,
ROM_COUNTER_FACTOR = 525, ROM_COUNTER_FACTOR = 525,
ROM_LARGE_BUFFER = 526, ROM_LARGE_BUFFER = 526,
ROM_USE_TLB = 527,
ROM_REG_CACHE = 528, ROM_REG_CACHE = 528,
ROM_DELAY_SI = 529, ROM_DELAY_SI = 529,
ROM_FAST_SP = 530, ROM_FAST_SP = 530,

View File

@ -257,7 +257,6 @@ void CLanguage::LoadDefaultStrings(void)
DEF_STR(ROM_SAVE_TYPE, "Default save type:"); DEF_STR(ROM_SAVE_TYPE, "Default save type:");
DEF_STR(ROM_COUNTER_FACTOR, "Counter factor:"); DEF_STR(ROM_COUNTER_FACTOR, "Counter factor:");
DEF_STR(ROM_LARGE_BUFFER, "Larger compile buffer"); DEF_STR(ROM_LARGE_BUFFER, "Larger compile buffer");
DEF_STR(ROM_USE_TLB, "Use TLB");
DEF_STR(ROM_REG_CACHE, "Register caching"); DEF_STR(ROM_REG_CACHE, "Register caching");
DEF_STR(ROM_DELAY_SI, "Delay SI interrupt"); DEF_STR(ROM_DELAY_SI, "Delay SI interrupt");
DEF_STR(ROM_FAST_SP, "Fast SP"); DEF_STR(ROM_FAST_SP, "Fast SP");

View File

@ -2353,37 +2353,21 @@ void R4300iOp::COP0_MT()
void R4300iOp::COP0_CO_TLBR() void R4300iOp::COP0_CO_TLBR()
{ {
if (!g_System->bUseTlb())
{
return;
}
g_TLB->ReadEntry(); g_TLB->ReadEntry();
} }
void R4300iOp::COP0_CO_TLBWI() void R4300iOp::COP0_CO_TLBWI()
{ {
if (!g_System->bUseTlb())
{
return;
}
g_TLB->WriteEntry(g_Reg->INDEX_REGISTER & 0x1F, false); g_TLB->WriteEntry(g_Reg->INDEX_REGISTER & 0x1F, false);
} }
void R4300iOp::COP0_CO_TLBWR() void R4300iOp::COP0_CO_TLBWR()
{ {
if (!g_System->bUseTlb())
{
return;
}
g_TLB->WriteEntry(g_Reg->RANDOM_REGISTER & 0x1F, true); g_TLB->WriteEntry(g_Reg->RANDOM_REGISTER & 0x1F, true);
} }
void R4300iOp::COP0_CO_TLBP() void R4300iOp::COP0_CO_TLBP()
{ {
if (!g_System->bUseTlb())
{
return;
}
g_TLB->Probe(); g_TLB->Probe();
} }

View File

@ -2194,8 +2194,6 @@ void CArmRecompilerOps::LB()
TempRegAddress = Map_TempReg(Arm_Any, m_Opcode.base, false); TempRegAddress = Map_TempReg(Arm_Any, m_Opcode.base, false);
AddConstToArmReg(TempRegAddress, (int16_t)m_Opcode.immediate); AddConstToArmReg(TempRegAddress, (int16_t)m_Opcode.immediate);
} }
if (g_System->bUseTlb())
{
ArmReg TempReg = Map_TempReg(Arm_Any, -1, false); ArmReg TempReg = Map_TempReg(Arm_Any, -1, false);
ShiftRightUnsignImmed(TempReg, TempRegAddress, 12); ShiftRightUnsignImmed(TempReg, TempRegAddress, 12);
ArmReg ReadMapReg = Map_Variable(CArmRegInfo::VARIABLE_TLB_READMAP); ArmReg ReadMapReg = Map_Variable(CArmRegInfo::VARIABLE_TLB_READMAP);
@ -2205,11 +2203,6 @@ void CArmRecompilerOps::LB()
Map_GPR_32bit(m_Opcode.rt, true, -1); Map_GPR_32bit(m_Opcode.rt, true, -1);
LoadArmRegPointerByteToArmReg(GetMipsRegMapLo(m_Opcode.rt), TempReg, TempRegAddress, 0); LoadArmRegPointerByteToArmReg(GetMipsRegMapLo(m_Opcode.rt), TempReg, TempRegAddress, 0);
SignExtendByte(GetMipsRegMapLo(m_Opcode.rt)); SignExtendByte(GetMipsRegMapLo(m_Opcode.rt));
}
else
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
} }
void CArmRecompilerOps::LH() void CArmRecompilerOps::LH()
@ -2270,7 +2263,7 @@ void CArmRecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
} }
else if (g_System->bUseTlb()) else
{ {
if (IsMapped(m_Opcode.rt)) if (IsMapped(m_Opcode.rt))
{ {
@ -2307,34 +2300,6 @@ void CArmRecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
MoveConstToVariable(1, _LLBit, "LLBit"); MoveConstToVariable(1, _LLBit, "LLBit");
} }
} }
else
{
g_Notify->BreakPoint(__FILE__, __LINE__);
/*if (IsMapped(m_Opcode.base))
{
ProtectGPR(m_Opcode.base);
if (m_Opcode.offset != 0)
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, -1);
LeaSourceAndOffset(GetMipsRegMapLo(m_Opcode.rt), GetMipsRegMapLo(m_Opcode.base), (int16_t)m_Opcode.offset);
}
else
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, m_Opcode.base);
}
}
else
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, m_Opcode.base);
AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), (int16_t)m_Opcode.immediate);
}
AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), 0x1FFFFFFF);
MoveN64MemToX86reg(GetMipsRegMapLo(m_Opcode.rt), GetMipsRegMapLo(m_Opcode.rt));
if (bRecordLLBit)
{
MoveConstToVariable(1, _LLBit, "LLBit");
}*/
}
if (g_System->bFastSP() && m_Opcode.rt == 29) if (g_System->bFastSP() && m_Opcode.rt == 29)
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
@ -2488,8 +2453,6 @@ void CArmRecompilerOps::SW(bool bCheckLLbit)
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp()); m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp());
} }
if (g_System->bUseTlb())
{
if (IsMapped(m_Opcode.base)) { ProtectGPR(m_Opcode.base); } if (IsMapped(m_Opcode.base)) { ProtectGPR(m_Opcode.base); }
ArmReg TempRegAddress = Map_TempReg(Arm_Any, IsMapped(m_Opcode.base) ? -1 : m_Opcode.base, false); ArmReg TempRegAddress = Map_TempReg(Arm_Any, IsMapped(m_Opcode.base) ? -1 : m_Opcode.base, false);
if (IsMapped(m_Opcode.base)) if (IsMapped(m_Opcode.base))
@ -2502,8 +2465,6 @@ void CArmRecompilerOps::SW(bool bCheckLLbit)
} }
ArmReg TempRegValue = Arm_Unknown; ArmReg TempRegValue = Arm_Unknown;
if (g_System->bUseTlb())
{
ArmReg TempReg = Map_TempReg(Arm_Any, -1, false); ArmReg TempReg = Map_TempReg(Arm_Any, -1, false);
ShiftRightUnsignImmed(TempReg, TempRegAddress, 12); ShiftRightUnsignImmed(TempReg, TempRegAddress, 12);
ArmReg WriteMapReg = Map_Variable(CArmRegInfo::VARIABLE_TLB_WRITEMAP); ArmReg WriteMapReg = Map_Variable(CArmRegInfo::VARIABLE_TLB_WRITEMAP);
@ -2518,31 +2479,6 @@ void CArmRecompilerOps::SW(bool bCheckLLbit)
{ {
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
}
else
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
else
{
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
UnProtectGPR(m_Opcode.rt);
if (m_Opcode.base != 0) { UnMap_GPR(m_Opcode.base, true); }
if (m_Opcode.rt != 0) { UnMap_GPR(m_Opcode.rt, true); }
if (g_Settings->LoadBool(Game_32Bit))
{
CompileInterpterCall((void *)R4300iOp32::SW, "R4300iOp32::SW");
}
else
{
CompileInterpterCall((void *)R4300iOp::SW, "R4300iOp::SW");
}
}
} }
void CArmRecompilerOps::SWR() void CArmRecompilerOps::SWR()
@ -2671,8 +2607,6 @@ void CArmRecompilerOps::LWC1()
} }
ArmReg TempRegValue = Arm_Unknown; ArmReg TempRegValue = Arm_Unknown;
if (g_System->bUseTlb())
{
ArmReg TempReg = Map_TempReg(Arm_Any, -1, false); ArmReg TempReg = Map_TempReg(Arm_Any, -1, false);
ShiftRightUnsignImmed(TempReg, TempRegAddress, 12); ShiftRightUnsignImmed(TempReg, TempRegAddress, 12);
ArmReg ReadMapReg = Map_Variable(CArmRegInfo::VARIABLE_TLB_READMAP); ArmReg ReadMapReg = Map_Variable(CArmRegInfo::VARIABLE_TLB_READMAP);
@ -2684,16 +2618,6 @@ void CArmRecompilerOps::LWC1()
TempRegValue = TempReg; TempRegValue = TempReg;
LoadArmRegPointerToArmReg(TempRegValue, TempReg, TempRegAddress, 0); LoadArmRegPointerToArmReg(TempRegValue, TempReg, TempRegAddress, 0);
}
else
{
g_Notify->BreakPoint(__FILE__, __LINE__);
#ifdef tofix
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
TempReg3 = Map_TempReg(x86_Any, -1, false);
MoveN64MemToX86reg(TempReg3, TempReg1);
#endif
}
ArmReg FprReg = Map_Variable(CArmRegInfo::VARIABLE_FPR); ArmReg FprReg = Map_Variable(CArmRegInfo::VARIABLE_FPR);
LoadArmRegPointerToArmReg(TempRegAddress, FprReg, (uint8_t)(m_Opcode.ft << 2)); LoadArmRegPointerToArmReg(TempRegAddress, FprReg, (uint8_t)(m_Opcode.ft << 2));
StoreArmRegToArmRegPointer(TempRegValue, TempRegAddress, 0); StoreArmRegToArmRegPointer(TempRegValue, TempRegAddress, 0);
@ -4002,7 +3926,6 @@ void CArmRecompilerOps::COP0_MT()
void CArmRecompilerOps::COP0_CO_TLBR() void CArmRecompilerOps::COP0_CO_TLBR()
{ {
if (!g_System->bUseTlb()) { return; }
if (g_Settings->LoadBool(Game_32Bit)) if (g_Settings->LoadBool(Game_32Bit))
{ {
CompileInterpterCall((void *)R4300iOp32::COP0_CO_TLBR, "R4300iOp32::COP0_CO_TLBR"); CompileInterpterCall((void *)R4300iOp32::COP0_CO_TLBR, "R4300iOp32::COP0_CO_TLBR");
@ -4015,7 +3938,6 @@ void CArmRecompilerOps::COP0_CO_TLBR()
void CArmRecompilerOps::COP0_CO_TLBWI() void CArmRecompilerOps::COP0_CO_TLBWI()
{ {
if (!g_System->bUseTlb()) { return; }
if (g_Settings->LoadBool(Game_32Bit)) if (g_Settings->LoadBool(Game_32Bit))
{ {
CompileInterpterCall((void *)R4300iOp32::COP0_CO_TLBWI, "R4300iOp32::COP0_CO_TLBWI"); CompileInterpterCall((void *)R4300iOp32::COP0_CO_TLBWI, "R4300iOp32::COP0_CO_TLBWI");
@ -4028,8 +3950,6 @@ void CArmRecompilerOps::COP0_CO_TLBWI()
void CArmRecompilerOps::COP0_CO_TLBWR() void CArmRecompilerOps::COP0_CO_TLBWR()
{ {
if (!g_System->bUseTlb()) { return; }
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp()); m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp());
UpdateCounters(m_RegWorkingSet, false, true); UpdateCounters(m_RegWorkingSet, false, true);
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp()); m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp());
@ -4047,7 +3967,6 @@ void CArmRecompilerOps::COP0_CO_TLBWR()
void CArmRecompilerOps::COP0_CO_TLBP() void CArmRecompilerOps::COP0_CO_TLBP()
{ {
if (!g_System->bUseTlb()) { return; }
if (g_Settings->LoadBool(Game_32Bit)) if (g_Settings->LoadBool(Game_32Bit))
{ {
CompileInterpterCall((void *)R4300iOp32::COP0_CO_TLBP, "R4300iOp32::COP0_CO_TLBP"); CompileInterpterCall((void *)R4300iOp32::COP0_CO_TLBP, "R4300iOp32::COP0_CO_TLBP");
@ -6594,12 +6513,6 @@ void CArmRecompilerOps::SW_Register(ArmReg Reg, uint32_t VAddr)
{ {
m_RegWorkingSet.SetArmRegProtected(Reg, true); m_RegWorkingSet.SetArmRegProtected(Reg, true);
if (!g_System->bUseTlb())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
ArmReg TempReg = Map_TempReg(Arm_Any, -1, false); ArmReg TempReg = Map_TempReg(Arm_Any, -1, false);
ArmReg TempRegAddress = Map_TempReg(Arm_Any, -1, false); ArmReg TempRegAddress = Map_TempReg(Arm_Any, -1, false);
MoveConstToArmReg(TempRegAddress, VAddr); MoveConstToArmReg(TempRegAddress, VAddr);
@ -7100,12 +7013,6 @@ void CArmRecompilerOps::LW_KnownAddress(ArmReg Reg, uint32_t VAddr)
if (VAddr < 0x80000000 || VAddr >= 0xC0000000) if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{ {
if (!g_System->bUseTlb())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
ArmReg TempReg = Map_TempReg(Arm_Any, -1, false); ArmReg TempReg = Map_TempReg(Arm_Any, -1, false);
ArmReg TempRegAddress = Map_TempReg(Arm_Any, -1, false); ArmReg TempRegAddress = Map_TempReg(Arm_Any, -1, false);
MoveConstToArmReg(TempRegAddress, VAddr); MoveConstToArmReg(TempRegAddress, VAddr);

View File

@ -61,19 +61,6 @@ void CRecompiler::Run()
RecompilerMain_ChangeMemory(); RecompilerMain_ChangeMemory();
} }
else else
{
if (g_System->bUseTlb())
{
if (g_System->bSMM_ValidFunc())
{
RecompilerMain_Lookup_validate_TLB();
}
else
{
RecompilerMain_Lookup_TLB();
}
}
else
{ {
if (g_System->bSMM_ValidFunc()) if (g_System->bSMM_ValidFunc())
{ {
@ -85,7 +72,6 @@ void CRecompiler::Run()
} }
} }
} }
}
__except_catch() __except_catch()
{ {
g_Notify->DisplayError(MSG_UNKNOWN_MEM_ACTION); g_Notify->DisplayError(MSG_UNKNOWN_MEM_ACTION);
@ -156,48 +142,6 @@ void CRecompiler::RecompilerMain_VirtualTable_validate()
} }
void CRecompiler::RecompilerMain_Lookup() void CRecompiler::RecompilerMain_Lookup()
{
while (!m_EndEmulation)
{
uint32_t PhysicalAddr = PROGRAM_COUNTER & 0x1FFFFFFF;
if (PhysicalAddr < g_System->RdramSize())
{
CCompiledFunc * info = JumpTable()[PhysicalAddr >> 2];
if (info == nullptr)
{
info = CompileCode();
if (info == nullptr || m_EndEmulation)
{
break;
}
if (g_System->bSMM_Protect())
{
m_MMU.ProtectMemory(PROGRAM_COUNTER & ~0xFFF, PROGRAM_COUNTER | 0xFFF);
}
JumpTable()[PhysicalAddr >> 2] = info;
}
(info->Function())();
}
else
{
uint32_t opsExecuted = 0;
while (m_MMU.TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr) && PhysicalAddr >= g_System->RdramSize())
{
CInterpreterCPU::ExecuteOps(g_System->CountPerOp());
opsExecuted += g_System->CountPerOp();
}
if (g_SyncSystem)
{
g_System->UpdateSyncCPU(g_SyncSystem, opsExecuted);
g_System->SyncCPU(g_SyncSystem);
}
}
}
}
void CRecompiler::RecompilerMain_Lookup_TLB()
{ {
uint32_t PhysicalAddr; uint32_t PhysicalAddr;
@ -251,171 +195,6 @@ void CRecompiler::RecompilerMain_Lookup_TLB()
} }
} }
void CRecompiler::RecompilerMain_Lookup_validate()
{
while (!m_EndEmulation)
{
uint32_t PhysicalAddr = PROGRAM_COUNTER & 0x1FFFFFFF;
if (PhysicalAddr < g_System->RdramSize())
{
CCompiledFunc * info = JumpTable()[PhysicalAddr >> 2];
if (info == nullptr)
{
info = CompileCode();
if (info == nullptr || m_EndEmulation)
{
break;
}
if (g_System->bSMM_Protect())
{
m_MMU.ProtectMemory(PROGRAM_COUNTER & ~0xFFF, PROGRAM_COUNTER | 0xFFF);
}
JumpTable()[PhysicalAddr >> 2] = info;
}
else
{
if (*(info->MemLocation(0)) != info->MemContents(0) ||
*(info->MemLocation(1)) != info->MemContents(1))
{
ClearRecompCode_Virt((info->EnterPC() - 0x1000) & ~0xFFF, 0x3000, Remove_ValidateFunc);
info = nullptr;
continue;
}
}
(info->Function())();
}
else
{
uint32_t opsExecuted = 0;
while (m_MMU.TranslateVaddr(PROGRAM_COUNTER, PhysicalAddr) && PhysicalAddr >= g_System->RdramSize())
{
CInterpreterCPU::ExecuteOps(g_System->CountPerOp());
opsExecuted += g_System->CountPerOp();
}
if (g_SyncSystem)
{
g_System->UpdateSyncCPU(g_SyncSystem, opsExecuted);
g_System->SyncCPU(g_SyncSystem);
}
}
}
}
void CRecompiler::RecompilerMain_Lookup_validate_TLB()
{
WriteTrace(TraceRecompiler, TraceInfo, "Start");
bool & Done = m_EndEmulation;
uint32_t & PC = PROGRAM_COUNTER;
uint32_t PhysicalAddr;
while (!Done)
{
if (!m_MMU.TranslateVaddr(PC, PhysicalAddr))
{
m_Registers.DoTLBReadMiss(false, PC);
if (!m_MMU.TranslateVaddr(PC, PhysicalAddr))
{
g_Notify->DisplayError(stdstr_f("Failed to translate PC to a PAddr: %X\n\nEmulation stopped", PC).c_str());
Done = true;
}
continue;
}
if (PhysicalAddr < g_System->RdramSize())
{
CCompiledFunc * info = JumpTable()[PhysicalAddr >> 2];
if (info == nullptr)
{
info = CompileCode();
if (info == nullptr || m_EndEmulation)
{
break;
}
if (g_System->bSMM_Protect())
{
m_MMU.ProtectMemory(PC & ~0xFFF, PC | 0xFFF);
}
JumpTable()[PhysicalAddr >> 2] = info;
}
else
{
if (*(info->MemLocation(0)) != info->MemContents(0) ||
*(info->MemLocation(1)) != info->MemContents(1))
{
if (PhysicalAddr > 0x1000)
{
ClearRecompCode_Phys((PhysicalAddr - 0x1000) & ~0xFFF, 0x3000, Remove_ValidateFunc);
}
else
{
ClearRecompCode_Phys(0, 0x2000, Remove_ValidateFunc);
}
info = JumpTable()[PhysicalAddr >> 2];
if (info != nullptr)
{
g_Notify->BreakPoint(__FILE__, __LINE__);
info = nullptr;
}
continue;
}
}
if (bRecordExecutionTimes())
{
uint64_t PreNonCPUTime = g_System->m_CPU_Usage.NonCPUTime();
HighResTimeStamp StartTime, EndTime;
StartTime.SetToNow();
(info->Function())();
EndTime.SetToNow();
uint64_t PostNonCPUTime = g_System->m_CPU_Usage.NonCPUTime();
uint64_t TimeTaken = EndTime.GetMicroSeconds() - StartTime.GetMicroSeconds();
if (PostNonCPUTime >= PreNonCPUTime)
{
TimeTaken -= PostNonCPUTime - PreNonCPUTime;
}
else
{
TimeTaken -= PostNonCPUTime;
}
FUNCTION_PROFILE::iterator itr = m_BlockProfile.find(info->Function());
if (itr == m_BlockProfile.end())
{
FUNCTION_PROFILE_DATA data = { 0 };
data.Address = info->EnterPC();
std::pair<FUNCTION_PROFILE::iterator, bool> res = m_BlockProfile.insert(FUNCTION_PROFILE::value_type(info->Function(), data));
itr = res.first;
}
WriteTrace(TraceN64System, TraceNotice, "EndTime: %X StartTime: %X TimeTaken: %X", (uint32_t)(EndTime.GetMicroSeconds() & 0xFFFFFFFF), (uint32_t)(StartTime.GetMicroSeconds() & 0xFFFFFFFF), (uint32_t)TimeTaken);
itr->second.TimeTaken += TimeTaken;
}
else
{
(info->Function())();
}
}
else
{
uint32_t opsExecuted = 0;
while (m_MMU.TranslateVaddr(PC, PhysicalAddr) && PhysicalAddr >= g_System->RdramSize())
{
CInterpreterCPU::ExecuteOps(g_System->CountPerOp());
opsExecuted += g_System->CountPerOp();
}
if (g_SyncSystem)
{
g_System->UpdateSyncCPU(g_SyncSystem, opsExecuted);
g_System->SyncCPU(g_SyncSystem);
}
}
}
WriteTrace(TraceRecompiler, TraceDebug, "Done");
}
void CRecompiler::Reset() void CRecompiler::Reset()
{ {
WriteTrace(TraceRecompiler, TraceDebug, "Start"); WriteTrace(TraceRecompiler, TraceDebug, "Start");
@ -542,8 +321,6 @@ void CRecompiler::ClearRecompCode_Phys(uint32_t Address, int length, REMOVE_REAS
ClearRecompCode_Virt(Address + 0x80000000, length, Reason); ClearRecompCode_Virt(Address + 0x80000000, length, Reason);
ClearRecompCode_Virt(Address + 0xA0000000, length, Reason); ClearRecompCode_Virt(Address + 0xA0000000, length, Reason);
if (g_System->bUseTlb())
{
uint32_t VAddr, Index = 0; uint32_t VAddr, Index = 0;
while (g_TLB->PAddrToVAddr(Address, VAddr, Index)) while (g_TLB->PAddrToVAddr(Address, VAddr, Index))
{ {
@ -551,7 +328,6 @@ void CRecompiler::ClearRecompCode_Phys(uint32_t Address, int length, REMOVE_REAS
ClearRecompCode_Virt(VAddr, length, Reason); ClearRecompCode_Virt(VAddr, length, Reason);
} }
} }
}
else if (g_System->LookUpMode() == FuncFind_PhysicalLookup) else if (g_System->LookUpMode() == FuncFind_PhysicalLookup)
{ {
if (Address < g_System->RdramSize()) if (Address < g_System->RdramSize())

View File

@ -65,14 +65,11 @@ private:
typedef std::map <CCompiledFunc::Func, FUNCTION_PROFILE_DATA> FUNCTION_PROFILE; typedef std::map <CCompiledFunc::Func, FUNCTION_PROFILE_DATA> FUNCTION_PROFILE;
// Main loops for the different look up methods
void RecompilerMain_VirtualTable(); void RecompilerMain_VirtualTable();
void RecompilerMain_VirtualTable_validate(); void RecompilerMain_VirtualTable_validate();
void RecompilerMain_ChangeMemory(); void RecompilerMain_ChangeMemory();
void RecompilerMain_Lookup(); void RecompilerMain_Lookup();
void RecompilerMain_Lookup_TLB();
void RecompilerMain_Lookup_validate(); void RecompilerMain_Lookup_validate();
void RecompilerMain_Lookup_validate_TLB();
CCompiledFuncList m_Functions; CCompiledFuncList m_Functions;
CMipsMemoryVM & m_MMU; CMipsMemoryVM & m_MMU;
@ -80,7 +77,5 @@ private:
bool & m_EndEmulation; bool & m_EndEmulation;
uint32_t m_MemoryStack; uint32_t m_MemoryStack;
FUNCTION_PROFILE m_BlockProfile; FUNCTION_PROFILE m_BlockProfile;
// Quick access to registers
uint32_t & PROGRAM_COUNTER; uint32_t & PROGRAM_COUNTER;
}; };

View File

@ -2741,12 +2741,6 @@ void CX86RecompilerOps::LB_KnownAddress(x86Reg Reg, uint32_t VAddr, bool SignExt
if (VAddr < 0x80000000 || VAddr >= 0xC0000000) if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{ {
if (!g_System->bUseTlb())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
x86Reg TlbMappReg = Map_TempReg(x86_Any, -1, false); x86Reg TlbMappReg = Map_TempReg(x86_Any, -1, false);
MoveConstToX86reg(VAddr >> 12, TlbMappReg); MoveConstToX86reg(VAddr >> 12, TlbMappReg);
x86Reg AddrReg = Map_TempReg(x86_Any, -1, false); x86Reg AddrReg = Map_TempReg(x86_Any, -1, false);
@ -2812,12 +2806,6 @@ void CX86RecompilerOps::LH_KnownAddress(x86Reg Reg, uint32_t VAddr, bool SignExt
if (VAddr < 0x80000000 || VAddr >= 0xC0000000) if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{ {
if (!g_System->bUseTlb())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
x86Reg TlbMappReg = Map_TempReg(x86_Any, -1, false); x86Reg TlbMappReg = Map_TempReg(x86_Any, -1, false);
MoveConstToX86reg(VAddr >> 12, TlbMappReg); MoveConstToX86reg(VAddr >> 12, TlbMappReg);
x86Reg AddrReg = Map_TempReg(x86_Any, -1, false); x86Reg AddrReg = Map_TempReg(x86_Any, -1, false);
@ -2920,8 +2908,6 @@ void CX86RecompilerOps::LB()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint8, "x86TestReadBreakpoint8"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint8, "x86TestReadBreakpoint8");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -2930,14 +2916,6 @@ void CX86RecompilerOps::LB()
XorConstToX86Reg(TempReg1, 3); XorConstToX86Reg(TempReg1, 3);
Map_GPR_32bit(m_Opcode.rt, true, -1); Map_GPR_32bit(m_Opcode.rt, true, -1);
MoveSxByteX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt)); MoveSxByteX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt));
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
XorConstToX86Reg(TempReg1, 3);
Map_GPR_32bit(m_Opcode.rt, true, -1);
MoveSxN64MemToX86regByte(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
} }
void CX86RecompilerOps::LH() void CX86RecompilerOps::LH()
@ -2983,8 +2961,6 @@ void CX86RecompilerOps::LH()
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint16, "x86TestReadBreakpoint16"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint16, "x86TestReadBreakpoint16");
if (g_System->bUseTlb())
{
x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false); x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -2993,14 +2969,6 @@ void CX86RecompilerOps::LH()
XorConstToX86Reg(TempReg1, 2); XorConstToX86Reg(TempReg1, 2);
Map_GPR_32bit(m_Opcode.rt, true, -1); Map_GPR_32bit(m_Opcode.rt, true, -1);
MoveSxHalfX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt)); MoveSxHalfX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt));
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
XorConstToX86Reg(TempReg1, 2);
Map_GPR_32bit(m_Opcode.rt, true, -1);
MoveSxN64MemToX86regHalf(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
} }
void CX86RecompilerOps::LWL() void CX86RecompilerOps::LWL()
@ -3055,15 +3023,12 @@ void CX86RecompilerOps::LWL()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
x86Reg TempReg2 = x86_Unknown; x86Reg TempReg2 = x86_Unknown;
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4);
CompileReadTLBMiss(TempReg1, TempReg2); CompileReadTLBMiss(TempReg1, TempReg2);
}
x86Reg OffsetReg = Map_TempReg(x86_Any, -1, false); x86Reg OffsetReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, OffsetReg); MoveX86RegToX86Reg(TempReg1, OffsetReg);
AndConstToX86Reg(OffsetReg, 3); AndConstToX86Reg(OffsetReg, 3);
@ -3073,15 +3038,7 @@ void CX86RecompilerOps::LWL()
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt); Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt);
AndVariableDispToX86Reg((void *)R4300iOp::LWL_MASK, "LWL_MASK", GetMipsRegMapLo(m_Opcode.rt), OffsetReg, Multip_x4); AndVariableDispToX86Reg((void *)R4300iOp::LWL_MASK, "LWL_MASK", GetMipsRegMapLo(m_Opcode.rt), OffsetReg, Multip_x4);
MoveVariableDispToX86Reg((void *)R4300iOp::LWL_SHIFT, "LWL_SHIFT", shift, OffsetReg, 4); MoveVariableDispToX86Reg((void *)R4300iOp::LWL_SHIFT, "LWL_SHIFT", shift, OffsetReg, 4);
if (g_System->bUseTlb())
{
MoveX86regPointerToX86reg(TempReg1, TempReg2, TempReg1); MoveX86regPointerToX86reg(TempReg1, TempReg2, TempReg1);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
MoveN64MemToX86reg(TempReg1, TempReg1);
}
ShiftLeftSign(TempReg1); ShiftLeftSign(TempReg1);
AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rt), TempReg1); AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
} }
@ -3121,7 +3078,7 @@ void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
g_Notify->BreakPoint(__FILE__, __LINE__); g_Notify->BreakPoint(__FILE__, __LINE__);
} }
} }
else if (g_System->bUseTlb()) else
{ {
PreReadInstruction(); PreReadInstruction();
if (IsMapped(m_Opcode.rt)) if (IsMapped(m_Opcode.rt))
@ -3166,35 +3123,6 @@ void CX86RecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
MoveConstToVariable(1, _LLBit, "LLBit"); MoveConstToVariable(1, _LLBit, "LLBit");
} }
} }
else
{
PreReadInstruction();
if (IsMapped(m_Opcode.base))
{
ProtectGPR(m_Opcode.base);
if (m_Opcode.offset != 0)
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, -1);
LeaSourceAndOffset(GetMipsRegMapLo(m_Opcode.rt), GetMipsRegMapLo(m_Opcode.base), (int16_t)m_Opcode.offset);
}
else
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, m_Opcode.base);
}
}
else
{
Map_GPR_32bit(m_Opcode.rt, ResultSigned, m_Opcode.base);
AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), (int16_t)m_Opcode.immediate);
}
TestReadBreakpoint(GetMipsRegMapLo(m_Opcode.rt), (void *)x86TestReadBreakpoint32, "x86TestReadBreakpoint32");
AndConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt), 0x1FFFFFFF);
MoveN64MemToX86reg(GetMipsRegMapLo(m_Opcode.rt), GetMipsRegMapLo(m_Opcode.rt));
if (bRecordLLBit)
{
MoveConstToVariable(1, _LLBit, "LLBit");
}
}
if (g_System->bFastSP() && m_Opcode.rt == 29) if (g_System->bFastSP() && m_Opcode.rt == 29)
{ {
ResetX86Protection(); ResetX86Protection();
@ -3210,12 +3138,6 @@ void CX86RecompilerOps::LW_KnownAddress(x86Reg Reg, uint32_t VAddr)
m_RegWorkingSet.SetX86Protected(Reg, true); m_RegWorkingSet.SetX86Protected(Reg, true);
if (VAddr < 0x80000000 || VAddr >= 0xC0000000) if (VAddr < 0x80000000 || VAddr >= 0xC0000000)
{ {
if (!g_System->bUseTlb())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
return;
}
x86Reg TlbMappReg = Map_TempReg(x86_Any, -1, false); x86Reg TlbMappReg = Map_TempReg(x86_Any, -1, false);
MoveConstToX86reg(VAddr >> 12, TlbMappReg); MoveConstToX86reg(VAddr >> 12, TlbMappReg);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TlbMappReg, TlbMappReg, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TlbMappReg, TlbMappReg, 4);
@ -3559,8 +3481,6 @@ void CX86RecompilerOps::LBU()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint8, "x86TestReadBreakpoint8"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint8, "x86TestReadBreakpoint8");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -3569,14 +3489,6 @@ void CX86RecompilerOps::LBU()
XorConstToX86Reg(TempReg1, 3); XorConstToX86Reg(TempReg1, 3);
Map_GPR_32bit(m_Opcode.rt, false, -1); Map_GPR_32bit(m_Opcode.rt, false, -1);
MoveZxByteX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt)); MoveZxByteX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt));
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
XorConstToX86Reg(TempReg1, 3);
Map_GPR_32bit(m_Opcode.rt, false, -1);
MoveZxN64MemToX86regByte(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
} }
void CX86RecompilerOps::LHU() void CX86RecompilerOps::LHU()
@ -3624,8 +3536,6 @@ void CX86RecompilerOps::LHU()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint16, "x86TestReadBreakpoint16"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint16, "x86TestReadBreakpoint16");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -3634,14 +3544,6 @@ void CX86RecompilerOps::LHU()
XorConstToX86Reg(TempReg1, 2); XorConstToX86Reg(TempReg1, 2);
Map_GPR_32bit(m_Opcode.rt, false, -1); Map_GPR_32bit(m_Opcode.rt, false, -1);
MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt)); MoveZxHalfX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt));
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
XorConstToX86Reg(TempReg1, 2);
Map_GPR_32bit(m_Opcode.rt, true, -1);
MoveZxN64MemToX86regHalf(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
} }
void CX86RecompilerOps::LWR() void CX86RecompilerOps::LWR()
@ -3698,15 +3600,12 @@ void CX86RecompilerOps::LWR()
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint32, "x86TestReadBreakpoint32"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint32, "x86TestReadBreakpoint32");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4);
CompileReadTLBMiss(TempReg1, TempReg2); CompileReadTLBMiss(TempReg1, TempReg2);
}
OffsetReg = Map_TempReg(x86_Any, -1, false); OffsetReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, OffsetReg); MoveX86RegToX86Reg(TempReg1, OffsetReg);
AndConstToX86Reg(OffsetReg, 3); AndConstToX86Reg(OffsetReg, 3);
@ -3715,15 +3614,7 @@ void CX86RecompilerOps::LWR()
Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt); Map_GPR_32bit(m_Opcode.rt, true, m_Opcode.rt);
AndVariableDispToX86Reg((void *)R4300iOp::LWR_MASK, "R4300iOp::LWR_MASK", GetMipsRegMapLo(m_Opcode.rt), OffsetReg, Multip_x4); AndVariableDispToX86Reg((void *)R4300iOp::LWR_MASK, "R4300iOp::LWR_MASK", GetMipsRegMapLo(m_Opcode.rt), OffsetReg, Multip_x4);
MoveVariableDispToX86Reg((void *)R4300iOp::LWR_SHIFT, "R4300iOp::LWR_SHIFT", shift, OffsetReg, 4); MoveVariableDispToX86Reg((void *)R4300iOp::LWR_SHIFT, "R4300iOp::LWR_SHIFT", shift, OffsetReg, 4);
if (g_System->bUseTlb())
{
MoveX86regPointerToX86reg(TempReg1, TempReg2, TempReg1); MoveX86regPointerToX86reg(TempReg1, TempReg2, TempReg1);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
MoveN64MemToX86reg(TempReg1, TempReg1);
}
ShiftRightUnsign(TempReg1); ShiftRightUnsign(TempReg1);
AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rt), TempReg1); AddX86RegToX86Reg(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
} }
@ -3790,8 +3681,6 @@ void CX86RecompilerOps::SB()
Compile_StoreInstructClean(TempReg1, 4); Compile_StoreInstructClean(TempReg1, 4);
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint8, "x86TestWriteBreakpoint8"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint8, "x86TestWriteBreakpoint8");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -3811,25 +3700,6 @@ void CX86RecompilerOps::SB()
UnProtectGPR(m_Opcode.rt); UnProtectGPR(m_Opcode.rt);
MoveX86regByteToX86regPointer(Map_TempReg(x86_Any8Bit, m_Opcode.rt, false), TempReg1, TempReg2); MoveX86regByteToX86regPointer(Map_TempReg(x86_Any8Bit, m_Opcode.rt, false), TempReg1, TempReg2);
} }
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
XorConstToX86Reg(TempReg1, 3);
if (IsConst(m_Opcode.rt))
{
MoveConstByteToN64Mem((uint8_t)(GetMipsRegLo(m_Opcode.rt) & 0xFF), TempReg1);
}
else if (IsMapped(m_Opcode.rt) && Is8BitReg(GetMipsRegMapLo(m_Opcode.rt)))
{
MoveX86regByteToN64Mem(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
else
{
UnProtectGPR(m_Opcode.rt);
MoveX86regByteToN64Mem(Map_TempReg(x86_Any8Bit, m_Opcode.rt, false), TempReg1);
}
}
} }
void CX86RecompilerOps::SH() void CX86RecompilerOps::SH()
@ -3887,8 +3757,6 @@ void CX86RecompilerOps::SH()
} }
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint16, "x86TestWriteBreakpoint16"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint16, "x86TestWriteBreakpoint16");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -3907,24 +3775,6 @@ void CX86RecompilerOps::SH()
{ {
MoveX86regHalfToX86regPointer(Map_TempReg(x86_Any, m_Opcode.rt, false), TempReg1, TempReg2); MoveX86regHalfToX86regPointer(Map_TempReg(x86_Any, m_Opcode.rt, false), TempReg1, TempReg2);
} }
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
XorConstToX86Reg(TempReg1, 2);
if (IsConst(m_Opcode.rt))
{
MoveConstHalfToN64Mem((uint16_t)(GetMipsRegLo(m_Opcode.rt) & 0xFFFF), TempReg1);
}
else if (IsMapped(m_Opcode.rt))
{
MoveX86regHalfToN64Mem(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
else
{
MoveX86regHalfToN64Mem(Map_TempReg(x86_Any, m_Opcode.rt, false), TempReg1);
}
}
} }
void CX86RecompilerOps::SWL() void CX86RecompilerOps::SWL()
@ -3974,14 +3824,11 @@ void CX86RecompilerOps::SWL()
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
x86Reg TempReg2 = x86_Unknown; x86Reg TempReg2 = x86_Unknown;
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4);
CompileReadTLBMiss(TempReg1, TempReg2); CompileReadTLBMiss(TempReg1, TempReg2);
}
x86Reg OffsetReg = Map_TempReg(x86_Any, -1, false); x86Reg OffsetReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, OffsetReg); MoveX86RegToX86Reg(TempReg1, OffsetReg);
@ -3989,15 +3836,7 @@ void CX86RecompilerOps::SWL()
AndConstToX86Reg(TempReg1, (uint32_t)~3); AndConstToX86Reg(TempReg1, (uint32_t)~3);
x86Reg Value = Map_TempReg(x86_Any, -1, false); x86Reg Value = Map_TempReg(x86_Any, -1, false);
if (g_System->bUseTlb())
{
MoveX86regPointerToX86reg(TempReg1, TempReg2, Value); MoveX86regPointerToX86reg(TempReg1, TempReg2, Value);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
MoveN64MemToX86reg(Value, TempReg1);
}
AndVariableDispToX86Reg((void *)R4300iOp::SWL_MASK, "R4300iOp::SWL_MASK", Value, OffsetReg, Multip_x4); AndVariableDispToX86Reg((void *)R4300iOp::SWL_MASK, "R4300iOp::SWL_MASK", Value, OffsetReg, Multip_x4);
if (!IsConst(m_Opcode.rt) || GetMipsRegLo(m_Opcode.rt) != 0) if (!IsConst(m_Opcode.rt) || GetMipsRegLo(m_Opcode.rt) != 0)
@ -4019,18 +3858,11 @@ void CX86RecompilerOps::SWL()
AddX86RegToX86Reg(Value, OffsetReg); AddX86RegToX86Reg(Value, OffsetReg);
} }
if (g_System->bUseTlb())
{
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_WriteMap, "MMU->TLB_WriteMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_WriteMap, "MMU->TLB_WriteMap", TempReg2, TempReg2, 4);
MoveX86regToX86regPointer(Value, TempReg1, TempReg2); MoveX86regToX86regPointer(Value, TempReg1, TempReg2);
}
else
{
MoveX86regToN64Mem(Value, TempReg1);
}
} }
void CX86RecompilerOps::SW() void CX86RecompilerOps::SW()
@ -4130,8 +3962,6 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
} }
Compile_StoreInstructClean(TempReg1, 4); Compile_StoreInstructClean(TempReg1, 4);
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -4165,27 +3995,6 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
MoveVariableToX86reg(_LLBit, "_LLBit", GetMipsRegMapLo(m_Opcode.rt)); MoveVariableToX86reg(_LLBit, "_LLBit", GetMipsRegMapLo(m_Opcode.rt));
} }
} }
else
{
if (bCheckLLbit)
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
if (IsConst(m_Opcode.rt))
{
MoveConstToN64Mem(GetMipsRegLo(m_Opcode.rt), TempReg1);
}
else if (IsMapped(m_Opcode.rt))
{
MoveX86regToN64Mem(GetMipsRegMapLo(m_Opcode.rt), TempReg1);
}
else
{
MoveX86regToN64Mem(Map_TempReg(x86_Any, m_Opcode.rt, false), TempReg1);
}
}
}
} }
void CX86RecompilerOps::SWR() void CX86RecompilerOps::SWR()
@ -4234,14 +4043,11 @@ void CX86RecompilerOps::SWR()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4);
CompileReadTLBMiss(TempReg1, TempReg2); CompileReadTLBMiss(TempReg1, TempReg2);
}
OffsetReg = Map_TempReg(x86_Any, -1, false); OffsetReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, OffsetReg); MoveX86RegToX86Reg(TempReg1, OffsetReg);
@ -4249,15 +4055,7 @@ void CX86RecompilerOps::SWR()
AndConstToX86Reg(TempReg1, (uint32_t)~3); AndConstToX86Reg(TempReg1, (uint32_t)~3);
Value = Map_TempReg(x86_Any, -1, false); Value = Map_TempReg(x86_Any, -1, false);
if (g_System->bUseTlb())
{
MoveX86regPointerToX86reg(TempReg1, TempReg2, Value); MoveX86regPointerToX86reg(TempReg1, TempReg2, Value);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
MoveN64MemToX86reg(Value, TempReg1);
}
AndVariableDispToX86Reg((void *)R4300iOp::SWR_MASK, "R4300iOp::SWR_MASK", Value, OffsetReg, Multip_x4); AndVariableDispToX86Reg((void *)R4300iOp::SWR_MASK, "R4300iOp::SWR_MASK", Value, OffsetReg, Multip_x4);
if (!IsConst(m_Opcode.rt) || GetMipsRegLo(m_Opcode.rt) != 0) if (!IsConst(m_Opcode.rt) || GetMipsRegLo(m_Opcode.rt) != 0)
@ -4279,18 +4077,11 @@ void CX86RecompilerOps::SWR()
AddX86RegToX86Reg(Value, OffsetReg); AddX86RegToX86Reg(Value, OffsetReg);
} }
if (g_System->bUseTlb())
{
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_WriteMap, "MMU->TLB_WriteMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_WriteMap, "MMU->TLB_WriteMap", TempReg2, TempReg2, 4);
MoveX86regToX86regPointer(Value, TempReg1, TempReg2); MoveX86regToX86regPointer(Value, TempReg1, TempReg2);
}
else
{
MoveX86regToN64Mem(Value, TempReg1);
}
} }
void CX86RecompilerOps::SDL() void CX86RecompilerOps::SDL()
@ -4374,18 +4165,11 @@ void CX86RecompilerOps::LWC1()
PreReadInstruction(); PreReadInstruction();
x86Reg TempReg1; x86Reg TempReg1;
if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0) if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0)
{
if (g_System->bUseTlb())
{ {
ProtectGPR(m_Opcode.base); ProtectGPR(m_Opcode.base);
TempReg1 = GetMipsRegMapLo(m_Opcode.base); TempReg1 = GetMipsRegMapLo(m_Opcode.base);
} }
else else
{
TempReg1 = Map_TempReg(x86_Any, m_Opcode.base, false);
}
}
else
{ {
if (IsMapped(m_Opcode.base)) if (IsMapped(m_Opcode.base))
{ {
@ -4409,8 +4193,6 @@ void CX86RecompilerOps::LWC1()
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint32, "x86TestReadBreakpoint32"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint32, "x86TestReadBreakpoint32");
x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false), TempReg3; x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false), TempReg3;
if (g_System->bUseTlb())
{
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4);
@ -4418,13 +4200,6 @@ void CX86RecompilerOps::LWC1()
TempReg3 = Map_TempReg(x86_Any, -1, false); TempReg3 = Map_TempReg(x86_Any, -1, false);
MoveX86regPointerToX86reg(TempReg1, TempReg2, TempReg3); MoveX86regPointerToX86reg(TempReg1, TempReg2, TempReg3);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
TempReg3 = Map_TempReg(x86_Any, -1, false);
MoveN64MemToX86reg(TempReg3, TempReg1);
}
sprintf(Name, "_FPR_S[%d]", m_Opcode.ft); sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg2); MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg2);
MoveX86regToX86Pointer(TempReg3, TempReg2); MoveX86regToX86Pointer(TempReg3, TempReg2);
@ -4463,18 +4238,11 @@ void CX86RecompilerOps::LDC1()
} }
PreReadInstruction(); PreReadInstruction();
if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0) if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0)
{
if (g_System->bUseTlb())
{ {
ProtectGPR(m_Opcode.base); ProtectGPR(m_Opcode.base);
TempReg1 = GetMipsRegMapLo(m_Opcode.base); TempReg1 = GetMipsRegMapLo(m_Opcode.base);
} }
else else
{
TempReg1 = Map_TempReg(x86_Any, m_Opcode.base, false);
}
}
else
{ {
if (IsMapped(m_Opcode.base)) if (IsMapped(m_Opcode.base))
{ {
@ -4511,8 +4279,6 @@ void CX86RecompilerOps::LDC1()
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint64, "x86TestReadBreakpoint64"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint64, "x86TestReadBreakpoint64");
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
if (g_System->bUseTlb())
{
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg2, TempReg2, 4);
@ -4529,23 +4295,6 @@ void CX86RecompilerOps::LDC1()
sprintf(Name, "_FPR_S[%d]", m_Opcode.ft); sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], Name, TempReg2); MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], Name, TempReg2);
MoveX86regToX86Pointer(TempReg3, TempReg2); MoveX86regToX86Pointer(TempReg3, TempReg2);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
TempReg3 = Map_TempReg(x86_Any, -1, false);
MoveN64MemToX86reg(TempReg3, TempReg1);
sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], Name, TempReg2);
AddConstToX86Reg(TempReg2, 4);
MoveX86regToX86Pointer(TempReg3, TempReg2);
MoveN64MemDispToX86reg(TempReg3, TempReg1, 4);
sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
MoveVariableToX86reg(&_FPR_D[m_Opcode.ft], Name, TempReg2);
MoveX86regToX86Pointer(TempReg3, TempReg2);
}
} }
void CX86RecompilerOps::LD() void CX86RecompilerOps::LD()
@ -4580,18 +4329,11 @@ void CX86RecompilerOps::LD()
ProtectGPR(m_Opcode.rt); ProtectGPR(m_Opcode.rt);
} }
if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0) if (IsMapped(m_Opcode.base) && m_Opcode.offset == 0)
{
if (g_System->bUseTlb())
{ {
ProtectGPR(m_Opcode.base); ProtectGPR(m_Opcode.base);
TempReg1 = GetMipsRegMapLo(m_Opcode.base); TempReg1 = GetMipsRegMapLo(m_Opcode.base);
} }
else else
{
TempReg1 = Map_TempReg(x86_Any, m_Opcode.base, false);
}
}
else
{ {
if (IsMapped(m_Opcode.base)) if (IsMapped(m_Opcode.base))
{ {
@ -4613,8 +4355,6 @@ void CX86RecompilerOps::LD()
} }
} }
TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint64, "x86TestReadBreakpoint64"); TestReadBreakpoint(TempReg1, (void *)x86TestReadBreakpoint64, "x86TestReadBreakpoint64");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -4623,14 +4363,6 @@ void CX86RecompilerOps::LD()
Map_GPR_64bit(m_Opcode.rt, -1); Map_GPR_64bit(m_Opcode.rt, -1);
MoveX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapHi(m_Opcode.rt)); MoveX86regPointerToX86reg(TempReg1, TempReg2, GetMipsRegMapHi(m_Opcode.rt));
MoveX86regPointerToX86regDisp8(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt), 4); MoveX86regPointerToX86regDisp8(TempReg1, TempReg2, GetMipsRegMapLo(m_Opcode.rt), 4);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
Map_GPR_64bit(m_Opcode.rt, -1);
MoveN64MemToX86reg(GetMipsRegMapHi(m_Opcode.rt), TempReg1);
MoveN64MemDispToX86reg(GetMipsRegMapLo(m_Opcode.rt), TempReg1, 4);
}
if (g_System->bFastSP() && m_Opcode.rt == 29) if (g_System->bFastSP() && m_Opcode.rt == 29)
{ {
ResetX86Protection(); ResetX86Protection();
@ -4689,8 +4421,6 @@ void CX86RecompilerOps::SWC1()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
if (g_System->bUseTlb())
{
x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false); x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -4703,17 +4433,6 @@ void CX86RecompilerOps::SWC1()
MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg3); MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg3);
MoveX86PointerToX86reg(TempReg3, TempReg3); MoveX86PointerToX86reg(TempReg3, TempReg3);
MoveX86regToX86regPointer(TempReg3, TempReg1, TempReg2); MoveX86regToX86regPointer(TempReg3, TempReg1, TempReg2);
}
else
{
x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false);
UnMap_FPR(m_Opcode.ft, true);
sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg2);
MoveX86PointerToX86reg(TempReg2, TempReg2);
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
MoveX86regToN64Mem(TempReg2, TempReg1);
}
} }
void CX86RecompilerOps::SDC1() void CX86RecompilerOps::SDC1()
@ -4765,8 +4484,6 @@ void CX86RecompilerOps::SDC1()
AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate); AddConstToX86Reg(TempReg1, (int16_t)m_Opcode.immediate);
} }
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint64, "x86TestWriteBreakpoint64"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint64, "x86TestWriteBreakpoint64");
if (g_System->bUseTlb())
{
x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false); x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -4785,21 +4502,6 @@ void CX86RecompilerOps::SDC1()
MoveVariableToX86reg((uint8_t *)&_FPR_D[m_Opcode.ft], Name, TempReg3); MoveVariableToX86reg((uint8_t *)&_FPR_D[m_Opcode.ft], Name, TempReg3);
MoveX86PointerToX86reg(TempReg3, TempReg3); MoveX86PointerToX86reg(TempReg3, TempReg3);
MoveX86regToX86regPointer(TempReg3, TempReg1, TempReg2); MoveX86regToX86regPointer(TempReg3, TempReg1, TempReg2);
}
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
x86Reg TempReg3 = Map_TempReg(x86_Any, -1, false);
sprintf(Name, "_FPR_D[%d]", m_Opcode.ft);
MoveVariableToX86reg((uint8_t *)&_FPR_D[m_Opcode.ft], Name, TempReg3);
AddConstToX86Reg(TempReg3, 4);
MoveX86PointerToX86reg(TempReg3, TempReg3);
MoveX86regToN64Mem(TempReg3, TempReg1);
sprintf(Name, "_FPR_D[%d]", m_Opcode.ft);
MoveVariableToX86reg((uint8_t *)&_FPR_D[m_Opcode.ft], Name, TempReg3);
MoveX86PointerToX86reg(TempReg3, TempReg3);
MoveX86regToN64MemDisp(TempReg3, TempReg1, 4);
}
} }
void CX86RecompilerOps::SD() void CX86RecompilerOps::SD()
@ -4862,8 +4564,6 @@ void CX86RecompilerOps::SD()
Compile_StoreInstructClean(TempReg1, 8); Compile_StoreInstructClean(TempReg1, 8);
TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint64, "x86TestWriteBreakpoint64"); TestWriteBreakpoint(TempReg1, (void *)x86TestWriteBreakpoint64, "x86TestWriteBreakpoint64");
if (g_System->bUseTlb())
{
TempReg2 = Map_TempReg(x86_Any, -1, false); TempReg2 = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(TempReg1, TempReg2); MoveX86RegToX86Reg(TempReg1, TempReg2);
ShiftRightUnsignImmed(TempReg2, 12); ShiftRightUnsignImmed(TempReg2, 12);
@ -4904,49 +4604,6 @@ void CX86RecompilerOps::SD()
MoveX86regToX86regPointer(Map_TempReg(Reg, m_Opcode.rt, false), TempReg1, TempReg2); MoveX86regToX86regPointer(Map_TempReg(Reg, m_Opcode.rt, false), TempReg1, TempReg2);
} }
} }
else
{
AndConstToX86Reg(TempReg1, 0x1FFFFFFF);
if (IsConst(m_Opcode.rt))
{
if (Is64Bit(m_Opcode.rt))
{
MoveConstToN64Mem(GetMipsRegHi(m_Opcode.rt), TempReg1);
}
else if (IsSigned(m_Opcode.rt))
{
MoveConstToN64Mem((GetMipsRegLo_S(m_Opcode.rt) >> 31), TempReg1);
}
else
{
MoveConstToN64Mem(0, TempReg1);
}
MoveConstToN64MemDisp(GetMipsRegLo(m_Opcode.rt), TempReg1, 4);
}
else if (IsKnown(m_Opcode.rt) && IsMapped(m_Opcode.rt))
{
if (Is64Bit(m_Opcode.rt))
{
MoveX86regToN64Mem(GetMipsRegMapHi(m_Opcode.rt), TempReg1);
}
else if (IsSigned(m_Opcode.rt))
{
MoveX86regToN64Mem(Map_TempReg(x86_Any, m_Opcode.rt, true), TempReg1);
}
else
{
MoveConstToN64Mem(0, TempReg1);
}
MoveX86regToN64MemDisp(GetMipsRegMapLo(m_Opcode.rt), TempReg1, 4);
}
else
{
x86Reg Reg;
MoveX86regToN64Mem(Reg = Map_TempReg(x86_Any, m_Opcode.rt, true), TempReg1);
MoveX86regToN64MemDisp(Map_TempReg(Reg, m_Opcode.rt, false), TempReg1, 4);
}
}
}
} }
// R4300i opcodes: Special // R4300i opcodes: Special
@ -8070,7 +7727,6 @@ void CX86RecompilerOps::COP0_MT()
// COP0 CO functions // COP0 CO functions
void CX86RecompilerOps::COP0_CO_TLBR(void) void CX86RecompilerOps::COP0_CO_TLBR(void)
{ {
if (!g_System->bUseTlb()) { return; }
m_RegWorkingSet.BeforeCallDirect(); m_RegWorkingSet.BeforeCallDirect();
#ifdef _MSC_VER #ifdef _MSC_VER
MoveConstToX86reg((uint32_t)g_TLB, x86_ECX); MoveConstToX86reg((uint32_t)g_TLB, x86_ECX);
@ -8085,7 +7741,6 @@ void CX86RecompilerOps::COP0_CO_TLBR(void)
void CX86RecompilerOps::COP0_CO_TLBWI(void) void CX86RecompilerOps::COP0_CO_TLBWI(void)
{ {
if (!g_System->bUseTlb()) { return; }
m_RegWorkingSet.BeforeCallDirect(); m_RegWorkingSet.BeforeCallDirect();
PushImm32("false", 0); PushImm32("false", 0);
MoveVariableToX86reg(&g_Reg->INDEX_REGISTER, "INDEX_REGISTER", x86_ECX); MoveVariableToX86reg(&g_Reg->INDEX_REGISTER, "INDEX_REGISTER", x86_ECX);
@ -8104,8 +7759,6 @@ void CX86RecompilerOps::COP0_CO_TLBWI(void)
void CX86RecompilerOps::COP0_CO_TLBWR(void) void CX86RecompilerOps::COP0_CO_TLBWR(void)
{ {
if (!g_System->bUseTlb()) { return; }
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp()); m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp());
UpdateCounters(m_RegWorkingSet, false, true); UpdateCounters(m_RegWorkingSet, false, true);
m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp()); m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp());
@ -8136,7 +7789,6 @@ void CX86RecompilerOps::COP0_CO_TLBWR(void)
void CX86RecompilerOps::COP0_CO_TLBP(void) void CX86RecompilerOps::COP0_CO_TLBP(void)
{ {
if (!g_System->bUseTlb()) { return; }
m_RegWorkingSet.BeforeCallDirect(); m_RegWorkingSet.BeforeCallDirect();
#ifdef _MSC_VER #ifdef _MSC_VER
MoveConstToX86reg((uint32_t)g_TLB, x86_ECX); MoveConstToX86reg((uint32_t)g_TLB, x86_ECX);
@ -11825,19 +11477,11 @@ void CX86RecompilerOps::ResetMemoryStack()
} }
} }
if (g_System->bUseTlb())
{
TempReg = Map_TempReg(x86_Any, -1, false); TempReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(Reg, TempReg); MoveX86RegToX86Reg(Reg, TempReg);
ShiftRightUnsignImmed(TempReg, 12); ShiftRightUnsignImmed(TempReg, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg, TempReg, 4); MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg, TempReg, 4);
AddX86RegToX86Reg(Reg, TempReg); AddX86RegToX86Reg(Reg, TempReg);
}
else
{
AndConstToX86Reg(Reg, 0x1FFFFFFF);
AddConstToX86Reg(Reg, (uint32_t)g_MMU->Rdram());
}
MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack"); MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
} }

View File

@ -188,6 +188,7 @@
<ClInclude Include="N64System\Recompiler\FunctionMap.h" /> <ClInclude Include="N64System\Recompiler\FunctionMap.h" />
<ClInclude Include="N64System\Recompiler\JumpInfo.h" /> <ClInclude Include="N64System\Recompiler\JumpInfo.h" />
<ClInclude Include="N64System\Recompiler\LoopAnalysis.h" /> <ClInclude Include="N64System\Recompiler\LoopAnalysis.h" />
<ClInclude Include="N64System\Recompiler\Recompiler.h" />
<ClInclude Include="N64System\Recompiler\RecompilerCodeLog.h" /> <ClInclude Include="N64System\Recompiler\RecompilerCodeLog.h" />
<ClInclude Include="N64System\Recompiler\RecompilerMemory.h" /> <ClInclude Include="N64System\Recompiler\RecompilerMemory.h" />
<ClInclude Include="N64System\Recompiler\RecompilerOps.h" /> <ClInclude Include="N64System\Recompiler\RecompilerOps.h" />

View File

@ -689,6 +689,9 @@
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h"> <ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h">
<Filter>Header Files\N64 System\MemoryHandler</Filter> <Filter>Header Files\N64 System\MemoryHandler</Filter>
</ClInclude> </ClInclude>
<ClInclude Include="N64System\Recompiler\Recompiler.h">
<Filter>Header Files\N64 System\Recompiler</Filter>
</ClInclude>
</ItemGroup> </ItemGroup>
<ItemGroup> <ItemGroup>
<None Include="Version.h.in"> <None Include="Version.h.in">

View File

@ -129,7 +129,6 @@ void CSettings::AddHowToHandleSetting(const char * BaseDirectory)
AddHandler(Default_RDRamSize, new CSettingTypeApplication("Defaults", "RDRAM Size", 0x800000u)); AddHandler(Default_RDRamSize, new CSettingTypeApplication("Defaults", "RDRAM Size", 0x800000u));
AddHandler(Default_UseHleGfx, new CSettingTypeApplication("Defaults", "HLE GFX Default", true)); AddHandler(Default_UseHleGfx, new CSettingTypeApplication("Defaults", "HLE GFX Default", true));
AddHandler(Default_UseTlb, new CSettingTypeApplication("Defaults", "Use TLB", true));
AddHandler(Default_ViRefreshRate, new CSettingTypeApplication("Defaults", "ViRefresh", 1500u)); AddHandler(Default_ViRefreshRate, new CSettingTypeApplication("Defaults", "ViRefresh", 1500u));
AddHandler(Default_AiCountPerBytes, new CSettingTypeApplication("Defaults", "AiCountPerBytes", 0u)); AddHandler(Default_AiCountPerBytes, new CSettingTypeApplication("Defaults", "AiCountPerBytes", 0u));
AddHandler(Default_CounterFactor, new CSettingTypeApplication("Defaults", "Counter Factor", 2u)); AddHandler(Default_CounterFactor, new CSettingTypeApplication("Defaults", "Counter Factor", 2u));
@ -147,7 +146,6 @@ void CSettings::AddHowToHandleSetting(const char * BaseDirectory)
AddHandler(Rdb_CpuType, new CSettingTypeRDBCpuType("CPU Type", CPU_Recompiler)); AddHandler(Rdb_CpuType, new CSettingTypeRDBCpuType("CPU Type", CPU_Recompiler));
AddHandler(Rdb_RDRamSize, new CSettingTypeRDBRDRamSize("RDRAM Size", Default_RDRamSize)); AddHandler(Rdb_RDRamSize, new CSettingTypeRDBRDRamSize("RDRAM Size", Default_RDRamSize));
AddHandler(Rdb_CounterFactor, new CSettingTypeRomDatabase("Counter Factor", Default_CounterFactor)); AddHandler(Rdb_CounterFactor, new CSettingTypeRomDatabase("Counter Factor", Default_CounterFactor));
AddHandler(Rdb_UseTlb, new CSettingTypeRDBYesNo("Use TLB", Default_UseTlb));
AddHandler(Rdb_DelayDP, new CSettingTypeRDBYesNo("Delay DP", true)); AddHandler(Rdb_DelayDP, new CSettingTypeRDBYesNo("Delay DP", true));
AddHandler(Rdb_DelaySi, new CSettingTypeRDBYesNo("Delay SI", false)); AddHandler(Rdb_DelaySi, new CSettingTypeRDBYesNo("Delay SI", false));
AddHandler(Rdb_32Bit, new CSettingTypeRDBYesNo("32bit", Default_32Bit)); AddHandler(Rdb_32Bit, new CSettingTypeRDBYesNo("32bit", Default_32Bit));
@ -205,7 +203,6 @@ void CSettings::AddHowToHandleSetting(const char * BaseDirectory)
AddHandler(Game_FixedAudio, new CSettingTypeGame("Fixed Audio", Rdb_FixedAudio)); AddHandler(Game_FixedAudio, new CSettingTypeGame("Fixed Audio", Rdb_FixedAudio));
AddHandler(Game_RDRamSize, new CSettingTypeGame("RDRamSize", Rdb_RDRamSize)); AddHandler(Game_RDRamSize, new CSettingTypeGame("RDRamSize", Rdb_RDRamSize));
AddHandler(Game_CounterFactor, new CSettingTypeGame("Counter Factor", Rdb_CounterFactor)); AddHandler(Game_CounterFactor, new CSettingTypeGame("Counter Factor", Rdb_CounterFactor));
AddHandler(Game_UseTlb, new CSettingTypeGame("Use TLB", Rdb_UseTlb));
AddHandler(Game_DelayDP, new CSettingTypeGame("Delay DP", Rdb_DelayDP)); AddHandler(Game_DelayDP, new CSettingTypeGame("Delay DP", Rdb_DelayDP));
AddHandler(Game_DelaySI, new CSettingTypeGame("Delay SI", Rdb_DelaySi)); AddHandler(Game_DelaySI, new CSettingTypeGame("Delay SI", Rdb_DelaySi));
AddHandler(Game_RspAudioSignal, new CSettingTypeGame("Audio Signal", Rdb_RspAudioSignal)); AddHandler(Game_RspAudioSignal, new CSettingTypeGame("Audio Signal", Rdb_RspAudioSignal));

View File

@ -9,7 +9,6 @@ bool CGameSettings::m_bSMM_Protect;
bool CGameSettings::m_bSMM_ValidFunc; bool CGameSettings::m_bSMM_ValidFunc;
bool CGameSettings::m_bSMM_PIDMA; bool CGameSettings::m_bSMM_PIDMA;
bool CGameSettings::m_bSMM_TLB; bool CGameSettings::m_bSMM_TLB;
bool CGameSettings::m_bUseTlb;
uint32_t CGameSettings::m_CountPerOp = 2; uint32_t CGameSettings::m_CountPerOp = 2;
uint32_t CGameSettings::m_ViRefreshRate = 1500; uint32_t CGameSettings::m_ViRefreshRate = 1500;
uint32_t CGameSettings::m_AiCountPerBytes = 500; uint32_t CGameSettings::m_AiCountPerBytes = 500;
@ -65,7 +64,6 @@ void CGameSettings::RefreshGameSettings()
m_bSMM_ValidFunc = g_Settings->LoadBool(Game_SMM_ValidFunc); m_bSMM_ValidFunc = g_Settings->LoadBool(Game_SMM_ValidFunc);
m_bSMM_PIDMA = g_Settings->LoadBool(Game_SMM_PIDMA); m_bSMM_PIDMA = g_Settings->LoadBool(Game_SMM_PIDMA);
m_bSMM_TLB = g_Settings->LoadBool(Game_SMM_TLB); m_bSMM_TLB = g_Settings->LoadBool(Game_SMM_TLB);
m_bUseTlb = g_Settings->LoadBool(Game_UseTlb);
m_ViRefreshRate = g_Settings->LoadDword(Game_ViRefreshRate); m_ViRefreshRate = g_Settings->LoadDword(Game_ViRefreshRate);
m_AiCountPerBytes = g_Settings->LoadDword(Game_AiCountPerBytes); m_AiCountPerBytes = g_Settings->LoadDword(Game_AiCountPerBytes);
m_CountPerOp = g_Settings->LoadDword(Game_CounterFactor); m_CountPerOp = g_Settings->LoadDword(Game_CounterFactor);

View File

@ -16,7 +16,6 @@ public:
inline static bool bRegCaching(void) { return m_RegCaching; } inline static bool bRegCaching(void) { return m_RegCaching; }
inline static bool bLinkBlocks(void) { return m_bLinkBlocks && !CDebugSettings::HaveWriteBP() && !CDebugSettings::HaveReadBP(); } inline static bool bLinkBlocks(void) { return m_bLinkBlocks && !CDebugSettings::HaveWriteBP() && !CDebugSettings::HaveReadBP(); }
inline static FUNC_LOOKUP_METHOD LookUpMode(void) { return (FUNC_LOOKUP_METHOD)m_LookUpMode; } inline static FUNC_LOOKUP_METHOD LookUpMode(void) { return (FUNC_LOOKUP_METHOD)m_LookUpMode; }
inline static bool bUseTlb(void) { return m_bUseTlb; }
inline static uint32_t CountPerOp(void) { return m_CountPerOp; } inline static uint32_t CountPerOp(void) { return m_CountPerOp; }
inline static uint32_t ViRefreshRate(void) { return m_ViRefreshRate; } inline static uint32_t ViRefreshRate(void) { return m_ViRefreshRate; }
inline static uint32_t AiCountPerBytes(void) { return m_AiCountPerBytes; } inline static uint32_t AiCountPerBytes(void) { return m_AiCountPerBytes; }
@ -60,7 +59,6 @@ private:
static bool m_RegCaching; static bool m_RegCaching;
static bool m_bLinkBlocks; static bool m_bLinkBlocks;
static uint32_t m_LookUpMode; //FUNC_LOOKUP_METHOD static uint32_t m_LookUpMode; //FUNC_LOOKUP_METHOD
static bool m_bUseTlb;
static uint32_t m_CountPerOp; static uint32_t m_CountPerOp;
static uint32_t m_ViRefreshRate; static uint32_t m_ViRefreshRate;
static uint32_t m_AiCountPerBytes; static uint32_t m_AiCountPerBytes;

View File

@ -65,7 +65,6 @@ enum SettingID
// Default settings // Default settings
Default_RDRamSize, Default_RDRamSize,
Default_UseHleGfx, Default_UseHleGfx,
Default_UseTlb,
Default_ViRefreshRate, Default_ViRefreshRate,
Default_AiCountPerBytes, Default_AiCountPerBytes,
Default_CounterFactor, Default_CounterFactor,
@ -83,7 +82,6 @@ enum SettingID
Rdb_CpuType, Rdb_CpuType,
Rdb_RDRamSize, Rdb_RDRamSize,
Rdb_CounterFactor, Rdb_CounterFactor,
Rdb_UseTlb,
Rdb_DelayDP, Rdb_DelayDP,
Rdb_DelaySi, Rdb_DelaySi,
Rdb_32Bit, Rdb_32Bit,
@ -149,7 +147,6 @@ enum SettingID
Game_LastSaveTime, Game_LastSaveTime,
Game_RDRamSize, Game_RDRamSize,
Game_CounterFactor, Game_CounterFactor,
Game_UseTlb,
Game_DelayDP, Game_DelayDP,
Game_DelaySI, Game_DelaySI,
Game_FastSP, Game_FastSP,

View File

@ -1 +0,0 @@
#include "../stdafx.h"

View File

@ -11,7 +11,6 @@ CDefaultsOptionsPage::CDefaultsOptionsPage(HWND hParent, const RECT & rcDispay)
SetDlgItemText(IDC_MEMORY_SIZE_TEXT, wGS(ROM_MEM_SIZE).c_str()); SetDlgItemText(IDC_MEMORY_SIZE_TEXT, wGS(ROM_MEM_SIZE).c_str());
SetDlgItemText(IDC_HLE_GFX, wGS(PLUG_HLE_GFX).c_str()); SetDlgItemText(IDC_HLE_GFX, wGS(PLUG_HLE_GFX).c_str());
SetDlgItemText(IDC_USE_TLB, wGS(ROM_USE_TLB).c_str());
SetDlgItemText(IDC_VIREFESH_TEXT, wGS(ROM_VIREFRESH).c_str()); SetDlgItemText(IDC_VIREFESH_TEXT, wGS(ROM_VIREFRESH).c_str());
SetDlgItemText(IDC_COUNTPERBYTE_TEXT, wGS(ROM_COUNTPERBYTE).c_str()); SetDlgItemText(IDC_COUNTPERBYTE_TEXT, wGS(ROM_COUNTPERBYTE).c_str());
SetDlgItemText(IDC_COUNTFACT_TEXT, wGS(ROM_COUNTER_FACTOR).c_str()); SetDlgItemText(IDC_COUNTFACT_TEXT, wGS(ROM_COUNTER_FACTOR).c_str());
@ -50,7 +49,6 @@ CDefaultsOptionsPage::CDefaultsOptionsPage(HWND hParent, const RECT & rcDispay)
TxtBox->SetTextField(GetDlgItem(IDC_COUNTPERBYTE_TEXT)); TxtBox->SetTextField(GetDlgItem(IDC_COUNTPERBYTE_TEXT));
AddModCheckBox(GetDlgItem(IDC_HLE_GFX), Default_UseHleGfx); AddModCheckBox(GetDlgItem(IDC_HLE_GFX), Default_UseHleGfx);
AddModCheckBox(GetDlgItem(IDC_USE_TLB), Default_UseTlb);
AddModCheckBox(GetDlgItem(IDC_ROM_32BIT), Default_32Bit); AddModCheckBox(GetDlgItem(IDC_ROM_32BIT), Default_32Bit);
AddModCheckBox(GetDlgItem(IDC_SYNC_AUDIO), Default_SyncViaAudio); AddModCheckBox(GetDlgItem(IDC_SYNC_AUDIO), Default_SyncViaAudio);
AddModCheckBox(GetDlgItem(IDC_ROM_FIXEDAUDIO), Default_FixedAudio); AddModCheckBox(GetDlgItem(IDC_ROM_FIXEDAUDIO), Default_FixedAudio);

View File

@ -6,7 +6,6 @@ class CDefaultsOptionsPage :
{ {
BEGIN_MSG_MAP_EX(CDefaultsOptionsPage) BEGIN_MSG_MAP_EX(CDefaultsOptionsPage)
COMMAND_ID_HANDLER_EX(IDC_HLE_GFX, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_HLE_GFX, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_USE_TLB, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_ROM_32BIT, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_ROM_32BIT, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_SYNC_AUDIO, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_SYNC_AUDIO, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_ROM_FIXEDAUDIO, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_ROM_FIXEDAUDIO, CheckBoxChanged)

View File

@ -24,7 +24,6 @@ CGameGeneralPage::CGameGeneralPage(HWND hParent, const RECT & rcDispay)
SetDlgItemText(IDC_ROM_FIXEDAUDIO, wGS(ROM_FIXED_AUDIO).c_str()); SetDlgItemText(IDC_ROM_FIXEDAUDIO, wGS(ROM_FIXED_AUDIO).c_str());
SetDlgItemText(IDC_DELAY_DP, wGS(ROM_DELAY_DP).c_str()); SetDlgItemText(IDC_DELAY_DP, wGS(ROM_DELAY_DP).c_str());
SetDlgItemText(IDC_SYNC_AUDIO, wGS(ROM_SYNC_AUDIO).c_str()); SetDlgItemText(IDC_SYNC_AUDIO, wGS(ROM_SYNC_AUDIO).c_str());
SetDlgItemText(IDC_USE_TLB, wGS(ROM_USE_TLB).c_str());
SetDlgItemText(IDC_DELAY_SI, wGS(ROM_DELAY_SI).c_str()); SetDlgItemText(IDC_DELAY_SI, wGS(ROM_DELAY_SI).c_str());
SetDlgItemText(IDC_AUDIO_SIGNAL, wGS(ROM_AUDIO_SIGNAL).c_str()); SetDlgItemText(IDC_AUDIO_SIGNAL, wGS(ROM_AUDIO_SIGNAL).c_str());
SetDlgItemText(IDC_UNALIGNED_DMA, wGS(ROM_UNALIGNED_DMA).c_str()); SetDlgItemText(IDC_UNALIGNED_DMA, wGS(ROM_UNALIGNED_DMA).c_str());
@ -33,7 +32,6 @@ CGameGeneralPage::CGameGeneralPage(HWND hParent, const RECT & rcDispay)
AddModCheckBox(GetDlgItem(IDC_ROM_32BIT), Game_32Bit); AddModCheckBox(GetDlgItem(IDC_ROM_32BIT), Game_32Bit);
AddModCheckBox(GetDlgItem(IDC_SYNC_AUDIO), Game_SyncViaAudio); AddModCheckBox(GetDlgItem(IDC_SYNC_AUDIO), Game_SyncViaAudio);
AddModCheckBox(GetDlgItem(IDC_ROM_FIXEDAUDIO), Game_FixedAudio); AddModCheckBox(GetDlgItem(IDC_ROM_FIXEDAUDIO), Game_FixedAudio);
AddModCheckBox(GetDlgItem(IDC_USE_TLB), Game_UseTlb);
AddModCheckBox(GetDlgItem(IDC_DELAY_DP), Game_DelayDP); AddModCheckBox(GetDlgItem(IDC_DELAY_DP), Game_DelayDP);
AddModCheckBox(GetDlgItem(IDC_DELAY_SI), Game_DelaySI); AddModCheckBox(GetDlgItem(IDC_DELAY_SI), Game_DelaySI);
AddModCheckBox(GetDlgItem(IDC_AUDIO_SIGNAL), Game_RspAudioSignal); AddModCheckBox(GetDlgItem(IDC_AUDIO_SIGNAL), Game_RspAudioSignal);

View File

@ -14,7 +14,6 @@ class CGameGeneralPage :
COMMAND_ID_HANDLER_EX(IDC_ROM_32BIT, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_ROM_32BIT, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_SYNC_AUDIO, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_SYNC_AUDIO, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_ROM_FIXEDAUDIO, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_ROM_FIXEDAUDIO, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_USE_TLB, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_DELAY_DP, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_DELAY_DP, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_DELAY_SI, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_DELAY_SI, CheckBoxChanged)
COMMAND_ID_HANDLER_EX(IDC_AUDIO_SIGNAL, CheckBoxChanged) COMMAND_ID_HANDLER_EX(IDC_AUDIO_SIGNAL, CheckBoxChanged)

View File

@ -222,15 +222,14 @@ BEGIN
EDITTEXT IDC_OVER_CLOCK_MODIFIER,102,101,109,12,ES_AUTOHSCROLL | ES_NUMBER EDITTEXT IDC_OVER_CLOCK_MODIFIER,102,101,109,12,ES_AUTOHSCROLL | ES_NUMBER
CONTROL "",IDC_STATIC,"Static",SS_BLACKFRAME | SS_SUNKEN,3,116,208,1 CONTROL "",IDC_STATIC,"Static",SS_BLACKFRAME | SS_SUNKEN,3,116,208,1
CONTROL "32 Bit Engine",IDC_ROM_32BIT,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,121,91,10 CONTROL "32 Bit Engine",IDC_ROM_32BIT,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,121,91,10
CONTROL "Use TLB",IDC_USE_TLB,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,121,91,10 CONTROL "Sync using Audio",IDC_SYNC_AUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,121,91,10
CONTROL "Fixed Audio Timing",IDC_ROM_FIXEDAUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,132,91,10 CONTROL "Fixed Audio Timing",IDC_ROM_FIXEDAUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,132,91,10
CONTROL "Sync using Audio",IDC_SYNC_AUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,132,91,10 CONTROL "Delay SI Interrupt",IDC_DELAY_SI,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,132,91,10
CONTROL "Delay DP Interrupt",IDC_DELAY_DP,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,143,91,10 CONTROL "Delay DP Interrupt",IDC_DELAY_DP,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,143,91,10
CONTROL "Delay SI Interrupt",IDC_DELAY_SI,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,143,91,10
CONTROL "RSP Audio Signal",IDC_AUDIO_SIGNAL,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,154,91,10
CONTROL "Randomize SI/PI interrupts",IDC_RANDOMIZE_SIPI_INTERRUPTS, CONTROL "Randomize SI/PI interrupts",IDC_RANDOMIZE_SIPI_INTERRUPTS,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,154,107,10 "Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,143,107,10
CONTROL "Unaligned DMA",IDC_UNALIGNED_DMA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,165,91,10 CONTROL "RSP Audio Signal",IDC_AUDIO_SIGNAL,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,154,91,10
CONTROL "Unaligned DMA",IDC_UNALIGNED_DMA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,154,91,10
END END
IDD_Settings_Accelerator DIALOGEX 0, 0, 218, 183 IDD_Settings_Accelerator DIALOGEX 0, 0, 218, 183
@ -1234,23 +1233,22 @@ FONT 8, "MS Shell Dlg", 0, 0, 0x1
BEGIN BEGIN
LTEXT "Memory Size:",IDC_MEMORY_SIZE_TEXT,6,8,91,10 LTEXT "Memory Size:",IDC_MEMORY_SIZE_TEXT,6,8,91,10
COMBOBOX IDC_RDRAM_SIZE,102,6,109,49,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP COMBOBOX IDC_RDRAM_SIZE,102,6,109,49,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
CONTROL "Use High Level GFX",IDC_HLE_GFX,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,93,91,10 LTEXT "Counter Factor:",IDC_COUNTFACT_TEXT,6,22,91,10
CONTROL "Use TLB",IDC_USE_TLB,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,69,91,10 COMBOBOX IDC_COUNTFACT,102,21,109,49,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
LTEXT "Vi Refresh Rate:",IDC_VIREFESH_TEXT,6,38,91,10 LTEXT "Vi Refresh Rate:",IDC_VIREFESH_TEXT,6,38,91,10
EDITTEXT IDC_VIREFRESH,102,36,109,12,ES_AUTOHSCROLL | ES_NUMBER EDITTEXT IDC_VIREFRESH,102,36,109,12,ES_AUTOHSCROLL | ES_NUMBER
LTEXT "AI Count Per Byte:",IDC_COUNTPERBYTE_TEXT,6,52,91,10 LTEXT "AI Count Per Byte:",IDC_COUNTPERBYTE_TEXT,6,52,91,10
EDITTEXT IDC_COUNTPERBYTE,102,51,109,12,ES_AUTOHSCROLL | ES_NUMBER EDITTEXT IDC_COUNTPERBYTE,102,51,109,12,ES_AUTOHSCROLL | ES_NUMBER
LTEXT "Counter Factor:",IDC_COUNTFACT_TEXT,6,22,91,10 LTEXT "Disk Seek Timing:",IDC_DISKSEEKTIMING_TEXT1,6,67,91,10
COMBOBOX IDC_COUNTFACT,102,21,109,49,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP COMBOBOX IDC_DISKSEEKTIMING,102,65,109,49,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
CONTROL "32 Bit Engine",IDC_ROM_32BIT,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,69,91,10 CONTROL "32 Bit Engine",IDC_ROM_32BIT,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,80,91,10
CONTROL "Fixed Audio Timing",IDC_ROM_FIXEDAUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,81,91,10 CONTROL "Sync using Audio",IDC_SYNC_AUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,80,91,10
CONTROL "Sync using Audio",IDC_SYNC_AUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,81,91,10 CONTROL "Fixed Audio Timing",IDC_ROM_FIXEDAUDIO,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,92,91,10
CONTROL "Randomize SI/PI interrupts",IDC_RANDOMIZE_SIPI_INTERRUPTS, CONTROL "Randomize SI/PI interrupts",IDC_RANDOMIZE_SIPI_INTERRUPTS,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,93,107,10 "Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,92,107,10
CONTROL "Unaligned DMA",IDC_UNALIGNED_DMA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,105,91,10 CONTROL "Use High Level GFX",IDC_HLE_GFX,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,104,91,10
CONTROL "Protect Memory",IDC_PROTECT_MEMORY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,105,91,10 CONTROL "Protect Memory",IDC_PROTECT_MEMORY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,102,104,91,10
COMBOBOX IDC_DISKSEEKTIMING,102,121,109,49,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP CONTROL "Unaligned DMA",IDC_UNALIGNED_DMA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,6,116,91,10
LTEXT "Disk Seek Timing:",IDC_DISKSEEKTIMING_TEXT1,6,123,91,10
END END
IDD_Enhancement_Config DIALOGEX 0, 0, 206, 214 IDD_Enhancement_Config DIALOGEX 0, 0, 206, 214

View File

@ -344,7 +344,6 @@
#define IDC_MEMORY_SIZE_TEXT 1153 #define IDC_MEMORY_SIZE_TEXT 1153
#define IDC_SAVE_TYPE_TEXT 1154 #define IDC_SAVE_TYPE_TEXT 1154
#define IDC_SYNC_AUDIO 1156 #define IDC_SYNC_AUDIO 1156
#define IDC_USE_TLB 1157
#define IDC_UNALIGNED_DMA 1158 #define IDC_UNALIGNED_DMA 1158
#define IDC_RANDOMIZE_SIPI_INTERRUPTS 1159 #define IDC_RANDOMIZE_SIPI_INTERRUPTS 1159
#define IDC_PROTECT_MEMORY 1160 #define IDC_PROTECT_MEMORY 1160