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Core: remove Write32SerialInterface

This commit is contained in:
zilmar 2022-03-21 15:22:42 +10:30
parent e1d3222a8a
commit 2b646677ac
2 changed files with 1 additions and 28 deletions
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28
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -770,7 +770,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
case 0x04500000: m_AudioInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
case 0x04600000: m_PeripheralInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
case 0x04700000: m_RDRAMInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
case 0x04800000: Write32SerialInterface(); break;
case 0x04800000: m_SerialInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
case 0x05000000: Write32CartridgeDomain2Address1(); break;
case 0x08000000: Write32CartridgeDomain2Address2(); break;
case 0x1FC00000: Write32PifRam(); break;
@ -1232,32 +1232,6 @@ void CMipsMemoryVM::Load32Rom(void)
}
}
void CMipsMemoryVM::Write32SerialInterface(void)
{
switch (m_MemLookupAddress & 0xFFFFFFF)
{
case 0x04800000: g_Reg->SI_DRAM_ADDR_REG = m_MemLookupValue.UW[0]; break;
case 0x04800004:
g_Reg->SI_PIF_ADDR_RD64B_REG = m_MemLookupValue.UW[0];
g_MMU->SI_DMA_READ();
break;
case 0x04800010:
g_Reg->SI_PIF_ADDR_WR64B_REG = m_MemLookupValue.UW[0];
g_MMU->SI_DMA_WRITE();
break;
case 0x04800018:
g_Reg->MI_INTR_REG &= ~MI_INTR_SI;
g_Reg->SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
g_Reg->CheckInterrupts();
break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CMipsMemoryVM::Write32CartridgeDomain2Address1(void)
{
// 64DD registers

1
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -147,7 +147,6 @@ private:
static void Load32PifRam(void);
static void Load32Rom(void);
static void Write32SerialInterface(void);
static void Write32CartridgeDomain2Address1(void);
static void Write32CartridgeDomain2Address2(void);
static void Write32PifRam(void);