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RSP: add an exit to RSP when read from MF status multiple times

This commit is contained in:
zilmar 2013-01-16 06:03:11 +11:00
parent 3933cdef08
commit 008f02919c
3 changed files with 17 additions and 4 deletions
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3
Source/RSP/Cpu.c
View File

@ -41,7 +41,7 @@
UDWORD EleSpec[32], Indx[32]; UDWORD EleSpec[32], Indx[32];
OPCODE RSPOpC; OPCODE RSPOpC;
DWORD *PrgCount, NextInstruction, RSP_Running; DWORD *PrgCount, NextInstruction, RSP_Running, RSP_MfStatusCount;
void * RSP_Opcode[64]; void * RSP_Opcode[64];
void * RSP_RegImm[32]; void * RSP_RegImm[32];
@ -244,6 +244,7 @@ __declspec(dllexport) DWORD DoRspCycles ( DWORD Cycles ) {
{ {
Enter_RSP_Commands_Window(); Enter_RSP_Commands_Window();
} }
RSP_MfStatusCount = 0;
switch (CPUCore) { switch (CPUCore) {
case RecompilerCPU: case RecompilerCPU:

2
Source/RSP/Interpreter CPU.h
View File

@ -28,7 +28,7 @@
#define DELAY_SLOT 1 #define DELAY_SLOT 1
#define JUMP 2 #define JUMP 2
extern DWORD RSP_NextInstruction, RSP_JumpTo; extern DWORD RSP_NextInstruction, RSP_JumpTo, RSP_MfStatusCount;
void BuildInterpreterCPU(void); void BuildInterpreterCPU(void);
DWORD RunInterpreterCPU(DWORD Cycles); DWORD RunInterpreterCPU(DWORD Cycles);

16
Source/RSP/Interpreter Ops.c
View File

@ -378,7 +378,14 @@ void RSP_Cop0_MF (void) {
switch (RSPOpC.rd) { switch (RSPOpC.rd) {
case 0: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_MEM_ADDR_REG; break; case 0: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_MEM_ADDR_REG; break;
case 1: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DRAM_ADDR_REG; break; case 1: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DRAM_ADDR_REG; break;
case 4: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_STATUS_REG; break; case 4:
RSP_MfStatusCount += 1;
RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_STATUS_REG;
if (RSP_MfStatusCount > 10)
{
RSP_Running = FALSE;
}
break;
case 5: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_FULL_REG; break; case 5: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_FULL_REG; break;
case 6: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_BUSY_REG; break; case 6: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_BUSY_REG; break;
case 7: case 7:
@ -417,7 +424,12 @@ void RSP_Cop0_MT (void) {
if ( ( RSP_GPR[RSPOpC.rt].W & SP_SET_HALT ) != 0) { *RSPInfo.SP_STATUS_REG |= SP_STATUS_HALT; } if ( ( RSP_GPR[RSPOpC.rt].W & SP_SET_HALT ) != 0) { *RSPInfo.SP_STATUS_REG |= SP_STATUS_HALT; }
if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_BROKE ) != 0) { *RSPInfo.SP_STATUS_REG &= ~SP_STATUS_BROKE; } if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_BROKE ) != 0) { *RSPInfo.SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_INTR ) != 0) { *RSPInfo.MI_INTR_REG &= ~R4300i_SP_Intr; } if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_INTR ) != 0) { *RSPInfo.MI_INTR_REG &= ~R4300i_SP_Intr; }
if ( ( RSP_GPR[RSPOpC.rt].W & SP_SET_INTR ) != 0) { DisplayError("SP_SET_INTR"); } if ( ( RSP_GPR[RSPOpC.rt].W & SP_SET_INTR ) != 0)
{
*RSPInfo.MI_INTR_REG |= R4300i_SP_Intr;
RSPInfo.CheckInterrupts();
RSP_Running = FALSE;
}
if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_SSTEP ) != 0) { *RSPInfo.SP_STATUS_REG &= ~SP_STATUS_SSTEP; } if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_SSTEP ) != 0) { *RSPInfo.SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ( ( RSP_GPR[RSPOpC.rt].W & SP_SET_SSTEP ) != 0) { *RSPInfo.SP_STATUS_REG |= SP_STATUS_SSTEP; } if ( ( RSP_GPR[RSPOpC.rt].W & SP_SET_SSTEP ) != 0) { *RSPInfo.SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_INTR_BREAK ) != 0) { *RSPInfo.SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; } if ( ( RSP_GPR[RSPOpC.rt].W & SP_CLR_INTR_BREAK ) != 0) { *RSPInfo.SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }