2016-08-11 11:09:21 +00:00
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/****************************************************************************
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* *
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* Project64 - A Nintendo 64 emulator. *
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* http://www.pj64-emu.com/ *
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* Copyright (C) 2012 Project64. All rights reserved. *
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* *
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* License: *
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* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
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* *
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****************************************************************************/
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#include "stdafx.h"
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#if defined(__arm__) || defined(_M_ARM)
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2016-09-30 13:33:07 +00:00
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#include <Project64-core/N64System/SystemGlobals.h>
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#include <Project64-core/N64System/N64Class.h>
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2016-09-29 12:20:06 +00:00
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#include <Project64-core/N64System/Recompiler/RecompilerCodeLog.h>
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2016-08-11 11:09:21 +00:00
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#include <Project64-core/N64System/Recompiler/Arm/ArmRegInfo.h>
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2016-09-29 12:17:54 +00:00
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CArmRegInfo::CArmRegInfo() :
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m_InCallDirect(false)
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2016-08-11 11:09:21 +00:00
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{
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2016-09-30 13:33:07 +00:00
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for (int32_t i = 0, n = sizeof(m_ArmReg_MappedTo) / sizeof(m_ArmReg_MappedTo[0]); i < n; i++)
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{
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2016-09-30 19:58:04 +00:00
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m_ArmReg_MapOrder[i] = 0;
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2016-09-30 13:33:07 +00:00
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m_ArmReg_Protected[i] = false;
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m_ArmReg_MappedTo[i] = NotMapped;
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m_Variable_MappedTo[i] = VARIABLE_UNKNOWN;
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}
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2016-08-11 11:09:21 +00:00
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}
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CArmRegInfo::CArmRegInfo(const CArmRegInfo& rhs)
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{
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*this = rhs;
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}
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CArmRegInfo::~CArmRegInfo()
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{
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}
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CArmRegInfo& CArmRegInfo::operator=(const CArmRegInfo& right)
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{
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CRegBase::operator=(right);
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2016-09-29 12:17:54 +00:00
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m_InCallDirect = right.m_InCallDirect;
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2016-09-30 19:58:04 +00:00
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memcpy(&m_ArmReg_MapOrder, &right.m_ArmReg_MapOrder, sizeof(m_ArmReg_MapOrder));
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2016-09-30 13:33:07 +00:00
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memcpy(&m_ArmReg_Protected, &right.m_ArmReg_Protected, sizeof(m_ArmReg_Protected));
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memcpy(&m_ArmReg_MappedTo, &right.m_ArmReg_MappedTo, sizeof(m_ArmReg_MappedTo));
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memcpy(&m_Variable_MappedTo, &right.m_Variable_MappedTo, sizeof(m_Variable_MappedTo));
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2016-08-11 11:09:21 +00:00
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#ifdef _DEBUG
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if (*this != right)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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#endif
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return *this;
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}
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void CArmRegInfo::BeforeCallDirect(void)
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{
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2016-09-29 12:17:54 +00:00
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if (m_InCallDirect)
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{
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2016-09-30 13:33:07 +00:00
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CPU_Message("%s: in CallDirect", __FUNCTION__);
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2016-09-29 12:17:54 +00:00
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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m_InCallDirect = true;
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2016-08-11 11:09:21 +00:00
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}
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void CArmRegInfo::AfterCallDirect(void)
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{
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2016-09-29 12:17:54 +00:00
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if (!m_InCallDirect)
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{
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2016-09-30 13:33:07 +00:00
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CPU_Message("%s: Not in CallDirect", __FUNCTION__);
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2016-09-29 12:17:54 +00:00
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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m_InCallDirect = false;
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2016-08-11 11:09:21 +00:00
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}
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2016-09-30 13:33:07 +00:00
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CArmOps::ArmReg CArmRegInfo::FreeArmReg()
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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if ((GetArmRegMapped(Arm_R7) == NotMapped || GetArmRegMapped(Arm_R7) == Temp_Mapped) && !GetArmRegProtected(Arm_R7)) { return Arm_R7; }
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if ((GetArmRegMapped(Arm_R6) == NotMapped || GetArmRegMapped(Arm_R6) == Temp_Mapped) && !GetArmRegProtected(Arm_R6)) { return Arm_R6; }
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if ((GetArmRegMapped(Arm_R5) == NotMapped || GetArmRegMapped(Arm_R5) == Temp_Mapped) && !GetArmRegProtected(Arm_R5)) { return Arm_R5; }
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if ((GetArmRegMapped(Arm_R4) == NotMapped || GetArmRegMapped(Arm_R4) == Temp_Mapped) && !GetArmRegProtected(Arm_R4)) { return Arm_R4; }
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if ((GetArmRegMapped(Arm_R3) == NotMapped || GetArmRegMapped(Arm_R3) == Temp_Mapped) && !GetArmRegProtected(Arm_R3)) { return Arm_R3; }
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if ((GetArmRegMapped(Arm_R2) == NotMapped || GetArmRegMapped(Arm_R2) == Temp_Mapped) && !GetArmRegProtected(Arm_R2)) { return Arm_R2; }
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if ((GetArmRegMapped(Arm_R1) == NotMapped || GetArmRegMapped(Arm_R1) == Temp_Mapped) && !GetArmRegProtected(Arm_R1)) { return Arm_R1; }
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if ((GetArmRegMapped(Arm_R0) == NotMapped || GetArmRegMapped(Arm_R0) == Temp_Mapped) && !GetArmRegProtected(Arm_R0)) { return Arm_R0; }
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if ((GetArmRegMapped(Arm_R12) == NotMapped || GetArmRegMapped(Arm_R12) == Temp_Mapped) && !GetArmRegProtected(Arm_R12)) { return Arm_R12; }
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if ((GetArmRegMapped(Arm_R11) == NotMapped || GetArmRegMapped(Arm_R11) == Temp_Mapped) && !GetArmRegProtected(Arm_R11)) { return Arm_R11; }
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if ((GetArmRegMapped(Arm_R10) == NotMapped || GetArmRegMapped(Arm_R10) == Temp_Mapped) && !GetArmRegProtected(Arm_R10)) { return Arm_R10; }
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if ((GetArmRegMapped(Arm_R9) == NotMapped || GetArmRegMapped(Arm_R9) == Temp_Mapped) && !GetArmRegProtected(Arm_R9)) { return Arm_R9; }
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if ((GetArmRegMapped(Arm_R8) == NotMapped || GetArmRegMapped(Arm_R8) == Temp_Mapped) && !GetArmRegProtected(Arm_R8)) { return Arm_R8; }
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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2016-08-11 11:09:21 +00:00
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void CArmRegInfo::WriteBackRegisters()
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{
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}
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2016-09-30 13:33:07 +00:00
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2016-09-30 19:58:04 +00:00
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CArmOps::ArmReg CArmRegInfo::Map_TempReg(ArmReg Reg, int32_t MipsReg, bool LoadHiWord)
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect",__FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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ArmReg GprReg = MipsReg >= 0 ? Map_Variable(VARIABLE_GPR) : Arm_Unknown;
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if (Reg == CArmOps::Arm_Any)
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{
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if (GetArmRegMapped(Arm_R7) == Temp_Mapped && !GetArmRegProtected(Arm_R7)) { Reg = Arm_R7; }
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else if (GetArmRegMapped(Arm_R6) == Temp_Mapped && !GetArmRegProtected(Arm_R6)) { Reg = Arm_R6; }
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else if (GetArmRegMapped(Arm_R5) == Temp_Mapped && !GetArmRegProtected(Arm_R5)) { Reg = Arm_R5; }
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else if (GetArmRegMapped(Arm_R4) == Temp_Mapped && !GetArmRegProtected(Arm_R4)) { Reg = Arm_R4; }
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else if (GetArmRegMapped(Arm_R3) == Temp_Mapped && !GetArmRegProtected(Arm_R3)) { Reg = Arm_R3; }
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else if (GetArmRegMapped(Arm_R2) == Temp_Mapped && !GetArmRegProtected(Arm_R2)) { Reg = Arm_R2; }
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else if (GetArmRegMapped(Arm_R1) == Temp_Mapped && !GetArmRegProtected(Arm_R1)) { Reg = Arm_R1; }
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else if (GetArmRegMapped(Arm_R0) == Temp_Mapped && !GetArmRegProtected(Arm_R0)) { Reg = Arm_R0; }
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else if (GetArmRegMapped(Arm_R12) == Temp_Mapped && !GetArmRegProtected(Arm_R12)) { Reg = Arm_R12; }
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else if (GetArmRegMapped(Arm_R11) == Temp_Mapped && !GetArmRegProtected(Arm_R11)) { Reg = Arm_R11; }
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else if (GetArmRegMapped(Arm_R10) == Temp_Mapped && !GetArmRegProtected(Arm_R10)) { Reg = Arm_R10; }
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else if (GetArmRegMapped(Arm_R9) == Temp_Mapped && !GetArmRegProtected(Arm_R9)) { Reg = Arm_R9; }
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else if (GetArmRegMapped(Arm_R8) == Temp_Mapped && !GetArmRegProtected(Arm_R8)) { Reg = Arm_R8; }
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if (Reg == Arm_Any)
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{
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Reg = FreeArmReg();
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if (Reg == Arm_Unknown)
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{
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WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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}
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}
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else if (GetArmRegMapped(Reg) == NotMapped || GetArmRegMapped(Reg) == Temp_Mapped)
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{
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if (GetArmRegProtected(Reg))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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else if (GetArmRegMapped(Reg) == GPR_Mapped)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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else
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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if (MipsReg < 0)
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{
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CPU_Message(" regcache: allocate %s as temp storage", ArmRegName(Reg));
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}
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else
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{
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CPU_Message(" regcache: allocate %s as temp storage (%s)", ArmRegName(Reg), LoadHiWord ? CRegName::GPR_Hi[MipsReg] : CRegName::GPR_Lo[MipsReg]);
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if (GprReg == Arm_Unknown)
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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if (LoadHiWord)
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{
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if (IsUnknown(MipsReg))
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{
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LoadArmRegPointerToArmReg(Reg, GprReg, (uint8_t)(MipsReg << 3) + 4);
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}
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else if (IsMapped(MipsReg))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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else
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{
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if (Is64Bit(MipsReg))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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//MoveConstToArmReg(Reg, GetMipsRegHi(MipsReg));
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}
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else
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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//MoveConstToArmReg(Reg, GetMipsRegLo_S(MipsReg) >> 31);
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}
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}
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}
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else
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{
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if (IsUnknown(MipsReg))
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{
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LoadArmRegPointerToArmReg(Reg, GprReg, (uint8_t)(MipsReg << 3));
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}
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else if (IsMapped(MipsReg))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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//MoveArmRegToArmReg(GetMipsRegMapLo(MipsReg), Reg);
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}
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else
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{
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2016-09-30 20:36:49 +00:00
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MoveConstToArmReg(Reg, GetMipsRegLo(MipsReg));
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2016-09-30 19:58:04 +00:00
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}
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}
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}
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SetArmRegMapped(Reg, Temp_Mapped);
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SetArmRegProtected(Reg, true);
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for (int32_t i = 0, n = sizeof(m_ArmReg_MappedTo) / sizeof(m_ArmReg_MappedTo[0]); i < n; i++)
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{
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int32_t MapOrder = GetArmRegMapOrder((ArmReg)i);
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if (MapOrder > 0)
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{
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SetArmRegMapOrder((ArmReg)i, MapOrder + 1);
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}
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}
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SetArmRegMapOrder(Reg, 1);
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SetArmRegProtected(GprReg, false);
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return Reg;
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}
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2016-09-30 13:33:07 +00:00
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CArmOps::ArmReg CArmRegInfo::Map_Variable(VARIABLE_MAPPED variable)
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{
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if (m_InCallDirect)
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{
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CPU_Message("%s: in CallDirect", __FUNCTION__);
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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for (int32_t i = 0, n = sizeof(m_ArmReg_MappedTo) / sizeof(m_ArmReg_MappedTo[0]); i < n; i++)
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{
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if (m_ArmReg_MappedTo[i] == Variable_Mapped && m_Variable_MappedTo[i] == variable)
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{
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SetArmRegProtected((ArmReg)i, true);
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return (ArmReg)i;
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}
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}
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ArmReg Reg = FreeArmReg();
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if (Reg == Arm_Unknown)
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{
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WriteTrace(TraceRegisterCache, TraceError, "Failed to find a free register");
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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SetArmRegMapped(Reg, Variable_Mapped);
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SetArmRegProtected(Reg, true);
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switch (variable)
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{
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case VARIABLE_GPR:
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CPU_Message(" regcache: allocate %s as pointer to GPR", ArmRegName(Reg));
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m_Variable_MappedTo[Reg] = variable;
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2016-09-30 20:36:49 +00:00
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MoveConstToArmReg(Reg, (uint32_t)_GPR, "_GPR");
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2016-09-30 13:33:07 +00:00
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break;
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case VARIABLE_FPR:
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CPU_Message(" regcache: allocate %s as pointer to _FPR_S", ArmRegName(Reg));
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m_Variable_MappedTo[Reg] = variable;
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2016-09-30 20:36:49 +00:00
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MoveConstToArmReg(Reg,(uint32_t)_FPR_S,"_FPR_S");
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2016-09-30 13:33:07 +00:00
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break;
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case VARIABLE_TLB_READMAP:
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CPU_Message(" regcache: allocate %s as pointer to TLB_READMAP", ArmRegName(Reg));
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m_Variable_MappedTo[Reg] = variable;
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2016-09-30 20:36:49 +00:00
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MoveConstToArmReg(Reg, (uint32_t)(g_MMU->m_TLB_ReadMap), "MMU->TLB_ReadMap");
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2016-09-30 13:33:07 +00:00
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break;
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case VARIABLE_NEXT_TIMER:
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CPU_Message(" regcache: allocate %s as pointer to g_NextTimer", ArmRegName(Reg));
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m_Variable_MappedTo[Reg] = variable;
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2016-09-30 20:36:49 +00:00
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MoveConstToArmReg(Reg, (uint32_t)(g_NextTimer), "g_NextTimer");
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2016-09-30 13:33:07 +00:00
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break;
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default:
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return Arm_Unknown;
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}
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return Reg;
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}
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2016-09-29 12:15:33 +00:00
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#endif
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