2023-06-15 11:39:44 +00:00
|
|
|
#include "cpu/RSPOpcode.h"
|
2016-02-14 18:49:47 +00:00
|
|
|
#include "Types.h"
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2021-01-19 05:58:59 +00:00
|
|
|
extern uint32_t CompilePC, NextInstruction, JumpTableSize;
|
2016-02-14 18:49:47 +00:00
|
|
|
extern Boolean ChangedPC;
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
#define CompilerWarning \
|
|
|
|
if (ShowErrors) DisplayError
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
#define High16BitAccum 1
|
|
|
|
#define Middle16BitAccum 2
|
|
|
|
#define Low16BitAccum 4
|
|
|
|
#define EntireAccum (Low16BitAccum | Middle16BitAccum | High16BitAccum)
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2016-02-14 18:49:47 +00:00
|
|
|
Boolean WriteToAccum(int Location, int PC);
|
|
|
|
Boolean WriteToVectorDest(DWORD DestReg, int PC);
|
|
|
|
Boolean UseRspFlags(int PC);
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2016-02-14 18:49:47 +00:00
|
|
|
Boolean DelaySlotAffectBranch(DWORD PC);
|
2023-06-15 11:39:44 +00:00
|
|
|
Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom);
|
|
|
|
Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp);
|
2016-02-14 18:49:47 +00:00
|
|
|
Boolean IsOpcodeNop(DWORD PC);
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2016-02-14 18:49:47 +00:00
|
|
|
Boolean IsNextInstructionMmx(DWORD PC);
|
|
|
|
Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant);
|
2016-01-27 09:11:59 +00:00
|
|
|
|
|
|
|
void RSP_Element2Mmx(int MmxReg);
|
|
|
|
void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2);
|
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
#define MainBuffer 0
|
|
|
|
#define SecondaryBuffer 1
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
DWORD RunRecompilerCPU(DWORD Cycles);
|
|
|
|
void BuildRecompilerCPU(void);
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
void CompilerRSPBlock(void);
|
|
|
|
void CompilerToggleBuffer(void);
|
2016-02-14 18:49:47 +00:00
|
|
|
Boolean RSP_DoSections(void);
|
2016-01-27 09:11:59 +00:00
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
typedef struct
|
|
|
|
{
|
|
|
|
DWORD StartPC, CurrPC; // Block start
|
|
|
|
|
|
|
|
struct
|
|
|
|
{
|
|
|
|
DWORD TargetPC; // Target for this unknown branch
|
|
|
|
DWORD * X86JumpLoc; // Our x86 DWORD to fill
|
|
|
|
} BranchesToResolve[200]; // Branches inside or outside block
|
|
|
|
|
|
|
|
DWORD ResolveCount; // Branches with NULL jump table
|
2016-01-27 09:11:59 +00:00
|
|
|
} RSP_BLOCK;
|
|
|
|
|
|
|
|
extern RSP_BLOCK CurrentBlock;
|
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
typedef struct
|
|
|
|
{
|
|
|
|
Boolean bIsRegConst[32]; // Boolean toggle for constant
|
|
|
|
DWORD MipsRegConst[32]; // Value of register 32-bit
|
|
|
|
DWORD BranchLabels[250];
|
|
|
|
DWORD LabelCount;
|
|
|
|
DWORD BranchLocations[250];
|
|
|
|
DWORD BranchCount;
|
2016-01-27 09:11:59 +00:00
|
|
|
} RSP_CODE;
|
|
|
|
|
|
|
|
extern RSP_CODE RspCode;
|
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
#define IsRegConst(i) (RspCode.bIsRegConst[i])
|
2016-01-27 09:11:59 +00:00
|
|
|
#define MipsRegConst(i) (RspCode.MipsRegConst[i])
|
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
typedef struct
|
|
|
|
{
|
|
|
|
Boolean mmx, mmx2, sse; // CPU specs and compiling
|
|
|
|
Boolean bFlags; // RSP flag analysis
|
|
|
|
Boolean bReOrdering; // Instruction reordering
|
|
|
|
Boolean bSections; // Microcode sections
|
|
|
|
Boolean bDest; // Vector destination toggle
|
|
|
|
Boolean bAccum; // Accumulator toggle
|
|
|
|
Boolean bGPRConstants; // Analyze GPR constants
|
|
|
|
Boolean bAlignVector; // Align known vector loads
|
|
|
|
Boolean bAudioUcode; // Audio microcode analysis
|
2016-01-27 09:11:59 +00:00
|
|
|
} RSP_COMPILER;
|
|
|
|
|
|
|
|
extern RSP_COMPILER Compiler;
|
|
|
|
|
2023-06-01 11:46:23 +00:00
|
|
|
#define IsMmxEnabled (Compiler.mmx)
|
|
|
|
#define IsMmx2Enabled (Compiler.mmx2)
|
|
|
|
#define IsSseEnabled (Compiler.sse)
|