2021-03-16 07:17:43 +00:00
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// Project64 - A Nintendo 64 emulator
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2021-05-18 11:51:36 +00:00
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// https://www.pj64-emu.com/
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2021-03-16 07:17:43 +00:00
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// Copyright(C) 2001-2021 Project64
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// Copyright(C) 2014 Bobby Smiles
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// GNU/GPLv2 licensed: https://gnu.org/licenses/gpl-2.0.html
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2016-04-28 07:09:44 +00:00
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#pragma once
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2021-04-12 06:34:26 +00:00
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#include <stdint.h>
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2016-04-28 07:09:44 +00:00
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#include "Rsp.h"
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#include "ucodes.h"
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2021-03-16 05:31:26 +00:00
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// Signal processor interface flags
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2016-04-28 07:09:44 +00:00
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enum
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{
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2021-05-18 11:51:36 +00:00
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SP_CLR_HALT = 0x00001, // Bit 0: Clear halt
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SP_SET_HALT = 0x00002, // Bit 1: Set halt
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SP_CLR_BROKE = 0x00004, // Bit 2: Clear broke
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SP_CLR_INTR = 0x00008, // Bit 3: Clear INTR
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SP_SET_INTR = 0x00010, // Bit 4: Set INTR
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SP_CLR_SSTEP = 0x00020, // Bit 5: Clear SSTEP
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SP_SET_SSTEP = 0x00040, // Bit 6: Set SSTEP
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SP_CLR_INTR_BREAK = 0x00080, // Bit 7: Clear INTR on break
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SP_SET_INTR_BREAK = 0x00100, // Bit 8: Set INTR on break
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SP_CLR_SIG0 = 0x00200, // Bit 9: Clear signal 0
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SP_SET_SIG0 = 0x00400, // Bit 10: Set signal 0
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SP_CLR_SIG1 = 0x00800, // Bit 11: Clear signal 1
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SP_SET_SIG1 = 0x01000, // Bit 12: Set signal 1
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SP_CLR_SIG2 = 0x02000, // Bit 13: Clear signal 2
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SP_SET_SIG2 = 0x04000, // Bit 14: Set signal 2
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SP_CLR_SIG3 = 0x08000, // Bit 15: Clear signal 3
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SP_SET_SIG3 = 0x10000, // Bit 16: Set signal 3
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SP_CLR_SIG4 = 0x20000, // Bit 17: Clear signal 4
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SP_SET_SIG4 = 0x40000, // Bit 18: Set signal 4
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SP_CLR_SIG5 = 0x80000, // Bit 19: Clear signal 5
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SP_SET_SIG5 = 0x100000, // Bit 20: Set signal 5
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SP_CLR_SIG6 = 0x200000, // Bit 21: Clear signal 6
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SP_SET_SIG6 = 0x400000, // Bit 22: Set signal 6
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SP_CLR_SIG7 = 0x800000, // Bit 23: Clear signal 7
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SP_SET_SIG7 = 0x1000000, // Bit 24: Set signal 7
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2021-05-18 11:51:36 +00:00
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SP_STATUS_HALT = 0x001, // Bit 0: Halt
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SP_STATUS_BROKE = 0x002, // Bit 1: Broke
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SP_STATUS_DMA_BUSY = 0x004, // Bit 2: DMA busy
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SP_STATUS_DMA_FULL = 0x008, // Bit 3: DMA full
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SP_STATUS_IO_FULL = 0x010, // Bit 4: IO full
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SP_STATUS_SSTEP = 0x020, // Bit 5: Single step
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SP_STATUS_INTR_BREAK = 0x040, // Bit 6: Interrupt on break
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SP_STATUS_SIG0 = 0x080, // Bit 7: Signal 0 set
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SP_STATUS_SIG1 = 0x100, // Bit 8: Signal 1 set
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SP_STATUS_SIG2 = 0x200, // Bit 9: Signal 2 set
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SP_STATUS_SIG3 = 0x400, // Bit 10: Signal 3 set
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SP_STATUS_SIG4 = 0x800, // Bit 11: Signal 4 set
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SP_STATUS_SIG5 = 0x1000, // Bit 12: Signal 5 set
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SP_STATUS_SIG6 = 0x2000, // Bit 13: Signal 6 set
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SP_STATUS_SIG7 = 0x4000, // Bit 14: Signal 7 set
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};
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2021-03-16 05:31:26 +00:00
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// MIPS interface flags
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2016-04-28 07:09:44 +00:00
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enum
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{
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2021-05-18 11:51:36 +00:00
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MI_INTR_SP = 0x01, // Bit 0: SP INTR
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MI_INTR_SI = 0x02, // Bit 1: SI INTR
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MI_INTR_AI = 0x04, // Bit 2: AI INTR
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MI_INTR_VI = 0x08, // Bit 3: VI INTR
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MI_INTR_PI = 0x10, // Bit 4: PI INTR
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MI_INTR_DP = 0x20, // Bit 5: DP INTR
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2016-04-28 07:09:44 +00:00
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};
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class CHle
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{
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public:
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CHle(const RSP_INFO & Rsp_Info);
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~CHle();
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uint8_t * dram() { return m_dram; }
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uint8_t * dmem() { return m_dmem; }
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uint8_t * imem() { return m_imem; }
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bool AudioHle() { return m_AudioHle; }
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bool GraphicsHle() { return m_GraphicsHle; }
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struct alist_audio_t & alist_audio() { return m_alist_audio; }
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struct alist_naudio_t & alist_naudio() { return m_alist_naudio; }
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struct alist_nead_t & alist_nead() { return m_alist_nead; }
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uint8_t * mp3_buffer() { return &m_mp3_buffer[0]; }
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uint8_t * alist_buffer() { return &m_alist_buffer[0]; }
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void VerboseMessage(const char *message, ...);
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void WarnMessage(const char *message, ...);
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void ErrorMessage(const char *message, ...);
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void rsp_break(uint32_t setbits);
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void hle_execute(void);
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private:
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2021-04-13 00:07:11 +00:00
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CHle(void);
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CHle(const CHle&);
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CHle& operator=(const CHle&);
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2016-04-28 07:09:44 +00:00
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bool is_task(void);
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bool try_fast_audio_dispatching(void);
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bool try_fast_task_dispatching(void);
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void normal_task_dispatching(void);
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void non_task_dispatching(void);
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uint8_t * m_dram;
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uint8_t * m_dmem;
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uint8_t * m_imem;
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uint32_t* m_mi_intr;
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uint32_t* m_sp_mem_addr;
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uint32_t* m_sp_dram_addr;
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uint32_t* m_sp_rd_length;
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uint32_t* m_sp_wr_length;
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uint32_t* m_sp_status;
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uint32_t* m_sp_dma_full;
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uint32_t* m_sp_dma_busy;
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uint32_t* m_sp_pc;
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uint32_t* m_sp_semaphore;
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uint32_t* m_dpc_start;
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uint32_t* m_dpc_end;
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uint32_t* m_dpc_current;
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uint32_t* m_dpc_status;
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uint32_t* m_dpc_clock;
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uint32_t* m_dpc_bufbusy;
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uint32_t* m_dpc_pipebusy;
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uint32_t* m_dpc_tmem;
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void(*m_CheckInterrupts)(void);
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void(*m_ProcessDList)(void);
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void(*m_ProcessAList)(void);
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void(*m_ProcessRdpList)(void);
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void(*m_ShowCFB)(void);
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2021-03-16 05:31:26 +00:00
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// alist.cpp
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2016-04-28 07:09:44 +00:00
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uint8_t m_alist_buffer[0x1000];
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2021-03-16 05:31:26 +00:00
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// alist_audio.cpp
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2016-04-28 07:09:44 +00:00
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struct alist_audio_t m_alist_audio;
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2021-03-16 05:31:26 +00:00
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// alist_naudio.cpp
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2016-04-28 07:09:44 +00:00
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struct alist_naudio_t m_alist_naudio;
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2021-03-16 05:31:26 +00:00
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// alist_nead.cpp
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2016-04-28 07:09:44 +00:00
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struct alist_nead_t m_alist_nead;
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2021-03-16 05:31:26 +00:00
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// mp3.cpp
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2016-04-28 07:09:44 +00:00
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uint8_t m_mp3_buffer[0x1000];
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bool m_AudioHle;
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bool m_GraphicsHle;
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bool m_ForwardAudio;
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bool m_ForwardGFX;
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};
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