Commit Graph

10 Commits

Author SHA1 Message Date
TellowKrinkle f7476dfb63 Core: Replace alignment macros with alignas 2021-11-14 13:52:20 -06:00
kojin 8fdaaa2eab common: reorganize 2021-09-04 18:28:07 -04:00
Jake.Stine be1a590464 newHostVM: (WIP, may not run!) -- Applied host virtual memory mapping to the EE/IOP/VU main and on-chip memory banks. Added a new OO-based system allocator object for handling said virtual memory resources. Plus many code cleanups, and some added mess that needs to be cleaned up.
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4020 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-11-15 14:05:02 +00:00
Jake.Stine 01541f2c92 newHostVM branch: work-in-progress stuff...
git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@3958 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-10-22 16:23:52 +00:00
Jake.Stine 36d1503581 Converted IOP to use a static/global hardware register allocation. (same as I did for the EE a few weeks ago).
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3826 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-09-23 19:44:55 +00:00
Jake.Stine bda94b16cd General emulator memory work, regarding my new policy that most (or all) cpu and hardware registers should be standard globals, as it makes our lives a lot easier in general (and their memory footprint is small so it won't adversely affect the virtual memory availability of the host operating systems). Details:
* Removed the hacky g_pVU1 pointer, which required VU1 cpu registers to be part of VU0.  Replaced it with a standard VU1 variable (mimics all other CPU registers, which are standard static vars).  We were using translation functions/tables for all VU0 memory operations anyway, so this was a no-brainer.
 * Removed code from microVU that was only there to help deal with the fact that g_pVU1 was annoying.
 * Turned eeMem->HW into a static global array eeHw [64k].

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3692 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-27 03:21:16 +00:00
Jake.Stine a8e406523b Improved EE/VTLB memory management: Removes various psM/psR/psS/psH pointers and replaces them with a single unified eeMem pointer. Members of eeMem correspond to Main, Scratchpad, Hardware, etc. This simplifies the EE's memory allocation, improves compiler optimization, gets rid of some macro mess, and allows templated code to deduce the size of memory buffers automatically.
* Includes a minor tweak to DMAC.h - removed tDMA_TADR / tDMA_MADR / etc. and replaced them with a single tDMAC_ADDR class.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3644 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-16 15:57:01 +00:00
Jake.Stine 20adde44a6 PCSX2/EEcore:
* Now using SSE for all hardware register reads and writes (mainly MFIFO stuff) [don't expect a speedup, really -- its more of a code simplification in this case].
 * [refactoring] Changed the EE Memory (vtlb) to use the u128 type instead of u64 for the 128-bit loads/stores (see mem128_t typedef)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3626 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-08-09 15:42:13 +00:00
gregory.hainaut 6bd3aa9889 [copyright]
* another bunch of copyright fix.


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3439 96395faa-99c1-11dd-bbfe-3dabce05a288
2010-07-09 15:36:09 +00:00
Jake.Stine 2bf04882e3 Some code cleanups for the new vtlb optimization (no intentional functional changes -- just deleted unused code and converted all of vtlb to the new emitter syntax. Let's hope I didn't typo anything!)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1138 96395faa-99c1-11dd-bbfe-3dabce05a288
2009-05-06 12:37:37 +00:00